sdrv_smc.h File Reference

#include <sdrv_common.h>
#include <types.h>
#include <part.h>

Go to the source code of this file.

Data Structures
struct	sdrv_smc_domain_timeout
struct	sdrv_smc_soc_timeout
struct	sdrv_smc_soc_wakeup_ctrl
struct	sdrv_smc_global_control
struct	sdrv_smc

Macros
#define	SDRV_SMC_IGNORE_AP   (0x1u)
#define	SDRV_SMC_AP_LP_ALIGN_SAF   (0x2u)

Typedefs
typedef enum sdrv_smc_domain	sdrv_smc_domain_e
typedef enum sdrv_smc_power_switch	sdrv_smc_power_switch_e

Enumerations
enum	sdrv_smc_domain { SDRV_SMC_SAF , SDRV_SMC_AP }
enum	sdrv_smc_power_switch {   SDRV_SMC_POWER_SWITCH_SF = 0 , SDRV_SMC_POWER_SWITCH_SP , SDRV_SMC_POWER_SWITCH_SX , SDRV_SMC_POWER_SWITCH_GAMA1 ,   SDRV_SMC_POWER_SWITCH_AP_DISP }

Functions
status_t	sdrv_smc_ctrl_global_control_config (sdrv_smc_t *smc_ctrl, sdrv_smc_global_control_t *config)
status_t	sdrv_smc_ctrl_set_primary_core (sdrv_smc_t *smc_ctrl, sdrv_smc_domain_e domain, sdrv_smc_core_e id)
status_t	sdrv_smc_ctrl_set_lowpower_mode (sdrv_smc_t *smc_ctrl, sdrv_smc_domain_e domain, sdrv_smc_mode_e mode)
status_t	sdrv_smc_ctrl_lowpower_enable (sdrv_smc_t *smc_ctrl, sdrv_smc_domain_e domain, bool enable)
status_t	sdrv_smc_ctrl_power_switch_config (sdrv_smc_t *smc_ctrl, sdrv_smc_power_switch_e power_switch, sdrv_smc_mode_e mode, bool power_down_enable)
status_t	sdrv_smc_ctrl_power_switch_delay_config (sdrv_smc_t *smc_ctrl, sdrv_smc_power_switch_e power_switch, uint32_t iso_en, uint32_t pg, uint32_t po, uint32_t iso_dis)
status_t	sdrv_smc_ctrl_ram_lowpower_config (sdrv_smc_t *smc_ctrl, sdrv_smc_ram_e ram, sdrv_smc_mode_e mode, uint32_t ram_mode)
status_t	sdrv_smc_ctrl_domain_timeout_config (sdrv_smc_t *smc_ctrl, sdrv_smc_domain_e domain, sdrv_smc_domain_timeout_t *config)
status_t	sdrv_smc_ctrl_domain_misc_config (sdrv_smc_t *smc_ctrl, sdrv_smc_domain_e domain, bool lp_trans_req, uint32_t irq_mask_dly, bool ill_trans_wkup_en)
status_t	sdrv_smc_ctrl_ap_domain_config (sdrv_smc_t *smc_ctrl, uint32_t ap_bitmap)
status_t	sdrv_smc_ctrl_rc24m_hibernate_enable (sdrv_smc_t *smc_ctrl, bool enable)
status_t	sdrv_smc_ctrl_pre_divider_config (sdrv_smc_t *smc_ctrl, uint16_t div_32k, uint8_t div_24m)
status_t	sdrv_smc_ctrl_soc_swm_timeout_config (sdrv_smc_t *smc_ctrl, sdrv_smc_soc_timeout_t *config)
status_t	sdrv_smc_ctrl_soc_wakeup_control_config (sdrv_smc_t *smc_ctrl, sdrv_smc_soc_wakeup_ctrl_t *config)
status_t	sdrv_smc_ctrl_clear_core_wakeup_ack (sdrv_smc_t *smc_ctrl)
status_t	sdrv_smc_ctrl_set_core_wakeup_ack (sdrv_smc_t *smc_ctrl, uint32_t ack)
status_t	sdrv_smc_ctrl_core_wakeup_irq_config (sdrv_smc_t *smc_ctrl, uint32_t err_wkup, uint32_t bk_wkup)
uint32_t	sdrv_smc_ctrl_get_core_wakeup_irq_status (sdrv_smc_t *smc_ctrl)
status_t	sdrv_smc_ctrl_clear_core_wakeup_irq_status (sdrv_smc_t *smc_ctrl, uint32_t clr)
status_t	sdrv_smc_ctrl_soc_misc_config (sdrv_smc_t *smc_ctrl, bool ill_trans_wkup_en)
status_t	sdrv_smc_ctrl_smc_misc_config (sdrv_smc_t *smc_ctrl, bool lpbk_force_check_en, bool permission_err_en)
status_t	sdrv_smc_ctrl_trigger_software_handshake (sdrv_smc_t *smc_ctrl, sdrv_smc_handshake_e handshake, uint32_t smc_swm)
status_t	sdrv_smc_ctrl_trigger_software_power_switch (sdrv_smc_t *smc_ctrl, sdrv_smc_power_switch_e power_switch, bool power_down_enable)
bool	sdrv_smc_ctrl_software_power_switch_gate_status (sdrv_smc_t *smc_ctrl, sdrv_smc_power_switch_e power_switch)
status_t	sdrv_smc_ctrl_trigger_software_ram_lowpower (sdrv_smc_t *smc_ctrl, sdrv_smc_ram_e ram, uint32_t ram_mode)
uint32_t	sdrv_smc_ctrl_status_monitor (sdrv_smc_t *smc_ctrl)
status_t	sdrv_smc_ctrl_clear_timeout_illegal_status (sdrv_smc_t *smc_ctrl)
uint32_t	sdrv_smc_ctrl_timeout_status_monitor (sdrv_smc_t *smc_ctrl)
uint32_t	sdrv_smc_ctrl_illegal_status_monitor (sdrv_smc_t *smc_ctrl)
status_t	sdrv_smc_ctrl_all_wakeup_interrupt_disable (sdrv_smc_t *smc_ctrl)
status_t	sdrv_smc_ctrl_wakeup_interrupt_enable (sdrv_smc_t *smc_ctrl, sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_ctrl_wakeup_interrupt_disable (sdrv_smc_t *smc_ctrl, sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_ctrl_all_interrupt_monitor_clear (sdrv_smc_t *smc_ctrl)
bool	sdrv_smc_ctrl_interrupt_monitor_status (sdrv_smc_t *smc_ctrl, sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_ctrl_clear_interrupt_monitor_status (sdrv_smc_t *smc_ctrl, sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_ctrl_record_interrupt_monitor_status (sdrv_smc_t *smc_ctrl)
status_t	sdrv_smc_ctrl_ap_domain_handshake (sdrv_smc_t *smc_ctrl, bool enable)
uint32_t	sdrv_smc_ctrl_debug_monitor (sdrv_smc_t *smc_ctrl, sdrv_smc_debug_mux_e dbg_mux)
status_t	sdrv_smc_global_control_config (sdrv_smc_global_control_t *config)
status_t	sdrv_smc_set_primary_core (sdrv_smc_domain_e domain, sdrv_smc_core_e id)
status_t	sdrv_smc_set_lowpower_mode (sdrv_smc_domain_e domain, sdrv_smc_mode_e mode)
status_t	sdrv_smc_lowpower_enable (sdrv_smc_domain_e domain, bool enable)
status_t	sdrv_smc_power_switch_config (sdrv_smc_power_switch_e power_switch, sdrv_smc_mode_e mode, bool power_down_enable)
status_t	sdrv_smc_power_switch_delay_config (sdrv_smc_power_switch_e power_switch, uint32_t iso_en, uint32_t pg, uint32_t po, uint32_t iso_dis)
status_t	sdrv_smc_ram_lowpower_config (sdrv_smc_ram_e ram, sdrv_smc_mode_e mode, uint32_t ram_mode)
status_t	sdrv_smc_domain_timeout_config (sdrv_smc_domain_e domain, sdrv_smc_domain_timeout_t *config)
status_t	sdrv_smc_domain_misc_config (sdrv_smc_domain_e domain, bool lp_trans_req, uint32_t irq_mask_dly, bool ill_trans_wkup_en)
status_t	sdrv_smc_ap_domain_config (uint32_t ap_bitmap)
status_t	sdrv_smc_rc24m_hibernate_enable (bool enable)
status_t	sdrv_smc_pre_divider_config (uint16_t div_32k, uint8_t div_24m)
status_t	sdrv_smc_soc_swm_timeout_config (sdrv_smc_soc_timeout_t *config)
status_t	sdrv_smc_soc_wakeup_control_config (sdrv_smc_soc_wakeup_ctrl_t *config)
status_t	sdrv_smc_clear_core_wakeup_ack (void)
status_t	sdrv_smc_set_core_wakeup_ack (uint32_t ack)
status_t	sdrv_smc_core_wakeup_irq_config (uint32_t err_wkup, uint32_t bk_wkup)
uint32_t	sdrv_smc_get_core_wakeup_irq_status (void)
status_t	sdrv_smc_clear_core_wakeup_irq_status (uint32_t clr)
status_t	sdrv_smc_soc_misc_config (bool ill_trans_wkup_en)
status_t	sdrv_smc_smc_misc_config (bool lpbk_force_check_en, bool permission_err_en)
status_t	sdrv_smc_trigger_software_handshake (sdrv_smc_handshake_e handshake, uint32_t smc_swm)
status_t	sdrv_smc_trigger_software_power_switch (sdrv_smc_power_switch_e power_switch, bool power_down_enable)
bool	sdrv_smc_software_power_switch_gate_status (sdrv_smc_power_switch_e power_switch)
status_t	sdrv_smc_trigger_software_ram_lowpower (sdrv_smc_ram_e ram, uint32_t ram_mode)
uint32_t	sdrv_smc_status_monitor (void)
status_t	sdrv_smc_clear_timeout_illegal_status (void)
uint32_t	sdrv_smc_timeout_status_monitor (void)
uint32_t	sdrv_smc_illegal_status_monitor (void)
status_t	sdrv_smc_all_wakeup_interrupt_disable (void)
status_t	sdrv_smc_wakeup_interrupt_enable (sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_wakeup_interrupt_disable (sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_all_interrupt_monitor_clear (void)
bool	sdrv_smc_interrupt_monitor_status (sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_clear_interrupt_monitor_status (sdrv_smc_core_e core, uint32_t irq_num)
status_t	sdrv_smc_record_interrupt_monitor_status (void)
status_t	sdrv_smc_ap_domain_handshake (bool enable)
uint32_t	sdrv_smc_debug_monitor (sdrv_smc_debug_mux_e dbg_mux)

Detailed Description

Copyright

Copyright (c) 2022 Semidrive Semiconductor. All rights reserved.

Macro Definition Documentation

RAM_LP_PG_EN

#define RAM_LP_PG_EN   0x4u

RAM_LP_RET1N

#define RAM_LP_RET1N   0x2u

RAM_LP_RET2N

#define RAM_LP_RET2N   0x1u

SDRV_SF_CKGEN_BCG_NUM

#define SDRV_SF_CKGEN_BCG_NUM   15

SDRV_SF_CKGEN_CCG_NUM

#define SDRV_SF_CKGEN_CCG_NUM   5

SDRV_SF_CKGEN_PCG_NUM

#define SDRV_SF_CKGEN_PCG_NUM   334

SDRV_SMC_AP_LP_ALIGN_SAF

#define SDRV_SMC_AP_LP_ALIGN_SAF   (0x2u)

AP domain wakeup with SAF domain

SDRV_SMC_AP_WK_ALIGN_SAF

#define SDRV_SMC_AP_WK_ALIGN_SAF   (0x4u)

SDRV_SMC_ASYNC_INT_IOC

#define SDRV_SMC_ASYNC_INT_IOC   (237 + 16)

SDRV_SMC_ASYNC_INT_USB

#define SDRV_SMC_ASYNC_INT_USB   (236 + 16)

SMC additional wakeup irq num.

SDRV_SMC_ASYNC_INT_VIC1_AP_GPIO

#define SDRV_SMC_ASYNC_INT_VIC1_AP_GPIO   (239 + 16)

SDRV_SMC_ASYNC_INT_VIC1_SF_GPIO

#define SDRV_SMC_ASYNC_INT_VIC1_SF_GPIO   (238 + 16)

SDRV_SMC_ASYNC_INT_VIC2A_AP_GPIO

#define SDRV_SMC_ASYNC_INT_VIC2A_AP_GPIO   (241 + 16)

SDRV_SMC_ASYNC_INT_VIC2A_SF_GPIO

#define SDRV_SMC_ASYNC_INT_VIC2A_SF_GPIO   (240 + 16)

SDRV_SMC_ASYNC_INT_VIC2B_AP_GPIO

#define SDRV_SMC_ASYNC_INT_VIC2B_AP_GPIO   (243 + 16)

SDRV_SMC_ASYNC_INT_VIC2B_SF_GPIO

#define SDRV_SMC_ASYNC_INT_VIC2B_SF_GPIO   (242 + 16)

SDRV_SMC_ASYNC_INT_VIC3A_AP_GPIO

#define SDRV_SMC_ASYNC_INT_VIC3A_AP_GPIO   (245 + 16)

SDRV_SMC_ASYNC_INT_VIC3A_SF_GPIO

#define SDRV_SMC_ASYNC_INT_VIC3A_SF_GPIO   (244 + 16)

SDRV_SMC_ASYNC_INT_VIC3B_AP_GPIO

#define SDRV_SMC_ASYNC_INT_VIC3B_AP_GPIO   (247 + 16)

SDRV_SMC_ASYNC_INT_VIC3B_SF_GPIO

#define SDRV_SMC_ASYNC_INT_VIC3B_SF_GPIO   (246 + 16)

SDRV_SMC_CHIP_ENABLE

#define SDRV_SMC_CHIP_ENABLE   (RAM_LP_RET1N | RAM_LP_RET2N)

SDRV_SMC_IGNORE_AP

#define SDRV_SMC_IGNORE_AP   (0x1u)

AP power state impacts to SMC state machine.

< AP status is ignored. Only Safety SMC state used for SWM transtion. AP domain enter low power mode with SAF domain

SDRV_SMC_POWER_DOWN

#define SDRV_SMC_POWER_DOWN   (RAM_LP_PG_EN | RAM_LP_RET1N | RAM_LP_RET2N)

SDRV_SMC_RETENTION_1

#define SDRV_SMC_RETENTION_1   (RAM_LP_PG_EN | RAM_LP_RET2N)

SDRV_SMC_RETENTION_2

#define SDRV_SMC_RETENTION_2   (RAM_LP_PG_EN | RAM_LP_RET1N)

SDRV_SMC_SELECTIVE_PRECHARGE

#define SDRV_SMC_SELECTIVE_PRECHARGE   (RAM_LP_RET2N)

SDRV_SMC_SWM_HIB

#define SDRV_SMC_SWM_HIB   (0x2u)

SDRV_SMC_SWM_RTC

#define SDRV_SMC_SWM_RTC   (0x3u)

SDRV_SMC_SWM_RUN

#define SDRV_SMC_SWM_RUN   (0x0u)

SDRV_SMC_SWM_SLP

#define SDRV_SMC_SWM_SLP   (0x1u)

Typedef Documentation

sdrv_smc_core_e

typedef enum sdrv_smc_core sdrv_smc_core_e

CPU cores managed by SMC.

sdrv_smc_debug_mux_e

typedef enum sdrv_smc_debug_mux sdrv_smc_debug_mux_e

SMC debug mux sel.

sdrv_smc_domain_e

typedef enum sdrv_smc_domain sdrv_smc_domain_e

SMC domains.

The chip is composed of 3 power domains, Safety, AP and RTC. SMC manages power states of Safety and AP domains, while RTC is the always on domain.

sdrv_smc_domain_timeout_t

typedef struct sdrv_smc_domain_timeout sdrv_smc_domain_timeout_t

Definition for domain timeout setting.

sdrv_smc_global_control_t

typedef struct sdrv_smc_global_control sdrv_smc_global_control_t

Definition for SMC global control setting.

sdrv_smc_handshake_e

typedef enum sdrv_smc_handshake sdrv_smc_handshake_e

SMC handshake signals with other on chip modules.

sdrv_smc_mode_e

typedef enum sdrv_smc_mode sdrv_smc_mode_e

SMC power modes.

sdrv_smc_power_switch_e

typedef enum sdrv_smc_power_switch sdrv_smc_power_switch_e

Power switches.

Power switches are controlled by the SMC to turn on or turn off module power in Sleep or Hibernate modes.

sdrv_smc_ram_e

typedef enum sdrv_smc_ram sdrv_smc_ram_e

On chip RAMs that have low power modes controlled by SMC.

sdrv_smc_soc_timeout_t

typedef struct sdrv_smc_soc_timeout sdrv_smc_soc_timeout_t

Definition for SOC SWM timeout setting.

sdrv_smc_soc_wakeup_ctrl_t

typedef struct sdrv_smc_soc_wakeup_ctrl sdrv_smc_soc_wakeup_ctrl_t

Definition for soc wakeup timeout control setting.

sdrv_smc_t

typedef struct sdrv_smc sdrv_smc_t

System work mode controller instance.

Enumeration Type Documentation

sdrv_smc_core

enum sdrv_smc_core

CPU cores managed by SMC.

Enumerator
SDRV_SMC_CORE_SF	cluster 0
SDRV_SMC_CORE_SP0	cluster 2, core 0
SDRV_SMC_CORE_SP1	cluster 2, core 1
SDRV_SMC_CORE_SX0	cluster 1, core 0
SDRV_SMC_CORE_SX1	cluster 1, core 1

sdrv_smc_debug_mux

enum sdrv_smc_debug_mux

SMC debug mux sel.

Enumerator
SDRV_SMC_DBG_HK_SAF
SDRV_SMC_DBG_HK_AP
SDRV_SMC_DBG_HK_PMU

sdrv_smc_domain

enum sdrv_smc_domain

SMC domains.

The chip is composed of 3 power domains, Safety, AP and RTC. SMC manages power states of Safety and AP domains, while RTC is the always on domain.

Enumerator
SDRV_SMC_SAF	Safety power domain
SDRV_SMC_AP	AP power domain

sdrv_smc_error

enum sdrv_smc_error

SMC status error code.

Enumerator
SDRV_SMC_CONFIG_TYPE_WRONG
SDRV_SMC_CONFIG_NOT_SUPPORT

sdrv_smc_handshake

enum sdrv_smc_handshake

SMC handshake signals with other on chip modules.

Enumerator
SDRV_SMC_HK_AP_CKGEN	handshake with AP clock generator
SDRV_SMC_HK_AP_RSTGEN	handshake with AP reset generator
SDRV_SMC_HK_SAF_CKGEN	handshake with Safety clock generator
SDRV_SMC_HK_SAF_RSTGEN	handshake with Safety reset generator
SDRV_SMC_HK_PMU	handshake with PMU

sdrv_smc_mode

enum sdrv_smc_mode

SMC power modes.

Enumerator
SDRV_SMC_SLEEP	Sleep mode CPUs inactive. CPU clocks are gated. PLL power down. 24M XTAL power on or off. Periplerals are clock gated, except clocks requried by wake up sources. RAM in retention mode. Hibernate mode CPU power down AP domain power down PLL and 24M XTAL power down Safety domain periplerals clock gated RAM in retention mode
SDRV_SMC_HIBERNATE

sdrv_smc_power_switch

enum sdrv_smc_power_switch

Power switches.

Power switches are controlled by the SMC to turn on or turn off module power in Sleep or Hibernate modes.

Enumerator
SDRV_SMC_POWER_SWITCH_SF	CR5_SF_MIX power switch
SDRV_SMC_POWER_SWITCH_SP	CR5_SP_MIX power switch
SDRV_SMC_POWER_SWITCH_SX	CR5_SX_MIX power switch
SDRV_SMC_POWER_SWITCH_GAMA1	SP_SS gama1 power switch
SDRV_SMC_POWER_SWITCH_AP_DISP	AP_SS disp power switch

sdrv_smc_ram

enum sdrv_smc_ram

On chip RAMs that have low power modes controlled by SMC.

Enumerator
SDRV_SMC_RAM_SF	SF core RAM
SDRV_SMC_RAM_SP	SP core RAM
SDRV_SMC_RAM_SX	SX core RAM
SDRV_SMC_RAM_GAMA1	GAMA internal RAM
SDRV_SMC_RAM_SF_MISC	Other RAMs in Safety subsystem
SDRV_SMC_RAM_AP	RAMs in AP subsystem
SDRV_SMC_RAM_DISP	RAMs in display domain

Function Documentation

sdrv_smc_all_interrupt_monitor_clear()

status_t sdrv_smc_all_interrupt_monitor_clear

(

void

)

Clear all interrupt monitor register status.

This function will clear all interrupt status in interrupt monitor register.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_all_wakeup_interrupt_disable()

status_t sdrv_smc_all_wakeup_interrupt_disable

(

void

)

Mask all interrupt for SMC.

This function mask all interrupt source in low power mode.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ap_domain_config()

status_t sdrv_smc_ap_domain_config

(

uint32_t

ap_bitmap

)

AP domain smc config.

This function configures whether AP power state has impacts to the SMC state machine.

Parameters

[in]

ap_bitmap

OR'ed value of the following macros: SDRV_SMC_IGNORE_AP SDRV_SMC_AP_LP_ALIGN_SAF SDRV_SMC_AP_WK_ALIGN_SAF

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ap_domain_handshake()

status_t sdrv_smc_ap_domain_handshake

(

bool

enable

)

Config SMC whether handshake with AP domain.

This function config SMC ignore AP domain.

Parameters

[in]

enable

true represents SMC will handshake with AP, false represents SMC will not handshake with AP.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_clear_core_wakeup_ack()

status_t sdrv_smc_clear_core_wakeup_ack

(

void

)

Clear all core wakeup acknowledge.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_clear_core_wakeup_irq_status()

status_t sdrv_smc_clear_core_wakeup_irq_status

(

uint32_t

clr

)

Clear wakeup core irq status.

Parameters

[in]

clr

clear status bit. bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_clear_interrupt_monitor_status()

status_t sdrv_smc_clear_interrupt_monitor_status	(	sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Clear specific core interrupt status in interrupt monitor register.

This function clear the interrupt status for specific core.

Parameters

[in]	core	core id
[in]	irq_num	irq number

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_clear_timeout_illegal_status()

status_t sdrv_smc_clear_timeout_illegal_status

(

void

)

Clear SMC timeout and illegal transition error status.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_core_wakeup_irq_config()

status_t sdrv_smc_core_wakeup_irq_config	(	uint32_t	err_wkup,
		uint32_t	bk_wkup
	)

Set wakeup core irq enable or disable.

Parameters

[in]	err_wkup	smc error wakeup core irq enable bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1
[in]	bk_wkup	smc wakeup core irq enable bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_all_interrupt_monitor_clear()

status_t sdrv_smc_ctrl_all_interrupt_monitor_clear

(

sdrv_smc_t *

smc_ctrl

)

Clear all interrupt monitor register status.

This function will clear all interrupt status in interrupt monitor register.

Parameters

[in]

smc_ctrl

SMC controller instance

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_all_wakeup_interrupt_disable()

status_t sdrv_smc_ctrl_all_wakeup_interrupt_disable

(

sdrv_smc_t *

smc_ctrl

)

Mask all interrupt for SMC.

This function mask all interrupt source in low power mode.

Parameters

[in]

smc_ctrl

SMC controller instance

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_ap_domain_config()

status_t sdrv_smc_ctrl_ap_domain_config	(	sdrv_smc_t *	smc_ctrl,
		uint32_t	ap_bitmap
	)

AP domain smc config.

This function configures whether AP power state has impacts to the SMC state machine.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	ap_bitmap	OR'ed value of the following macros: SDRV_SMC_IGNORE_AP SDRV_SMC_AP_LP_ALIGN_SAF SDRV_SMC_AP_WK_ALIGN_SAF

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_ap_domain_handshake()

status_t sdrv_smc_ctrl_ap_domain_handshake	(	sdrv_smc_t *	smc_ctrl,
		bool	enable
	)

Config SMC whether handshake with AP domain.

This function config SMC ignore AP domain.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	enable	true represents SMC will handshake with AP, false represents SMC will not handshake with AP.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_clear_core_wakeup_ack()

status_t sdrv_smc_ctrl_clear_core_wakeup_ack

(

sdrv_smc_t *

smc_ctrl

)

Clear all core wakeup acknowledge.

Parameters

[in]

smc_ctrl

SMC controller instance.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_clear_core_wakeup_irq_status()

status_t sdrv_smc_ctrl_clear_core_wakeup_irq_status	(	sdrv_smc_t *	smc_ctrl,
		uint32_t	clr
	)

Clear wakeup core irq status.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	clr	clear status bit. bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_clear_interrupt_monitor_status()

status_t sdrv_smc_ctrl_clear_interrupt_monitor_status	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Clear specific core interrupt status in interrupt monitor register.

This function clear the interrupt status for specific core.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	core	core id
[in]	irq_num	irq number

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_clear_timeout_illegal_status()

status_t sdrv_smc_ctrl_clear_timeout_illegal_status

(

sdrv_smc_t *

smc_ctrl

)

Clear SMC timeout and illegal transition error status.

Parameters

[in]

smc_ctrl

SMC controller instance

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_core_wakeup_irq_config()

status_t sdrv_smc_ctrl_core_wakeup_irq_config	(	sdrv_smc_t *	smc_ctrl,
		uint32_t	err_wkup,
		uint32_t	bk_wkup
	)

Set wakeup core irq enable or disable.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	err_wkup	smc error wakeup core irq enable bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1
[in]	bk_wkup	smc wakeup core irq enable bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_debug_monitor()

uint32_t sdrv_smc_ctrl_debug_monitor	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_debug_mux_e	dbg_mux
	)

Debug for SMC status.

This function choose a debug output type, and return the debug value.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	dbg_mux	mux defined in sdrv_smc_debug_mux_e.

Returns

uint32_t

sdrv_smc_ctrl_domain_misc_config()

status_t sdrv_smc_ctrl_domain_misc_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_domain_e	domain,
		bool	lp_trans_req,
		uint32_t	irq_mask_dly,
		bool	ill_trans_wkup_en
	)

Config SMC Saf or AP domain misc.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	domain	SDRV_SMC_SAF or SDRV_SMC_AP.
[in]	lp_trans_req	LP mode transition request.
[in]	irq_mask_dly	Interrupt mask delay.
[in]	ill_trans_wkup_en	Swm illegal transfer wakeup enable.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_domain_timeout_config()

status_t sdrv_smc_ctrl_domain_timeout_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_domain_e	domain,
		sdrv_smc_domain_timeout_t *	config
	)

Config SMC Saf or AP domain tiemout setting.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	domain	SDRV_SMC_SAF or SDRV_SMC_AP.
[in]	config	domain timeout setting.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_get_core_wakeup_irq_status()

uint32_t sdrv_smc_ctrl_get_core_wakeup_irq_status

(

sdrv_smc_t *

smc_ctrl

)

Get wakeup core irq status.

Parameters

[in]

smc_ctrl

SMC controller instance.

Returns

uint32_t bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

sdrv_smc_ctrl_global_control_config()

status_t sdrv_smc_ctrl_global_control_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_global_control_t *	config
	)

Config Safety/AP domain global control setting.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	config	global control setting.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_illegal_status_monitor()

uint32_t sdrv_smc_ctrl_illegal_status_monitor

(

sdrv_smc_t *

smc_ctrl

)

Get SMC illegal transition event monitor status.

Parameters

[in]

smc_ctrl

SMC controller instance

Returns

uint32_t

sdrv_smc_ctrl_interrupt_monitor_status()

bool sdrv_smc_ctrl_interrupt_monitor_status	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Get specific core interrupt status in interrupt monitor register.

This function get the interrupt status for specific core.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	core	core id
[in]	irq_num	irq number

Returns

true represents irq occurs, false represents no interrupt occurs.

sdrv_smc_ctrl_lowpower_enable()

status_t sdrv_smc_ctrl_lowpower_enable	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_domain_e	domain,
		bool	enable
	)

Enable or disable low power for specific domain.

This function enable or disable low power mode for a domain. If enabled, when all CPUs enter wfi, SMC will start low power procedure.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	domain	safety or ap domain
[in]	enable	true/false

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_power_switch_config()

status_t sdrv_smc_ctrl_power_switch_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_power_switch_e	power_switch,
		sdrv_smc_mode_e	mode,
		bool	power_down_enable
	)

Control power switchs in low power mode.

This function configures power switch states (on or off) in domain low power mode.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	power_switch	The power switch to configure.
[in]	mode	The SMC low power mode to configure the switch for.
[in]	power_down_enable	True to turn off the switch in low power mode. False to leave the power switch on in lower power mode.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_power_switch_delay_config()

status_t sdrv_smc_ctrl_power_switch_delay_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_power_switch_e	power_switch,
		uint32_t	iso_en,
		uint32_t	pg,
		uint32_t	po,
		uint32_t	iso_dis
	)

Config Power switch in low power delay control.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	power_switch	The power switch to configure.
[in]	iso_en	isolation enable delay between LP process start to X_iso_en pose.
[in]	pg	power gate delay between X_iso_en pose to X_pwr_gate pose.
[in]	po	power on delay between RUN process start to X_pwr_gate nege.
[in]	iso_dis	isolation disable delay between X_pwr_gate nege to X_iso_en_nege.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_pre_divider_config()

status_t sdrv_smc_ctrl_pre_divider_config	(	sdrv_smc_t *	smc_ctrl,
		uint16_t	div_32k,
		uint8_t	div_24m
	)

Set pre-divider number for 24M and 32K clock.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	div_32k	pre div number for clk32k.
[in]	div_24m	pre div number for clk24m.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_ram_lowpower_config()

status_t sdrv_smc_ctrl_ram_lowpower_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_ram_e	ram,
		sdrv_smc_mode_e	mode,
		uint32_t	ram_mode
	)

Configure low power modes for core RAM.

This function configures low power modes for core RAMs, i.e, module interal RAM, CPU cache and TCM, in SMC sleep or hibernate modes.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	ram	RAM type.
[in]	mode	The SMC low power mode to configure RAM mode for.
[in]	ram_mode	RAM mode in SMC low power mode. Possible values are: SDRV_SMC_CHIP_ENABLE SDRV_SMC_SELECTIVE_PRECHARGE SDRV_SMC_RETENTION_1 SDRV_SMC_RETENTION_2 SDRV_SMC_POWER_DOWN

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_rc24m_hibernate_enable()

status_t sdrv_smc_ctrl_rc24m_hibernate_enable	(	sdrv_smc_t *	smc_ctrl,
		bool	enable
	)

Configure RC oscillator state in hibernate mode.

This function configures on chip 24M RC oscillator state in SMC hibernate mode.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	enable	True to enable the RC oscillator in hibernate mode. False to turn off the oscillator in hibernate mode.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_record_interrupt_monitor_status()

status_t sdrv_smc_ctrl_record_interrupt_monitor_status

(

sdrv_smc_t *

smc_ctrl

)

This function record monitor interrupt status when exit WFI.

Parameters

[in]

smc_ctrl

SMC controller instance

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_set_core_wakeup_ack()

status_t sdrv_smc_ctrl_set_core_wakeup_ack	(	sdrv_smc_t *	smc_ctrl,
		uint32_t	ack
	)

Set core wakeup acknowledge.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	ack	bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_set_lowpower_mode()

status_t sdrv_smc_ctrl_set_lowpower_mode	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_domain_e	domain,
		sdrv_smc_mode_e	mode
	)

Set low power mode for specific domain.

This function sets the low power mode of specific domain. The domain will enter required low power mode after its primary CPU and all CPUs belongs to this domain enters WFI.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	domain	Safety or AP domain
[in]	mode	Sleep or hibernate after primary CPU WFI

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_set_primary_core()

status_t sdrv_smc_ctrl_set_primary_core	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_domain_e	domain,
		sdrv_smc_core_e	id
	)

Set primary core id for a power domain.

This function sets primary core id for a domain. Only the primary CPU of one domain can configure SMC registers of this domain.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	domain	Safety or AP domain
[in]	id	core id

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_smc_misc_config()

status_t sdrv_smc_ctrl_smc_misc_config	(	sdrv_smc_t *	smc_ctrl,
		bool	lpbk_force_check_en,
		bool	permission_err_en
	)

Config SMC misc.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	lpbk_force_check_en	lpbk force check enable, loopback wdt div number check without req/ack active.
[in]	permission_err_en	enable for permission error as apbslverr.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_soc_misc_config()

status_t sdrv_smc_ctrl_soc_misc_config	(	sdrv_smc_t *	smc_ctrl,
		bool	ill_trans_wkup_en
	)

Config SOC misc.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	ill_trans_wkup_en	Swm illegal transfer wakeup enable.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_soc_swm_timeout_config()

status_t sdrv_smc_ctrl_soc_swm_timeout_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_soc_timeout_t *	config
	)

Set soc swm timeout setting.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	config	soc timeout settings.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_soc_wakeup_control_config()

status_t sdrv_smc_ctrl_soc_wakeup_control_config	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_soc_wakeup_ctrl_t *	config
	)

Set soc wakeup control setting.

Parameters

[in]	smc_ctrl	SMC controller instance.
[in]	config	soc wakeup control settings.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_software_power_switch_gate_status()

bool sdrv_smc_ctrl_software_power_switch_gate_status	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_power_switch_e	power_switch
	)

Get power switch software power gate status.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	power_switch	The power switch to read.

Returns

Power gate status.

sdrv_smc_ctrl_status_monitor()

uint32_t sdrv_smc_ctrl_status_monitor

(

sdrv_smc_t *

smc_ctrl

)

Get SWM status monitor register.

This function get SOC/SAF/AP system work mode, futhermode, get SAF/AP internal system work mode.

Parameters

[in]

smc_ctrl

SMC controller instance

Returns

uint32_t 0x1 Run, 0x2 Sleep, 0x4 Hibernate bit[3:0]-SAF_SWM, bit[7:4]-AP_SWM, bit[11:8]-SOC_SWM 0x1 Run, 0x2 LP Proc, 0x4 Run Proc, 0x8 LP bit[20:16]-SAF_INTER_SWM, bit[25:21]-AP_INTER_SWM

sdrv_smc_ctrl_timeout_status_monitor()

uint32_t sdrv_smc_ctrl_timeout_status_monitor

(

sdrv_smc_t *

smc_ctrl

)

Get SMC timeout event monitor status.

Parameters

[in]

smc_ctrl

SMC controller instance

Returns

uint32_t

sdrv_smc_ctrl_trigger_software_handshake()

status_t sdrv_smc_ctrl_trigger_software_handshake	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_handshake_e	handshake,
		uint32_t	smc_swm
	)

Software trigger SMC handshake with other module.

This function trigger SMC handshake with other module, after handshake successful, that module will in low power mode, it will use configuration in low power mode.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	handshake	module to handshake
[in]	smc_swm	system work mode, can be following macro: SDRV_SMC_SWM_RUN SDRV_SMC_SWM_SLP SDRV_SMC_SWM_HIB SDRV_SMC_SWM_RTC

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_trigger_software_power_switch()

status_t sdrv_smc_ctrl_trigger_software_power_switch	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_power_switch_e	power_switch,
		bool	power_down_enable
	)

Software trigger SMC control power switch in run mode.

This function can software override power switch value.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	power_switch	The power switch to configure.
[in]	power_down_enable	True to turn off the switch, False to turn on the switch.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_trigger_software_ram_lowpower()

status_t sdrv_smc_ctrl_trigger_software_ram_lowpower	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_ram_e	ram,
		uint32_t	ram_mode
	)

Software trigger SMC control core ram power down in run mode.

This function can software override core ram power down value.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	ram	RAM type.
[in]	ram_mode	RAM mode override by software. Possible values are: SDRV_SMC_CHIP_ENABLE SDRV_SMC_SELECTIVE_PRECHARGE SDRV_SMC_RETENTION_1 SDRV_SMC_RETENTION_2 SDRV_SMC_POWER_DOWN

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_wakeup_interrupt_disable()

status_t sdrv_smc_ctrl_wakeup_interrupt_disable	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Disable wakeup interrupt for specific core.

This function disable interrupt to wakeup specific core in low power mode.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	core	core id
[in]	irq_num	irq number

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ctrl_wakeup_interrupt_enable()

status_t sdrv_smc_ctrl_wakeup_interrupt_enable	(	sdrv_smc_t *	smc_ctrl,
		sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Enable wakeup interrupt for specific core.

This function enable interrupt to wakeup specific core in low power mode.

Parameters

[in]	smc_ctrl	SMC controller instance
[in]	core	core id
[in]	irq_num	irq number

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_debug_monitor()

uint32_t sdrv_smc_debug_monitor

(

sdrv_smc_debug_mux_e

dbg_mux

)

Debug for SMC status.

This function choose a debug output type, and return the debug value.

Parameters

[in]

dbg_mux

mux defined in sdrv_smc_debug_mux_e.

Returns

uint32_t

sdrv_smc_domain_misc_config()

status_t sdrv_smc_domain_misc_config	(	sdrv_smc_domain_e	domain,
		bool	lp_trans_req,
		uint32_t	irq_mask_dly,
		bool	ill_trans_wkup_en
	)

Config SMC Saf or AP domain misc.

Parameters

[in]	domain	SDRV_SMC_SAF or SDRV_SMC_AP.
[in]	lp_trans_req	LP mode transition request.
[in]	irq_mask_dly	Interrupt mask delay.
[in]	ill_trans_wkup_en	Swm illegal transfer wakeup enable.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_domain_timeout_config()

status_t sdrv_smc_domain_timeout_config	(	sdrv_smc_domain_e	domain,
		sdrv_smc_domain_timeout_t *	config
	)

Config SMC Saf or AP domain timeout setting.

Parameters

[in]	domain	SDRV_SMC_SAF or SDRV_SMC_AP.
[in]	config	domain timeout setting config.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_get_core_wakeup_irq_status()

uint32_t sdrv_smc_get_core_wakeup_irq_status

(

void

)

Get wakeup core irq status.

Returns

uint32_t bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

sdrv_smc_global_control_config()

status_t sdrv_smc_global_control_config

(

sdrv_smc_global_control_t *

config

)

Config Safety/AP domain global control setting.

Parameters

[in]

config

global control setting.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_illegal_status_monitor()

uint32_t sdrv_smc_illegal_status_monitor

(

void

)

Get SMC illegal transition event monitor status.

Returns

uint32_t

sdrv_smc_interrupt_monitor_status()

bool sdrv_smc_interrupt_monitor_status	(	sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Get specific core interrupt status in interrupt monitor register.

This function get the interrupt status for specific core.

Parameters

[in]	core	core id
[in]	irq_num	irq number

Returns

true represents irq occurs, false represents no interrupt occurs.

sdrv_smc_lowpower_enable()

status_t sdrv_smc_lowpower_enable	(	sdrv_smc_domain_e	domain,
		bool	enable
	)

Enable or disable low power for specific domain.

This function enable or disable low power mode for a domain. If enabled, when all CPUs enter wfi, SMC will start low power procedure.

Parameters

[in]	domain	safety or ap domain
[in]	enable	true/false

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_power_switch_config()

status_t sdrv_smc_power_switch_config	(	sdrv_smc_power_switch_e	power_switch,
		sdrv_smc_mode_e	mode,
		bool	power_down_enable
	)

Control power switchs in low power mode.

This function configures power switch states (on or off) in domain low power mode.

Parameters

[in]	power_switch	The power switch to configure.
[in]	mode	The SMC low power mode to configure the switch for.
[in]	power_down_enable	True to turn off the switch in low power mode. False to leave the power switch on in lower power mode.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_power_switch_delay_config()

status_t sdrv_smc_power_switch_delay_config	(	sdrv_smc_power_switch_e	power_switch,
		uint32_t	iso_en,
		uint32_t	pg,
		uint32_t	po,
		uint32_t	iso_dis
	)

Config Power switch in low power delay control.

Parameters

[in]	power_switch	The power switch to configure.
[in]	iso_en	isolation enable delay between LP process start to X_iso_en pose.
[in]	pg	power gate delay between X_iso_en pose to X_pwr_gate pose.
[in]	po	power on delay between RUN process start to X_pwr_gate nege.
[in]	iso_dis	isolation disable delay between X_pwr_gate nege to X_iso_en_nege.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_pre_divider_config()

status_t sdrv_smc_pre_divider_config	(	uint16_t	div_32k,
		uint8_t	div_24m
	)

Set pre-divider number for 24M and 32K clock.

Parameters

[in]	div_32k	pre div number for clk32k.
[in]	div_24m	pre div number for clk24m.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_ram_lowpower_config()

status_t sdrv_smc_ram_lowpower_config	(	sdrv_smc_ram_e	ram,
		sdrv_smc_mode_e	mode,
		uint32_t	ram_mode
	)

Configure low power modes for core RAM.

This function configures low power modes for core RAMs, i.e, module interal RAM, CPU cache and TCM, in SMC sleep or hibernate modes.

Parameters

[in]	ram	RAM type.
[in]	mode	The SMC low power mode to configure RAM mode for.
[in]	ram_mode	RAM mode in SMC low power mode. Possible values are: SDRV_SMC_CHIP_ENABLE SDRV_SMC_SELECTIVE_PRECHARGE SDRV_SMC_RETENTION_1 SDRV_SMC_RETENTION_2 SDRV_SMC_POWER_DOWN

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_rc24m_hibernate_enable()

status_t sdrv_smc_rc24m_hibernate_enable

(

bool

enable

)

Configure RC oscillator state in hibernate mode.

This function configures on chip 24M RC oscillator state in SMC hibernate mode.

Parameters

[in]

enable

True to enable the RC oscillator in hibernate mode. False to turn off the oscillator in hibernate mode.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_record_interrupt_monitor_status()

status_t sdrv_smc_record_interrupt_monitor_status

(

void

)

This function record monitor interrupt status when exit WFI.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_set_core_wakeup_ack()

status_t sdrv_smc_set_core_wakeup_ack

(

uint32_t

ack

)

Set core wakeup acknowledge.

Parameters

[in]

ack

bit0:cr5_saf, bit1:cr5_sp0, bit2:cr5_sp1, bit3:cr5_sx0, bit4:cr5_sx1

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_set_lowpower_mode()

status_t sdrv_smc_set_lowpower_mode	(	sdrv_smc_domain_e	domain,
		sdrv_smc_mode_e	mode
	)

Set low power mode for specific domain.

This function sets the low power mode of specific domain. The domain will enter required low power mode after its primary CPU and all CPUs belongs to this domain enters WFI.

Parameters

[in]	domain	Safety or AP domain
[in]	mode	Sleep or hibernate after primary CPU WFI

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_set_primary_core()

status_t sdrv_smc_set_primary_core	(	sdrv_smc_domain_e	domain,
		sdrv_smc_core_e	id
	)

Set primary core id for a power domain.

This function sets primary core id for a domain. Only the primary CPU of one domain can configure SMC registers of this domain.

Parameters

[in]	domain	Safety or AP domain
[in]	id	core id

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_smc_misc_config()

status_t sdrv_smc_smc_misc_config	(	bool	lpbk_force_check_en,
		bool	permission_err_en
	)

Config SMC misc.

Parameters

[in]	lpbk_force_check_en	lpbk force check enable, loopback wdt div number check without req/ack active.
[in]	permission_err_en	enable for permission error as apbslverr.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_soc_misc_config()

status_t sdrv_smc_soc_misc_config

(

bool

ill_trans_wkup_en

)

Config SOC misc.

Parameters

[in]

ill_trans_wkup_en

Swm illegal transfer wakeup enable.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_soc_swm_timeout_config()

status_t sdrv_smc_soc_swm_timeout_config

(

sdrv_smc_soc_timeout_t *

config

)

Set soc swm timeout setting.

Parameters

[in]

config

soc timeout settings.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_soc_wakeup_control_config()

status_t sdrv_smc_soc_wakeup_control_config

(

sdrv_smc_soc_wakeup_ctrl_t *

config

)

Set soc wakeup control setting.

Parameters

[in]

config

soc wakeup control settings.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_software_power_switch_gate_status()

bool sdrv_smc_software_power_switch_gate_status

(

sdrv_smc_power_switch_e

power_switch

)

Get power switch software power gate status.

Parameters

[in]

power_switch

The power switch to read.

Returns

Power gate status.

sdrv_smc_status_monitor()

uint32_t sdrv_smc_status_monitor

(

void

)

Get SWM status monitor register.

This function get SOC/SAF/AP system work mode, futhermode, get SAF/AP internal system work mode.

Returns

uint32_t 0x1 Run, 0x2 Sleep, 0x4 Hibernate bit[3:0]-SAF_SWM, bit[7:4]-AP_SWM, bit[11:8]-SOC_SWM 0x1 Run, 0x2 LP Proc, 0x4 Run Proc, 0x8 LP bit[20:16]-SAF_INTER_SWM, bit[25:21]-AP_INTER_SWM

sdrv_smc_timeout_status_monitor()

uint32_t sdrv_smc_timeout_status_monitor

(

void

)

Get SMC timeout event monitor status.

Returns

uint32_t

sdrv_smc_trigger_software_handshake()

status_t sdrv_smc_trigger_software_handshake	(	sdrv_smc_handshake_e	handshake,
		uint32_t	smc_swm
	)

Software trigger SMC handshake with other module.

This function trigger SMC handshake with other module, after handshake successful, that module will in low power mode, it will use configuration in low power mode.

Parameters

[in]	handshake	module to handshake
[in]	smc_swm	system work mode, can be following macro: SDRV_SMC_SWM_RUN SDRV_SMC_SWM_SLP SDRV_SMC_SWM_HIB SDRV_SMC_SWM_RTC

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_trigger_software_power_switch()

status_t sdrv_smc_trigger_software_power_switch	(	sdrv_smc_power_switch_e	power_switch,
		bool	power_down_enable
	)

Software trigger SMC control power switch in run mode.

This function can software override power switch value.

Parameters

[in]	power_switch	The power switch to configure.
[in]	power_down_enable	True to turn off the switch, False to turn on the switch.

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_trigger_software_ram_lowpower()

status_t sdrv_smc_trigger_software_ram_lowpower	(	sdrv_smc_ram_e	ram,
		uint32_t	ram_mode
	)

Software trigger SMC control core ram power down in run mode.

This function can software override core ram power down value.

Parameters

[in]	ram	RAM type.
[in]	ram_mode	RAM mode override by software. Possible values are: SDRV_SMC_CHIP_ENABLE SDRV_SMC_SELECTIVE_PRECHARGE SDRV_SMC_RETENTION_1 SDRV_SMC_RETENTION_2 SDRV_SMC_POWER_DOWN

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_wakeup_interrupt_disable()

status_t sdrv_smc_wakeup_interrupt_disable	(	sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Disable wakeup interrupt for specific core.

This function disable interrupt to wakeup specific core in low power mode.

Parameters

[in]	core	core id
[in]	irq_num	irq number

Returns

SDRV_STATUS_OK or error code.

sdrv_smc_wakeup_interrupt_enable()

status_t sdrv_smc_wakeup_interrupt_enable	(	sdrv_smc_core_e	core,
		uint32_t	irq_num
	)

Enable wakeup interrupt for specific core.

This function enable interrupt to wakeup specific core in low power mode.

Parameters

[in]	core	core id
[in]	irq_num	irq number

Returns

SDRV_STATUS_OK or error code.