#include "../source/epwm/sdrv_epwm_reg.h"

Data Structures
struct	epwm_multi_cmp_val

struct	epwm_eid_val

struct	epwm_dual_duty_state

struct	epwm_fs_state

struct	epwm_dma_cfg

struct	pwm_status

struct	epwm_cmp_cfg

struct	sdrv_epwm

struct	sdrv_epwm_controller

Functions
uint32_t	sdrv_epwm_ns_to_val (uint32_t clk, uint32_t ns, uint32_t div)

uint32_t	sdrv_epwm_ns_to_val_1 (uint32_t clk, uint32_t ns, uint32_t div)

uint32_t	sdrv_epwm_val_to_ns (uint32_t clk, uint32_t val, uint32_t div)

void	sdrv_epwm_cmp_en (sdrv_epwm_t *dev, bool en)

void	sdrv_epwm_cnt_en (sdrv_epwm_t *dev, bool en)

void	sdrv_epwm_start (sdrv_epwm_t *dev)

void	sdrv_epwm_stop (sdrv_epwm_t *dev)

void	sdrv_epwm_cnt_ovf_upd (sdrv_epwm_t *dev, uint32_t period)

status_t	sdrv_epwm_cmp_val_upd (sdrv_epwm_t dev, const pwm_state_t state)

status_t	sdrv_epwm_config (sdrv_epwm_t dev, const pwm_state_t state)

uint8_t	sdrv_epwm_set_callback (sdrv_epwm_t *dev, pwm_callback_t callback)

status_t	sdrv_epwm_multi_cmp_mode (sdrv_epwm_t dev, pwm_state_t state, epwm_multi_cmp_val_t *multi_cmp)

void	sdrv_epwm_cnt_clr_cfg (sdrv_epwm_t *dev, sdrv_epwm_event_trigger_mode_e cnt_clr_trig_sel, sdrv_epwm_input_sel_trig_e clr_sel)

void	sdrv_epwm_cnt_ovf_upd_cfg (sdrv_epwm_t *dev, sdrv_epwm_cnt_cfg_set_upd_sel_e set_mode_sel, sdrv_epwm_event_trigger_mode_e cnt_set_trig_sel, sdrv_epwm_input_sel_trig_e set_sel)

void	sdrv_epwm_sw_trig (sdrv_epwm_t *dev, sdrv_epwm_sw_trig_ctrl_e trig)

void	sdrv_epwm_dti (sdrv_epwm_t dev, sdrv_epwm_cmp_prefin_pol_t prefin_pol, const uint32_t dti_val)

void	sdrv_epwm_sse (sdrv_epwm_t dev, sdrv_epwm_cmp_sse_ctrl_t sse_cfg, uint32_t sse_reg_val)

void	sdrv_epwm_mfc (sdrv_epwm_t *dev, uint8_t val)

void	sdrv_epwm_cmp_data_format (sdrv_epwm_t *dev, sdrv_epwm_chn_dma_ctrl_cmp_x_dat_format_e dat_format)

void	sdrv_epwm_cmp_dither (sdrv_epwm_t *dev, uint8_t clip_rslt, uint16_t init_offset)

void	sdrv_epwm_cmp_multi_chnl (sdrv_epwm_t *dev, bool full_en)

void	sdrv_epwm_ce_ctrl (sdrv_epwm_t *dev, bool src_sel)

void	sdrv_epwm_ce_dma_trig (sdrv_epwm_t *dev, uint8_t sel_trig)

void	sdrv_epwm_fault_flt (sdrv_epwm_t dev, sdrv_epwm_fault_flt_t flt_cfg)

void	sdrv_epwm_fault_event (sdrv_epwm_t dev, uint8_t fault_src, sdrv_epwm_cmp_fault_event_ctrl_t fault_cfg, epwm_fs_state_t *fs_state)

void	sdrv_epwm_fault_event_clr (sdrv_epwm_t *dev, uint8_t fault_src)

void	sdrv_epwm_cnt_ovf_dir_upd (sdrv_epwm_t *dev, uint32_t period_cnt)

void	sdrv_epwm_cmp_bcd_update (sdrv_epwm_t *dev, uint32_t left_point, uint32_t right_point)

void	sdrv_epwm_cmp_val_upd_bcd (sdrv_epwm_t *dev, uint32_t left_point, uint32_t right_point)

void	sdrv_epwm_cmp_val_upd_a (sdrv_epwm_t *dev, uint32_t trig_point)

void	sdrv_epwm_cmp_sw_rld (sdrv_epwm_t *dev)

void	sdrv_epwm_cmp_input (sdrv_epwm_t dev, sdrv_epwm_input_sel_t input_sel, uint8_t set_trig, uint8_t clr_trig)

void	sdrv_epwm_cmp_a_eid (sdrv_epwm_t dev, epwm_eid_val_t eid_val)

void	sdrv_epwm_init_sta (sdrv_epwm_t *dev, bool cmp0_init, bool cmp1_init)

void	sdrv_epwm_val_chnl_bcd_upd_split (sdrv_epwm_t *dev, sdrv_epwm_output_e subchnl, uint32_t left_point, uint32_t right_point)

void	sdrv_epwm_val_chnl_bcd_upd_split_both (sdrv_epwm_t *dev, uint32_t cmp0_left_point, uint32_t cmp0_right_point, uint32_t cmp1_left_point, uint32_t cmp1_right_point)

Detailed Description

Copyright: Copyright (c) 2022 Semidrive Semiconductor. @All rights reserved.

Macro Definition Documentation

◆ EPWM_BM_CHN_A_DMA_REQ

#define EPWM_BM_CHN_A_DMA_REQ (1 << EPWM_BM_INT_EN_CHN_A_DMA_REQ_SHIFT)

◆ EPWM_BM_CHN_B_DMA_REQ

#define EPWM_BM_CHN_B_DMA_REQ (1 << EPWM_BM_INT_EN_CHN_B_DMA_REQ_SHIFT)

◆ EPWM_BM_CHN_C_DMA_REQ

#define EPWM_BM_CHN_C_DMA_REQ (1 << EPWM_BM_INT_EN_CHN_C_DMA_REQ_SHIFT)

◆ EPWM_BM_CHN_D_DMA_REQ

#define EPWM_BM_CHN_D_DMA_REQ (1 << EPWM_BM_INT_EN_CHN_D_DMA_REQ_SHIFT)

◆ EPWM_BM_CMP_A

#define EPWM_BM_CMP_A (1 << EPWM_BM_INT_EN_CMP_A_SHIFT)

◆ EPWM_BM_CMP_A0_FAULT

#define EPWM_BM_CMP_A0_FAULT (1 << EPWM_BM_ERR_INT_STA_CMP_A0_FAULT_SHIFT)

◆ EPWM_BM_CMP_A_FAULT_EVENT

#define EPWM_BM_CMP_A_FAULT_EVENT (1 << EPWM_BM_ERR_INT_STA_CMP_A_FAULT_EVENT_SHIFT)

◆ EPWM_BM_CMP_A_REG_NO_UPD

#define EPWM_BM_CMP_A_REG_NO_UPD (1 << EPWM_BM_ERR_INT_STA_CMP_A_REG_NO_UPD_SHIFT)

◆ EPWM_BM_CMP_A_REG_UPD_TWICE

#define EPWM_BM_CMP_A_REG_UPD_TWICE (1 << EPWM_BM_ERR_INT_STA_CMP_A_REG_UPD_TWICE_SHIFT)

◆ EPWM_BM_CMP_B

#define EPWM_BM_CMP_B (1 << EPWM_BM_INT_EN_CMP_B_SHIFT)

◆ EPWM_BM_CMP_B0_FAULT

#define EPWM_BM_CMP_B0_FAULT (1 << EPWM_BM_ERR_INT_STA_CMP_B0_FAULT_SHIFT)

◆ EPWM_BM_CMP_B_FAULT_EVENT

#define EPWM_BM_CMP_B_FAULT_EVENT (1 << EPWM_BM_ERR_INT_STA_CMP_B_FAULT_EVENT_SHIFT)

◆ EPWM_BM_CMP_B_REG_NO_UPD

#define EPWM_BM_CMP_B_REG_NO_UPD (1 << EPWM_BM_ERR_INT_STA_CMP_B_REG_NO_UPD_SHIFT)

◆ EPWM_BM_CMP_B_REG_UPD_TWICE

#define EPWM_BM_CMP_B_REG_UPD_TWICE (1 << EPWM_BM_ERR_INT_STA_CMP_B_REG_UPD_TWICE_SHIFT)

◆ EPWM_BM_CMP_C

#define EPWM_BM_CMP_C (1 << EPWM_BM_INT_EN_CMP_C_SHIFT)

◆ EPWM_BM_CMP_C0_FAULT

#define EPWM_BM_CMP_C0_FAULT (1 << EPWM_BM_ERR_INT_STA_CMP_C0_FAULT_SHIFT)

◆ EPWM_BM_CMP_C_FAULT_EVENT

#define EPWM_BM_CMP_C_FAULT_EVENT (1 << EPWM_BM_ERR_INT_STA_CMP_C_FAULT_EVENT_SHIFT)

◆ EPWM_BM_CMP_C_REG_NO_UPD

#define EPWM_BM_CMP_C_REG_NO_UPD (1 << EPWM_BM_ERR_INT_STA_CMP_C_REG_NO_UPD_SHIFT)

◆ EPWM_BM_CMP_C_REG_UPD_TWICE

#define EPWM_BM_CMP_C_REG_UPD_TWICE (1 << EPWM_BM_ERR_INT_STA_CMP_C_REG_UPD_TWICE_SHIFT)

◆ EPWM_BM_CMP_D

#define EPWM_BM_CMP_D (1 << EPWM_BM_INT_EN_CMP_D_SHIFT)

◆ EPWM_BM_CMP_D0_FAULT

#define EPWM_BM_CMP_D0_FAULT (1 << EPWM_BM_ERR_INT_STA_CMP_D0_FAULT_SHIFT)

◆ EPWM_BM_CMP_D_FAULT_EVENT

#define EPWM_BM_CMP_D_FAULT_EVENT (1 << EPWM_BM_ERR_INT_STA_CMP_D_FAULT_EVENT_SHIFT)

◆ EPWM_BM_CMP_D_REG_NO_UPD

#define EPWM_BM_CMP_D_REG_NO_UPD (1 << EPWM_BM_ERR_INT_STA_CMP_D_REG_NO_UPD_SHIFT)

◆ EPWM_BM_CMP_D_REG_UPD_TWICE

#define EPWM_BM_CMP_D_REG_UPD_TWICE (1 << EPWM_BM_ERR_INT_STA_CMP_D_REG_UPD_TWICE_SHIFT)

◆ EPWM_BM_CNT_G0_OVF

#define EPWM_BM_CNT_G0_OVF (1 << EPWM_BM_INT_EN_CNT_G0_OVF_SHIFT)

◆ EPWM_BM_CNT_G1_OVF

#define EPWM_BM_CNT_G1_OVF (1 << EPWM_BM_INT_EN_CNT_G1_OVF_SHIFT)

◆ EPWM_BM_ERR_INT_STA_CMP_A0_FAULT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_A0_FAULT_SHIFT (8U)

◆ EPWM_BM_ERR_INT_STA_CMP_A_FAULT_EVENT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_A_FAULT_EVENT_SHIFT (12U)

◆ EPWM_BM_ERR_INT_STA_CMP_A_REG_NO_UPD_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_A_REG_NO_UPD_SHIFT (16U)

◆ EPWM_BM_ERR_INT_STA_CMP_A_REG_UPD_TWICE_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_A_REG_UPD_TWICE_SHIFT (20U)

◆ EPWM_BM_ERR_INT_STA_CMP_B0_FAULT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_B0_FAULT_SHIFT (9U)

◆ EPWM_BM_ERR_INT_STA_CMP_B_FAULT_EVENT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_B_FAULT_EVENT_SHIFT (13U)

◆ EPWM_BM_ERR_INT_STA_CMP_B_REG_NO_UPD_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_B_REG_NO_UPD_SHIFT (17U)

◆ EPWM_BM_ERR_INT_STA_CMP_B_REG_UPD_TWICE_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_B_REG_UPD_TWICE_SHIFT (21U)

◆ EPWM_BM_ERR_INT_STA_CMP_C0_FAULT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_C0_FAULT_SHIFT (10U)

◆ EPWM_BM_ERR_INT_STA_CMP_C_FAULT_EVENT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_C_FAULT_EVENT_SHIFT (14U)

◆ EPWM_BM_ERR_INT_STA_CMP_C_REG_NO_UPD_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_C_REG_NO_UPD_SHIFT (18U)

◆ EPWM_BM_ERR_INT_STA_CMP_C_REG_UPD_TWICE_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_C_REG_UPD_TWICE_SHIFT (22U)

◆ EPWM_BM_ERR_INT_STA_CMP_D0_FAULT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_D0_FAULT_SHIFT (11U)

◆ EPWM_BM_ERR_INT_STA_CMP_D_FAULT_EVENT_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_D_FAULT_EVENT_SHIFT (15U)

◆ EPWM_BM_ERR_INT_STA_CMP_D_REG_NO_UPD_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_D_REG_NO_UPD_SHIFT (19U)

◆ EPWM_BM_ERR_INT_STA_CMP_D_REG_UPD_TWICE_SHIFT

#define EPWM_BM_ERR_INT_STA_CMP_D_REG_UPD_TWICE_SHIFT (23U)

◆ EPWM_BM_ERR_INT_STA_FIFO_A_UNDERRUN_SHIFT

#define EPWM_BM_ERR_INT_STA_FIFO_A_UNDERRUN_SHIFT (0U)

◆ EPWM_BM_ERR_INT_STA_FIFO_B_UNDERRUN_SHIFT

#define EPWM_BM_ERR_INT_STA_FIFO_B_UNDERRUN_SHIFT (1U)

◆ EPWM_BM_ERR_INT_STA_FIFO_C_UNDERRUN_SHIFT

#define EPWM_BM_ERR_INT_STA_FIFO_C_UNDERRUN_SHIFT (2U)

◆ EPWM_BM_ERR_INT_STA_FIFO_D_UNDERRUN_SHIFT

#define EPWM_BM_ERR_INT_STA_FIFO_D_UNDERRUN_SHIFT (3U)

◆ EPWM_BM_FIFO_A_UNDERRUN

#define EPWM_BM_FIFO_A_UNDERRUN (1 << EPWM_BM_ERR_INT_STA_FIFO_A_UNDERRUN_SHIFT)

◆ EPWM_BM_FIFO_B_UNDERRUN

#define EPWM_BM_FIFO_B_UNDERRUN (1 << EPWM_BM_ERR_INT_STA_FIFO_B_UNDERRUN_SHIFT)

◆ EPWM_BM_FIFO_C_UNDERRUN

#define EPWM_BM_FIFO_C_UNDERRUN (1 << EPWM_BM_ERR_INT_STA_FIFO_C_UNDERRUN_SHIFT)

◆ EPWM_BM_FIFO_D_UNDERRUN

#define EPWM_BM_FIFO_D_UNDERRUN (1 << EPWM_BM_ERR_INT_STA_FIFO_D_UNDERRUN_SHIFT)

◆ EPWM_BM_INT_EN_CHN_A_DMA_REQ_SHIFT

#define EPWM_BM_INT_EN_CHN_A_DMA_REQ_SHIFT (20U)

◆ EPWM_BM_INT_EN_CHN_B_DMA_REQ_SHIFT

#define EPWM_BM_INT_EN_CHN_B_DMA_REQ_SHIFT (21U)

◆ EPWM_BM_INT_EN_CHN_C_DMA_REQ_SHIFT

#define EPWM_BM_INT_EN_CHN_C_DMA_REQ_SHIFT (22U)

◆ EPWM_BM_INT_EN_CHN_D_DMA_REQ_SHIFT

#define EPWM_BM_INT_EN_CHN_D_DMA_REQ_SHIFT (23U)

◆ EPWM_BM_INT_EN_CMP_A_SHIFT

#define EPWM_BM_INT_EN_CMP_A_SHIFT (0U)

◆ EPWM_BM_INT_EN_CMP_B_SHIFT

#define EPWM_BM_INT_EN_CMP_B_SHIFT (1U)

◆ EPWM_BM_INT_EN_CMP_C_SHIFT

#define EPWM_BM_INT_EN_CMP_C_SHIFT (2U)

◆ EPWM_BM_INT_EN_CMP_D_SHIFT

#define EPWM_BM_INT_EN_CMP_D_SHIFT (3U)

◆ EPWM_BM_INT_EN_CNT_G0_OVF_SHIFT

#define EPWM_BM_INT_EN_CNT_G0_OVF_SHIFT (4U)

◆ EPWM_BM_INT_EN_CNT_G1_OVF_SHIFT

#define EPWM_BM_INT_EN_CNT_G1_OVF_SHIFT (5U)

◆ EPWM_CNT_G0_OVF_OFFSET

#define EPWM_CNT_G0_OVF_OFFSET (0x104U)

◆ EPWM_CNT_G1_OVF_OFFSET

#define EPWM_CNT_G1_OVF_OFFSET (0x124U)

◆ EPWM_COR_ERR_INT_STA_EN

#define EPWM_COR_ERR_INT_STA_EN (0xf << 0 | 0xffff << 8)

◆ EPWM_FIFO_A_OFFSET

#define EPWM_FIFO_A_OFFSET (0xc0U)

◆ EPWM_FIFO_B_OFFSET

#define EPWM_FIFO_B_OFFSET (0xc4U)

◆ EPWM_FIFO_C_OFFSET

#define EPWM_FIFO_C_OFFSET (0xc8U)

◆ EPWM_FIFO_D_OFFSET

#define EPWM_FIFO_D_OFFSET (0xccU)

◆ EPWM_INT_STA_EN

#define EPWM_INT_STA_EN (0x3f << 0 | 0xf << 20)

◆ EPWM_SOURCE_CLK

#define EPWM_SOURCE_CLK 250

◆ EPWM_UNC_ERR_INT_STA_EN

#define EPWM_UNC_ERR_INT_STA_EN (0xf << 0 | 0xffff << 8)

Typedef Documentation

◆ epwm_cfg_ctrl_dma_trig_sel_e

typedef enum epwm_cfg_ctrl_dma_trig_sel epwm_cfg_ctrl_dma_trig_sel_e

epwm_cfg_ctrl_dma_trig_sel.

◆ epwm_cmp_cfg_con_mode_e

typedef enum epwm_cmp_cfg_con_mode epwm_cmp_cfg_con_mode_e

epwm_cmp_cfg_con_mode.

◆ epwm_cmp_cfg_t

typedef struct epwm_cmp_cfg epwm_cmp_cfg_t

epwm_cmp_cfg.

◆ epwm_cmp_out_mode_e

typedef enum epwm_cmp_out_mode epwm_cmp_out_mode_e

epwm_cmp_out_mode.

◆ epwm_dma_cfg_t

typedef struct epwm_dma_cfg epwm_dma_cfg_t

epwm_dma_cfg.

◆ epwm_dual_duty_state_t

typedef struct epwm_dual_duty_state epwm_dual_duty_state_t

epwm_dual_duty_state.

◆ epwm_eid_val_t

typedef struct epwm_eid_val epwm_eid_val_t

epwm_eid_val.

◆ epwm_fs_state_t

typedef struct epwm_fs_state epwm_fs_state_t

epwm_fs_sta.

◆ epwm_multi_cmp_val_t

typedef struct epwm_multi_cmp_val epwm_multi_cmp_val_t

epwm_cmpxx_val NS.

◆ pwm_callback_t

typedef void(* pwm_callback_t) (void *arg, uint32_t irq_status)

◆ pwm_state_t

typedef struct pwm_status pwm_state_t

pwm_status.

◆ sdrv_epwm_controller_t

typedef struct sdrv_epwm_controller sdrv_epwm_controller_t

◆ sdrv_epwm_t

typedef struct sdrv_epwm sdrv_epwm_t

ePWM controller.

Enumeration Type Documentation

◆ epwm_cfg_ctrl_dma_trig_sel

enum epwm_cfg_ctrl_dma_trig_sel

epwm_cfg_ctrl_dma_trig_sel.

Enumerator
EPWM_CMP_A_CE
EPWM_CMP_B_CE
EPWM_CMP_C_CE
EPWM_CMP_D_CE
EPWM_CNT_G0_CE
EPWM_CNT_G1_CE

◆ epwm_cmp_cfg_con_mode

enum epwm_cmp_cfg_con_mode

epwm_cmp_cfg_con_mode.

Enumerator
EPWM_CONSECUTIVE_MODE
EPWM_ONLY_EXECUTE_ONE_TIME

◆ epwm_cmp_out_mode

enum epwm_cmp_out_mode

epwm_cmp_out_mode.

Enumerator
EPWM_ONLY_COMP0_OUTPUT
EPWM_BOTH_COMP0_AND_COMP1_OUTPUT

Function Documentation

◆ sdrv_epwm_ce_ctrl()

void sdrv_epwm_ce_ctrl	(	sdrv_epwm_t *	dev,
		bool	src_sel
	)

configure compare event/cnt overflow event

This function configure compare event or counter event

Parameters

[in]	dev	pwm common instance
[in]	src_sel	choose cmp or cnt trigger source

◆ sdrv_epwm_ce_dma_trig()

void sdrv_epwm_ce_dma_trig	(	sdrv_epwm_t *	dev,
		uint8_t	sel_trig
	)

configure dma request except fifo wml trig

This function configure pwm trig dma tranferrs with ce

Parameters

[in]	dev	pwm common instance
[in]	sel_trig	sellect trigger source

◆ sdrv_epwm_cmp_a_eid()

void sdrv_epwm_cmp_a_eid	(	sdrv_epwm_t *	dev,
		epwm_eid_val_t *	eid_val
	)

configure compare a event id

This function configure cmpa0 event id

Parameters

[in]	dev	pwm common instance
[in]	eid_val	cmp00/01/10/11 eid

◆ sdrv_epwm_cmp_bcd_update()

void sdrv_epwm_cmp_bcd_update	(	sdrv_epwm_t *	dev,
		uint32_t	left_point,
		uint32_t	right_point
	)

upload chnl_b/c/d compare value with dual mode 100% duty check(unit is cnt val)

This function upload channel_b/c/d value with 100% over two period

Parameters

[in]	dev	pwm common instance
[in]	left_point	dual mode left cmp_val
[in]	right_point	dual mode right cmp_val

◆ sdrv_epwm_cmp_data_format()

void sdrv_epwm_cmp_data_format	(	sdrv_epwm_t *	dev,
		sdrv_epwm_chn_dma_ctrl_cmp_x_dat_format_e	dat_format
	)

configure compare data format

This function configure compare data format, such as 8bit or 16bit.

Parameters

[in]	dev	pwm common instance
[in]	dat_format	cmp data formate

◆ sdrv_epwm_cmp_dither()

void sdrv_epwm_cmp_dither	(	sdrv_epwm_t *	dev,
		uint8_t	clip_rslt,
		uint16_t	init_offset
	)

configure compare dither mode

This function configure compare dither mode

Parameters

[in]	dev	pwm common instance
[in]	clip_rslt	dither clip_rslt val
[in]	init_offset	dither init_offset val

◆ sdrv_epwm_cmp_en()

void sdrv_epwm_cmp_en	(	sdrv_epwm_t *	dev,
		bool	en
	)

compare channel enable.

This function enable compare channel

Parameters

[in] dev pwm common instance

◆ sdrv_epwm_cmp_input()

void sdrv_epwm_cmp_input	(	sdrv_epwm_t *	dev,
		sdrv_epwm_input_sel_t *	input_sel,
		uint8_t	set_trig,
		uint8_t	clr_trig
	)

compare clr/set configure

This function configure compare clear/set source

Parameters

[in]	dev	pwm common instance
[in]	input_sel	input sellect
[in]	set_trig	cmp set trigger sel
[in]	clr_trig	cmp clr trigger sel

◆ sdrv_epwm_cmp_multi_chnl()

void sdrv_epwm_cmp_multi_chnl	(	sdrv_epwm_t *	dev,
		bool	full_en
	)

configure compare multi channels

This function configure compare value of multi channels

Parameters

[in]	dev	pwm common instance
[in]	full_en	full channels enable

◆ sdrv_epwm_cmp_sw_rld()

void sdrv_epwm_cmp_sw_rld ( sdrv_epwm_t * dev )

compare software reload

This function set compare value valid immediately

Parameters

[in] dev pwm common instance

◆ sdrv_epwm_cmp_val_upd()

status_t sdrv_epwm_cmp_val_upd	(	sdrv_epwm_t *	dev,
		const pwm_state_t *	state
	)

compare value upload

This function upload compare value

Parameters

[in]	dev	pwm common instance
[in]	state	pwm duty and period

◆ sdrv_epwm_cmp_val_upd_a()

void sdrv_epwm_cmp_val_upd_a	(	sdrv_epwm_t *	dev,
		uint32_t	trig_point
	)

compare value chnl_a upload (unit is cnt val)

This function upload channel a value

Parameters

[in]	dev	pwm common instance
[in]	trig_point	set trig point to tmux

◆ sdrv_epwm_cmp_val_upd_bcd()

void sdrv_epwm_cmp_val_upd_bcd	(	sdrv_epwm_t *	dev,
		uint32_t	left_point,
		uint32_t	right_point
	)

compare value chnl_b/c/d upload (unit is cnt val)

This function upload compare value in dual mode

Parameters

[in]	dev	pwm common instance
[in]	left_point	dual mode left cmp_val
[in]	right_point	dual mode right cmp_val

◆ sdrv_epwm_cnt_clr_cfg()

void sdrv_epwm_cnt_clr_cfg	(	sdrv_epwm_t *	dev,
		sdrv_epwm_event_trigger_mode_e	cnt_clr_trig_sel,
		sdrv_epwm_input_sel_trig_e	clr_sel
	)

configure epwm counter clear

This function configure counter clear

Parameters

[in]	dev	pwm common instance
[in]	cnt_clr_trig_sel	sellect cnt_clr_trig_polarity
[in]	clr_sel	input_clr_sel_trig

◆ sdrv_epwm_cnt_en()

void sdrv_epwm_cnt_en	(	sdrv_epwm_t *	dev,
		bool	en
	)

counter enable.

This function enable CNTG0 or CNT_G1

Parameters

[in] dev pwm common instance

◆ sdrv_epwm_cnt_ovf_dir_upd()

void sdrv_epwm_cnt_ovf_dir_upd	(	sdrv_epwm_t *	dev,
		uint32_t	period_cnt
	)

cnt overflow value upload directly (unit is cnt val)

This function configure counter overflow upload

Parameters

[in]	dev	pwm common instance
[in]	period_cnt	counter overflow value

◆ sdrv_epwm_cnt_ovf_upd()

void sdrv_epwm_cnt_ovf_upd	(	sdrv_epwm_t *	dev,
		uint32_t	period
	)

cnt overflow value upload (unit is ns)

This function upload counter overflow value

Parameters

[in]	dev	pwm common instance
[in]	period	cnt overflow value

◆ sdrv_epwm_cnt_ovf_upd_cfg()

void sdrv_epwm_cnt_ovf_upd_cfg	(	sdrv_epwm_t *	dev,
		sdrv_epwm_cnt_cfg_set_upd_sel_e	set_mode_sel,
		sdrv_epwm_event_trigger_mode_e	cnt_set_trig_sel,
		sdrv_epwm_input_sel_trig_e	set_sel
	)

configure epwm counter overflow upload cfg

This function configure counter overflow upload

Parameters

[in]	dev	pwm common instance
[in]	set_mode_sel	sellect set_mode
[in]	cnt_set_trig_sel	sellect cnt_set_trig_polarity
[in]	set_sel	input_set_sel_trig

◆ sdrv_epwm_config()

status_t sdrv_epwm_config	(	sdrv_epwm_t *	dev,
		const pwm_state_t *	state
	)

ePWM channel config.

This function configure epwm

Parameters

[in]	dev	pwm common instance
[in]	state	pwm duty and period

◆ sdrv_epwm_dti()

void sdrv_epwm_dti	(	sdrv_epwm_t *	dev,
		sdrv_epwm_cmp_prefin_pol_t *	prefin_pol,
		const uint32_t	dti_val
	)

configure epwm death time

This function configure compare death time

Parameters

[in]	dev	pwm common instance
[in]	prefin_pol	prefinial polarity
[in]	dti_val	death time value

◆ sdrv_epwm_fault_event()

void sdrv_epwm_fault_event	(	sdrv_epwm_t *	dev,
		uint8_t	fault_src,
		sdrv_epwm_cmp_fault_event_ctrl_t *	fault_cfg,
		epwm_fs_state_t *	fs_state
	)

configure input fault event

This function configure compare fault event

Parameters

[in]	dev	pwm common instance
[in]	fault_src	config which fault source to trigger
[in]	fault_cfg	config fault event
[in]	fs_state	cmp failsafe status

◆ sdrv_epwm_fault_event_clr()

void sdrv_epwm_fault_event_clr	(	sdrv_epwm_t *	dev,
		uint8_t	fault_src
	)

input fault event clr

This function clear fault status in sticky mode

Parameters

[in]	dev	pwm common instance
[in]	fault_src	config which fault source to trigger

◆ sdrv_epwm_fault_flt()

void sdrv_epwm_fault_flt	(	sdrv_epwm_t *	dev,
		sdrv_epwm_fault_flt_t *	flt_cfg
	)

filter input fault source signals

This function configure fault event source

Parameters

[in]	dev	pwm common instance
[in]	flt_cfg	config filter

◆ sdrv_epwm_init_sta()

void sdrv_epwm_init_sta	(	sdrv_epwm_t *	dev,
		bool	cmp0_init,
		bool	cmp1_init
	)

epwm initial status.

This function configure compare initial value

Parameters

[in]	dev	pwm common instance
[in]	cmp0_init	cmp0 channel init status
[in]	cmp1_init	cmp1 channel init status

◆ sdrv_epwm_mfc()

void sdrv_epwm_mfc	(	sdrv_epwm_t *	dev,
		uint8_t	val
	)

configure modulation frequency control

This function configure compare mfc mode

Parameters

[in]	dev	pwm common instance
[in]	val	mfc up times to 2^val times

◆ sdrv_epwm_multi_cmp_mode()

status_t sdrv_epwm_multi_cmp_mode	(	sdrv_epwm_t *	dev,
		pwm_state_t *	state,
		epwm_multi_cmp_val_t *	multi_cmp
	)

configure multi compare mode

This function configure multi compare value

Parameters

[in]	dev	pwm common instance
[in]	state	pwm duty and period
[in]	multi	cmp00/01/10/11 val

◆ sdrv_epwm_ns_to_val()

uint32_t sdrv_epwm_ns_to_val	(	uint32_t	clk,
		uint32_t	ns,
		uint32_t	div
	)

sdrv epwm ns transfer to val.

Parameters

[in]	clk	src clk
[in]	ns	time val
[in]	div	src clk divider

Returns: ns_to_val

◆ sdrv_epwm_ns_to_val_1()

uint32_t sdrv_epwm_ns_to_val_1	(	uint32_t	clk,
		uint32_t	ns,
		uint32_t	div
	)

sdrv epwm ns transfer to val and minus 1.

Parameters

[in]	clk	src clk
[in]	ns	time val
[in]	div	src clk divider

Returns: ns_to_val_minus_1

◆ sdrv_epwm_set_callback()

uint8_t sdrv_epwm_set_callback	(	sdrv_epwm_t *	dev,
		pwm_callback_t	callback
	)

epwm setup callback function

Parameters

[in]	dev	epwm ctrl instance
[in]	callback	user callback function

Returns: succeed:0 fail:other

◆ sdrv_epwm_sse()

void sdrv_epwm_sse	(	sdrv_epwm_t *	dev,
		sdrv_epwm_cmp_sse_ctrl_t *	sse_cfg,
		uint32_t	sse_reg_val
	)

configure sse epwm output

This function configure compare sse mode

Parameters

[in]	dev	pwm common instance
[in]	sse_cfg	sse_mode and edge sellect
[in]	sse_reg_val	sse register value

◆ sdrv_epwm_start()

void sdrv_epwm_start ( sdrv_epwm_t * dev )

Start ePWM channel output.

This function start pwm output

Parameters

[in] dev pwm common instance

◆ sdrv_epwm_stop()

void sdrv_epwm_stop ( sdrv_epwm_t * dev )

Stop ePWM channel output.

This function stop pwm output

Parameters

[in] dev pwm common instance

◆ sdrv_epwm_sw_trig()

void sdrv_epwm_sw_trig	(	sdrv_epwm_t *	dev,
		sdrv_epwm_sw_trig_ctrl_e	trig
	)

software trigger

This function configure software trigger, such as pulse.

Parameters

[in]	dev	pwm common instance
[in]	tirg	sellect trigger mode

◆ sdrv_epwm_val_chnl_bcd_upd_split()

void sdrv_epwm_val_chnl_bcd_upd_split	(	sdrv_epwm_t *	dev,
		sdrv_epwm_output_e	subchnl,
		uint32_t	left_point,
		uint32_t	right_point
	)

epwm upload chnl_b/c/d [X]0/1 compare value

Parameters

[in]	dev	pwm common instance
[in]	subchnl	choose cmp0 or cmp1
[in]	left_point	dual mode left cmp_val
[in]	right_point	dual mode right cmp_val

◆ sdrv_epwm_val_chnl_bcd_upd_split_both()

void sdrv_epwm_val_chnl_bcd_upd_split_both	(	sdrv_epwm_t *	dev,
		uint32_t	cmp0_left_point,
		uint32_t	cmp0_right_point,
		uint32_t	cmp1_left_point,
		uint32_t	cmp1_right_point
	)

epwm upload chnl_b/c/d [X]0/1 compare value

Parameters

[in]	dev	pwm common instance
[in]	cmp0_left_point	cmp0 dual mode left cmp_val
[in]	cmp0_right_point	cmp0 dual mode right cmp_val
[in]	cmp1_left_point	cmp1 dual mode left cmp_val
[in]	cmp1_right_point	cmp1 dual mode right cmp_val

◆ sdrv_epwm_val_to_ns()

uint32_t sdrv_epwm_val_to_ns	(	uint32_t	clk,
		uint32_t	val,
		uint32_t	div
	)

sdrv epwm val transfer to ns.

Parameters

[in]	clk	src clk
[in]	cnt	time val
[in]	div	src clk divider

Returns: val_to_ns

Data Structures

Functions

Detailed Description

Macro Definition Documentation

◆ EPWM_BM_CHN_A_DMA_REQ

◆ EPWM_BM_CHN_B_DMA_REQ

◆ EPWM_BM_CHN_C_DMA_REQ

◆ EPWM_BM_CHN_D_DMA_REQ

◆ EPWM_BM_CMP_A

◆ EPWM_BM_CMP_A0_FAULT

◆ EPWM_BM_CMP_A_FAULT_EVENT

◆ EPWM_BM_CMP_A_REG_NO_UPD

◆ EPWM_BM_CMP_A_REG_UPD_TWICE

◆ EPWM_BM_CMP_B

◆ EPWM_BM_CMP_B0_FAULT

◆ EPWM_BM_CMP_B_FAULT_EVENT

◆ EPWM_BM_CMP_B_REG_NO_UPD

◆ EPWM_BM_CMP_B_REG_UPD_TWICE

◆ EPWM_BM_CMP_C

◆ EPWM_BM_CMP_C0_FAULT

◆ EPWM_BM_CMP_C_FAULT_EVENT

◆ EPWM_BM_CMP_C_REG_NO_UPD

◆ EPWM_BM_CMP_C_REG_UPD_TWICE

◆ EPWM_BM_CMP_D

◆ EPWM_BM_CMP_D0_FAULT

◆ EPWM_BM_CMP_D_FAULT_EVENT

◆ EPWM_BM_CMP_D_REG_NO_UPD

◆ EPWM_BM_CMP_D_REG_UPD_TWICE

◆ EPWM_BM_CNT_G0_OVF

◆ EPWM_BM_CNT_G1_OVF

◆ EPWM_BM_ERR_INT_STA_CMP_A0_FAULT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_A_FAULT_EVENT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_A_REG_NO_UPD_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_A_REG_UPD_TWICE_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_B0_FAULT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_B_FAULT_EVENT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_B_REG_NO_UPD_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_B_REG_UPD_TWICE_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_C0_FAULT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_C_FAULT_EVENT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_C_REG_NO_UPD_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_C_REG_UPD_TWICE_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_D0_FAULT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_D_FAULT_EVENT_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_D_REG_NO_UPD_SHIFT

◆ EPWM_BM_ERR_INT_STA_CMP_D_REG_UPD_TWICE_SHIFT

◆ EPWM_BM_ERR_INT_STA_FIFO_A_UNDERRUN_SHIFT

◆ EPWM_BM_ERR_INT_STA_FIFO_B_UNDERRUN_SHIFT

◆ EPWM_BM_ERR_INT_STA_FIFO_C_UNDERRUN_SHIFT

◆ EPWM_BM_ERR_INT_STA_FIFO_D_UNDERRUN_SHIFT

◆ EPWM_BM_FIFO_A_UNDERRUN

◆ EPWM_BM_FIFO_B_UNDERRUN

◆ EPWM_BM_FIFO_C_UNDERRUN

◆ EPWM_BM_FIFO_D_UNDERRUN

◆ EPWM_BM_INT_EN_CHN_A_DMA_REQ_SHIFT

◆ EPWM_BM_INT_EN_CHN_B_DMA_REQ_SHIFT

◆ EPWM_BM_INT_EN_CHN_C_DMA_REQ_SHIFT

◆ EPWM_BM_INT_EN_CHN_D_DMA_REQ_SHIFT

◆ EPWM_BM_INT_EN_CMP_A_SHIFT

◆ EPWM_BM_INT_EN_CMP_B_SHIFT

◆ EPWM_BM_INT_EN_CMP_C_SHIFT

◆ EPWM_BM_INT_EN_CMP_D_SHIFT

◆ EPWM_BM_INT_EN_CNT_G0_OVF_SHIFT

◆ EPWM_BM_INT_EN_CNT_G1_OVF_SHIFT

◆ EPWM_CNT_G0_OVF_OFFSET

◆ EPWM_CNT_G1_OVF_OFFSET

◆ EPWM_COR_ERR_INT_STA_EN

◆ EPWM_FIFO_A_OFFSET

◆ EPWM_FIFO_B_OFFSET

◆ EPWM_FIFO_C_OFFSET

◆ EPWM_FIFO_D_OFFSET

◆ EPWM_INT_STA_EN

◆ EPWM_SOURCE_CLK

◆ EPWM_UNC_ERR_INT_STA_EN

Typedef Documentation

◆ epwm_cfg_ctrl_dma_trig_sel_e

◆ epwm_cmp_cfg_con_mode_e

◆ epwm_cmp_cfg_t

◆ epwm_cmp_out_mode_e

◆ epwm_dma_cfg_t