Files
E3_boot/wdt_refresh.c
2025-08-22 09:29:06 +08:00

116 lines
2.9 KiB
C

#include <sdrv_btm.h>
#include <regs_base.h>
#include <irq_num.h>
#include <debug.h>
#include <wdt_refresh.h>
#include <sdrv_rstgen.h>
#include <sdrv_gpio.h>
#include <udelay/udelay.h>
#include <reset_ip.h>
#include <sdrv_xspi.h>
#include "IAP_Task.h"
#include <armv7-r/cache.h>
void reboot_global(sdrv_rom_ctrl_boot_mode_e boot_mode)
{
uint32_t glb_status = sdrv_rstgen_global_status(&rstctl_glb);
ssdk_printf(SSDK_INFO,"global status: 0x%x \r\n", glb_status);
#if CONFIG_E3L
if (glb_status & (1 << 6u)) {
#else
if (glb_status & (1 << 11u | 1 << 31u)) {
#endif
ssdk_printf(SSDK_INFO, "SSDK E3 Global Reset Demo Success!\r\n");
}
/* clear global reset status */
sdrv_rstgen_global_status_clear(&rstctl_glb);
/* set boot pin mode */
ssdk_printf(SSDK_INFO,"set boot pin mode: %d \r\n", boot_mode);
sdrv_rom_ctrl_set_boot_pin_flag(boot_mode);
/* soft reset flash */
flash.sw_rst = true;
sdrv_spi_nor_deinit(&flash);
/* soft reset xspi host */
sdrv_spi_nor_drv_deinit(&flash);
/* wait 3 seconds */
udelay(100000);
/* clear sf boot status */
sdrv_rstgen_write_general(&reset_general_reg_sf_boot, 0);
/* Only for norflash, update rom ctrl data */
#ifndef CONFIG_HYPERBUS_MODE
/* 重要!!! 此处仅适用于norflash没有被初始化 (sdrv_xspi_init) 的流程,
此时sfs文件中对flash模式的描述是准确的, 可以依据sfs文件将flash模式
通知rom来完成重启。
但是如果工程中初始化了flash, 则必须调用sdrv_spi_nor_drv_deinit,
将xspi host deinit之后再global reset, 此处不再适用! */
sdrv_rom_ctrl_data_update();
#endif
ssdk_printf(SSDK_INFO,"reset!: %d \r\n", boot_mode);
// arch_invalidate_cache_range(0x01978000,0x8000);//清除 dcache
/* global reset */
sdrv_rstgen_global_reset(&rstctl_glb);
}
void External_wdt_refresh(void)
{
// sdrv_wdt_refresh(wdt_type);//喂狗
sdrv_gpio_toggle_pin_output_level(WDTGPIO);
}
sdrv_wdt_t *wdt_type = (sdrv_wdt_t *)APB_WDT1_BASE;
static bool internal_reset_switch = true;
static bool external_reset_switch = false;
//看门狗初始化
void wdt_init(uint32_t timeoutms)
{
static sdrv_wdt_config_t wdt_cfg;
int ret = 0;
//--------------------------------------------------
sdrv_wdt_get_default_config(&wdt_cfg);
if (internal_reset_switch) {
wdt_cfg.int_rst.reset_en = true;
sdrv_rstgen_wdt_reset_enable(RESET_WDT1, true);
}
if (external_reset_switch) {
/* config GPIO_H12 as WDT1_RST_N function */
wdt_cfg.ext_rst.reset_en = true;
wdt_cfg.ext_rst.reset_mode = 0; /* low level active */
}
ret = sdrv_wdt_init(wdt_type, &wdt_cfg);
ASSERT(ret == 0);
// irq_attach(wdt_irq, wdt_irq_handler, NULL);
// irq_enable(wdt_irq);
sdrv_wdt_set_timeout(wdt_type, timeoutms);
ret = sdrv_wdt_enable(wdt_type);
}