第一次上传E3boot
This commit is contained in:
9
.gitignore
vendored
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9
.gitignore
vendored
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# 忽略整个目录及其所有子文件和子目录
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/configs/
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/IAR/
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/IAR_Norflash/
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/SES/
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/configs/**
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/IAR/**
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/IAR_Norflash/**
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/SES/**
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5
.vscode/settings.json
vendored
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5
.vscode/settings.json
vendored
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{
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"files.associations": {
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"ADC.C": "cpp"
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}
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}
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420
24c02.c
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420
24c02.c
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#include <sdrv_gpio.h>
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#include <udelay/udelay.h>
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#include <debug.h>
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#include "sdrv_spi.h"
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#include "irq_num.h"
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#include "clock_ip.h"
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#include "IAP_Task.h"
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#define _nop_() udelay(1);
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#define somenop {_nop_();_nop_();_nop_();_nop_();_nop_();}
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#define bit bool
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#define MASTER_TEST_LEN 100//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><E0B7A2>100<30><30><EFBFBD>ֽڵ<D6BD><DAB5><EFBFBD><EFBFBD><EFBFBD>
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static uint8_t m_rx_buf_u8[MASTER_TEST_LEN] __attribute__((__aligned__(32)));
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static uint8_t m_tx_buf_u8[MASTER_TEST_LEN] __attribute__((__aligned__(32)));
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static struct sdrv_spi g_master;
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void iic_start(void);
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void iic_stop(void);
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void iic_ack(bit ackbit);
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void iic_sendbyte(unsigned char byt);
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void wrbyte_24c02(unsigned int add,unsigned char dat);
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void delay(unsigned char t);
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bit iic_waitack(void);
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unsigned char i2c_recbyte(void);
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unsigned char rdbyte_24c02(unsigned int add);
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unsigned char wrEE_CRC_Bak(unsigned char add,unsigned char *eeData,unsigned char len,unsigned char addbak);
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unsigned char rdEE_CRC_Bak(unsigned char add,unsigned char *eeData,unsigned char len,unsigned char addbak);
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////FM25CL64ָ<34><EFBFBD><EEB6A8>
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#define FM25CL64_WREN 0x06 //ʹ<><CAB9>
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#define FM25CL64_WRDI 0x04 //ʧ<><CAA7>
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#define FM25CL64_RDSR 0x05 //<2F><>״̬
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#define FM25CL64_WRSR 0x01 //д״̬
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#define FM25CL64_READ 0x03 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define FM25CL64_WRITE 0x02 //д<><D0B4><EFBFBD><EFBFBD>
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#define MAX_FM25CL64_LEN 8192//8k<38>ֽ<EFBFBD>
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static const struct spi_device_config device_mode0_8bits_ss0 = {
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.sclk_freq = 1000000,
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.cpol = SCK_IDLE_LOW,
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.cpha = DATA_CPT_ON_FIRST_SCK_EDGE,
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.cs_pol = CS_ACTIVE_LOW,
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.cs_sel = CS_SEL_SS0,
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.width = SPI_DATA_WIDTH_BYTE,
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.fream_delay = 0,
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.clk2cs_delay = 0,
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.clk2cs_end_delay = 0,
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.is_lsb_mode = false,
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};
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static struct spi_common_config spi_master = {
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.is_spi_mode = true,
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.is_half_mode = false,
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.is_master = true,
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.base = APB_SPI6_BASE,
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.irq = SPI6_SPI_INTR_NUM,
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#if CONFIG_E3
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.clk = &g_ckgen_ip_spi_sf_1_to_4,
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#else
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.clk = &g_ckgen_ip_spi_sf_1_to_3,
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#endif
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};
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void initSpi()
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{
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/* Init Spi Instance */
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sdrv_spi_init(&g_master, &spi_master);
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sdrv_spi_config_device(&g_master, &device_mode0_8bits_ss0);
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}
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void SDAOut(bit c)
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{
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// sdrv_pinctrl_set_input_select(GPIO_Y3, PIN_IS_CMOS);
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// sdrv_gpio_set_pin_direction(GPIO_Y3, GPIO_DIR_OUT);
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sdrv_gpio_set_pin_output_level(GPIO_Y3, c);
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}
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void SCLOut(bit c)
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{
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sdrv_gpio_set_pin_output_level(GPIO_Y2, c);
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}
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void iic_start(void)
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{
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SDAOut(1);
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_nop_();
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SCLOut(1);
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somenop;
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SDAOut(0);
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somenop;
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SCLOut(0);
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}
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void iic_stop(void)
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{
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SDAOut(0);
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_nop_();
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SCLOut(1);
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somenop;
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SDAOut(1);
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}
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void iic_ack(bit ackbit)
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{
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if(ackbit)
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SDAOut(0);
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else
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SDAOut(1);
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somenop;
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SCLOut(1);
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somenop;
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SCLOut(0);
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SDAOut(1);
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somenop;
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}
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bit iic_waitack(void)
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{
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SDAOut(1);
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somenop;
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SCLOut(1);
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// sdrv_pinctrl_set_input_select(GPIO_Y3, PIN_IS_CMOS_SCHMITT);
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// sdrv_gpio_set_pin_direction(GPIO_Y3, GPIO_DIR_IN);
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somenop;
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if(sdrv_gpio_read_pin_input_level(GPIO_Y3))
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{
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SCLOut(0);
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iic_stop();
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return 0;
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}
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else
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{
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SCLOut(0);
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return 1;
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}
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}
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void iic_sendbyte(unsigned char byt)
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{
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unsigned char i;
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for(i=0;i<8;i++)
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{
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if(byt&0x80)
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SDAOut(1);
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else
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SDAOut(0);
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somenop;
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SCLOut(1);
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byt <<= 1;
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somenop;
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SCLOut(0);
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}
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}
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unsigned char iic_recbyte(void)
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{
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unsigned char da;
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unsigned char i;
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for(i=0;i<8;i++)
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{
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SCLOut(1);
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// sdrv_pinctrl_set_input_select(GPIO_Y3, PIN_IS_CMOS_SCHMITT);
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// sdrv_gpio_set_pin_direction(GPIO_Y3, GPIO_DIR_IN);
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somenop;
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da <<= 1;
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// P1_IOCR01 = 0x0020; // load port control register 1
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if(sdrv_gpio_read_pin_input_level(GPIO_Y3))
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da |= 0x01;
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SCLOut(0);
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somenop;
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}
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return da;
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}
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void wrbyte_24c02(unsigned int add,unsigned char dat)
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{
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#if EN_24C02
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unsigned char eeprom_page = 0;
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unsigned char eeprom_add = 0;
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unsigned char device_add = 0;
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//-------------------------------------------------
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eeprom_page = add/256;//ҳ
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eeprom_add = add%256;
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if(eeprom_page >= 3)//ĿǰE2һ<32><D2BB>4ҳ<34><D2B3>1k
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{
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eeprom_page = 3;
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}
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// Device Address 1100 0 p1 p0 R/W
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device_add = (0xa0 | (eeprom_page << 1));//
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// ssdk_printf(SSDK_CRIT, "eeprom_page:0x%x\r\n", eeprom_page);
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// ssdk_printf(SSDK_CRIT, "eeprom_add:0x%x\r\n", eeprom_add);
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// ssdk_printf(SSDK_CRIT, "device_add:0x%x\r\n", device_add);
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iic_start();
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iic_sendbyte(device_add);
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iic_waitack();
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iic_sendbyte(eeprom_add);
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iic_waitack();
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iic_sendbyte(dat);
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iic_waitack();
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iic_stop();
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udelay(3000);//<2F><>ʱ3ms д<>궼<EFBFBD><EAB6BC>Ҫ<EFBFBD><D2AA>ʱ
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#else
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if(add >= MAX_FM25CL64_LEN)//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
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{
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printf("E2 len error!\r\n");
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}
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else
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{
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m_tx_buf_u8[0] = FM25CL64_WREN;//дʹ<D0B4><CAB9>
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if (sdrv_spi_sync_transmit(&g_master, m_tx_buf_u8, m_rx_buf_u8,1,1))
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{
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printf("E2 write Failed!\r\n");
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}
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m_tx_buf_u8[0] = FM25CL64_WRITE;//д<><D0B4><EFBFBD><EFBFBD>
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m_tx_buf_u8[1] = (uint8_t)( add >> 8);// <20><>8λ<38><CEBB>ַ
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m_tx_buf_u8[2] = (uint8_t)( add );//
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m_tx_buf_u8[3] = dat;//
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if (sdrv_spi_sync_transmit(&g_master, m_tx_buf_u8, m_rx_buf_u8,4,4))
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{
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printf("E2 write Failed!\r\n");
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}
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}
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#endif
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}
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unsigned char rdbyte_24c02(unsigned int add)
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{
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#if EN_24C02
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unsigned char eeprom_page = 0;
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unsigned char eeprom_add = 0;
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unsigned char device_add = 0;
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unsigned char da;
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//-------------------------------------------------
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eeprom_page = add/256;//ҳ
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eeprom_add = add%256;
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if(eeprom_page >= 3)//ĿǰE2һ<32><D2BB>4ҳ<34><D2B3>1k
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{
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eeprom_page = 3;
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}
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// Device Address 1100 000 R/W
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iic_start();
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device_add = (0xa0 | (eeprom_page << 1));// αд<CEB1><D0B4><EFBFBD><EFBFBD>
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iic_sendbyte(device_add);
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iic_waitack();
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iic_sendbyte(eeprom_add);
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iic_waitack();
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iic_start();
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device_add = (0xa1 | (eeprom_page << 1));//
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ssdk_printf(SSDK_CRIT, "device_add:0x%x\r\n", device_add);
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iic_sendbyte(device_add);
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iic_waitack();
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da = iic_recbyte();
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iic_ack(0);
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iic_stop();
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//CAN_sendAck(add, da);
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return da;
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#else
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if(add >= MAX_FM25CL64_LEN)//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
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{
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printf("E2 len error!\r\n");
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}
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else
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{
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m_tx_buf_u8[0] = FM25CL64_READ;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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m_tx_buf_u8[1] = (uint8_t)( add >> 8);// <20><>8λ<38><CEBB>ַ
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m_tx_buf_u8[2] = (uint8_t)( add );//
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m_tx_buf_u8[3] = 0xFF;//
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if (sdrv_spi_sync_transmit(&g_master, m_tx_buf_u8, m_rx_buf_u8,4,4))
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{
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printf("E2 write Failed!\r\n");
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}
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return m_rx_buf_u8[3];
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}
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#endif
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return 0xFF;
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}
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#ifdef _EEROM_CRC_
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#define POLY 0x1021
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/**
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* Calculating CRC-16 in 'C'
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* @para addr, start of data
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* @para num, length of data
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* @para crc, incoming CRC
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*/
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unsigned int crc16(unsigned char *addr, int num, unsigned int crc)
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{
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int i;
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for (; num > 0; num--) /* Step through bytes in memory */
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{
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crc = crc ^ ((*addr) << 8); /* Fetch byte from memory, XOR into CRC top byte*/
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addr++;
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for (i = 0; i < 8; i++) /* Prepare to rotate 8 bits */
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{
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if (crc & 0x8000) /* b15 is set... */
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crc = (crc << 1) ^ POLY; /* rotate and XOR with polynomic */
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else /* b15 is clear... */
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crc <<= 1; /* just rotate */
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} /* Loop for 8 bits */
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crc &= 0xFFFF; /* Ensure CRC remains 16-bit value */
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} /* Loop until num=0 */
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return(crc); /* Return updated CRC */
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}
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//д<><D0B4><EFBFBD><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD>Զ<EFBFBD>дһ<D0B4><D2BB><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
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unsigned char wrEE_CRC_Bak(unsigned char add,unsigned char *eeData,unsigned char len,unsigned char addbak)
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{
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uword crc_Res;
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unsigned char index;
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unsigned char flagEEwrOK;
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crc_Res = crc16(eeData, len-2, 0xffff); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>У<EFBFBD><D0A3>
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eeData[len-2] = (ubyte)(crc_Res );
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eeData[len-1] = (ubyte)(crc_Res >> 8);
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for(index=0;index<len;index++) //д<><D0B4><EFBFBD><EFBFBD>
|
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{WDT_vServiceWDT();
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wrbyte_24c02( add + index, eeData[index]);
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}
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flagEEwrOK = 1;
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for(index=0;index<len;index++) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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{WDT_vServiceWDT();
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if(rdbyte_24c02( add + index) != eeData[index])
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{
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flagEEwrOK = 0;
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break;
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}
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}
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if(1 == flagEEwrOK) //
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{
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for(index=0;index<len;index++) //д<><D0B4><EFBFBD>ݺ<EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
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{WDT_vServiceWDT();
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wrbyte_24c02( addbak + index, eeData[index]);
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}
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flagEEwrOK = 2;
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for(index=0;index<len;index++)
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{WDT_vServiceWDT();
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if(rdbyte_24c02( addbak + index) != eeData[index])
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{ flagEEwrOK = 0;
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break;
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||||
}
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||||
}
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}
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else
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{
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flagEEwrOK = 0;
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//.........
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}
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return flagEEwrOK;
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}
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unsigned char rdEE_CRC_Bak(unsigned char add,unsigned char *eeData,unsigned char len,unsigned char addbak)
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{
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uword crc_Res;
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unsigned char index;
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unsigned char reEEok = 0;
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for(index=0;index<len;index++) //<2F><><EFBFBD><EFBFBD><EFBFBD>ݺ<EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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{WDT_vServiceWDT();
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eeData[index] = rdbyte_24c02(add + index);
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}
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crc_Res = crc16(eeData, len-2, 0xffff); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>У<EFBFBD><D0A3>
|
||||
if( crc_Res == ((uword)eeData[len-1] << 8) + (uword)eeData[len-2]) //<2F>Աȶ<D4B1>ȡ<EFBFBD><C8A1>У<EFBFBD><D0A3>ֵ <20><>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD>EEֵ<45><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ...
|
||||
{
|
||||
reEEok = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
for(index=0;index<len;index++) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݺ<EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{WDT_vServiceWDT();
|
||||
eeData[index] = rdbyte_24c02(addbak + index);
|
||||
}
|
||||
crc_Res = crc16(eeData, len-2, 0xffff); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>У<EFBFBD><D0A3>
|
||||
if( crc_Res == ((uword)eeData[len-1] << 8) + (uword)eeData[len-2]) //<2F>Աȶ<D4B1>ȡ<EFBFBD><C8A1>У<EFBFBD><D0A3>ֵ <20><>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD>EEֵ<45><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ...
|
||||
{
|
||||
reEEok = 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
reEEok = 0;
|
||||
}
|
||||
}
|
||||
return reEEok;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
640
IAP_Task.c
Normal file
640
IAP_Task.c
Normal file
@@ -0,0 +1,640 @@
|
||||
|
||||
#include "debug.h"
|
||||
|
||||
#include "crc16.h"
|
||||
#include "flexcan_init.h"
|
||||
#include <flexcan_cfg.h>
|
||||
#include <udelay/udelay.h>
|
||||
#include <remap/remap.h>
|
||||
#include <armv7-r/cache.h>
|
||||
#include "IAP_Task.h"
|
||||
#include "wdt_refresh.h"
|
||||
#include "pinmux_cfg.h"
|
||||
#include <sdrv_gpio.h>
|
||||
#include "sdrv_rstgen.h"
|
||||
#include <reset_ip.h>
|
||||
#include <rom_ctrl/rom_ctrl.h>
|
||||
#include <sdrv_xspi.h>
|
||||
#include "eth_cfg.h"
|
||||
#include "sdrv_eth.h"
|
||||
#include "interface_ethernet.h"
|
||||
|
||||
u32 fileDataLen = 0; //IAP file data length
|
||||
u32 fileCheckSum = 0; //IAP file data checksum
|
||||
u32 flashProgramLen = 0; //length of data written to backup area
|
||||
//iapFileHeader iapPara; //IAP file parameters
|
||||
|
||||
CBL_CMD_LIST g_cmdList = {0};
|
||||
volatile uint16_t g_updateModeCnt = 0;//
|
||||
uint32_t g_recvLen = 0;
|
||||
uint16_t g_canAddr = 0;
|
||||
|
||||
uint8_t des_ipaddr[4] = {192,168,17,3};//本机IP
|
||||
|
||||
|
||||
//uint8_t CH395GWIPAddr[4] = {192,168,17,1};//网关
|
||||
//uint8_t CH395IPMask[4] = {255,255,255,0};//掩码
|
||||
|
||||
//uint8_t OwnMasterIpArr[4] = {192,168,17,117};//ַ目标IP
|
||||
|
||||
uint8_t g_recvData[1028] = {0};
|
||||
|
||||
uint8_t g_recvDataCheck[1028] = {0};
|
||||
|
||||
uint8_t g_eflashRWBuffer[DATA_SIZE] = {0x00};
|
||||
|
||||
SystemDataRecord g_systemDataRecord = {0,0,0,0};
|
||||
|
||||
volatile uint8_t g_canRxMsgFlag = 0;//接收到CAN数据后的标志
|
||||
volatile uint16_t Eth_Rx_Flag = 0;//接收到CAN数据后的标志
|
||||
|
||||
extern uint8_t SocketId;
|
||||
|
||||
ENET_RxBuf ENET_RxBuf_1 = {0};
|
||||
uint8_t g_RedData[1024] = {0};
|
||||
uint8_t debugdata[4] = {0,0,0,0};
|
||||
|
||||
Flash_RxBuf Flash_RxBuf_1 = {0};
|
||||
Flash_RxBuf Flash_RxBuf_2 = {0};
|
||||
|
||||
uint8_t writeflashTime = 0;//最大循环写入3次
|
||||
uint32_t AppBinSize = 0;//数据总长度，用来判断数据长度
|
||||
uint32_t WriteflashSize = 0;//写的flash数据长度
|
||||
|
||||
uint32_t OTA_CANTxID = 0x02;//默认发送ID为0x02
|
||||
uint32_t OTA_CANRxID = 0x01;//默认接收ID为0x01
|
||||
uint32_t WDT_CANRxID = 0x03;//默认接收ID为0x03
|
||||
|
||||
uint8_t flash_eth_time = 0;//接收启动超时标志
|
||||
uint8_t ethCmdSTT = 0;
|
||||
|
||||
bool WDTReFresh_flag = false;//busoff标志
|
||||
/*********************************************************************
|
||||
* @fn IAP_EEPROM_ERASE
|
||||
*
|
||||
* @brief erase Data-Flash block, minimal block is 256B
|
||||
*
|
||||
* @param Page_Address - the address of the page being erased.
|
||||
* Length - Erased data length
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void IAP_EEPROM_ERASE(uint32_t Page_Address, uint32_t Length)
|
||||
{
|
||||
u16 pageNum = Length / FLASH_PAGE_SIZE;
|
||||
u16 lastDataNum = Length % FLASH_PAGE_SIZE;
|
||||
u32 Len_PAGE = 0;
|
||||
//-----------------------------------------------------
|
||||
if(0 != (lastDataNum))//判断是否整除
|
||||
{
|
||||
pageNum = pageNum+1;
|
||||
}
|
||||
Len_PAGE = pageNum * FLASH_PAGE_SIZE;//计算擦写长度
|
||||
|
||||
sdrv_spi_nor_erase(&flash, Page_Address,Len_PAGE);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn IAP_EEPROM_WRITE
|
||||
*
|
||||
* @brief write Data-Flash data block
|
||||
*
|
||||
* @param StartAddr - the address of the page being written.
|
||||
* Buffer - data buff
|
||||
* Length - written data length
|
||||
*
|
||||
* @return FLASH_Status
|
||||
*/
|
||||
void IAP_EEPROM_WRITE( u32 StartAddr, u8 *Buffer, u32 Length )
|
||||
{
|
||||
|
||||
u16 pageNum = Length / FLASH_PAGE_Write;
|
||||
u16 lastDataNum = Length % FLASH_PAGE_Write;
|
||||
u32 Len_PAGE = 0;
|
||||
int write_sta = 0;
|
||||
//-----------------------------------------------------
|
||||
if(0 != (lastDataNum))//判断是否整除
|
||||
{
|
||||
pageNum = pageNum+1;
|
||||
}
|
||||
Len_PAGE = pageNum * FLASH_PAGE_Write;//计算擦写长度
|
||||
write_sta = sdrv_spi_nor_write(&flash, StartAddr, Buffer, Len_PAGE);
|
||||
|
||||
if(write_sta != 0)
|
||||
{
|
||||
printf("flash fail!");
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn IAP_EEPROM_READ
|
||||
*
|
||||
* @brief read Data-Flash data block
|
||||
*
|
||||
* @param StartAddr - the address of the page being read.
|
||||
* Buffer - data buff
|
||||
* Length - read data length
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void IAP_EEPROM_READ( u32 StartAddr, u8 *Buffer, u32 Length )
|
||||
{
|
||||
u16 pageNum = Length / FLASH_PAGE_Write;
|
||||
u16 lastDataNum = Length % FLASH_PAGE_Write;
|
||||
u32 Len_PAGE = 0;
|
||||
//-----------------------------------------------------
|
||||
if(0 != (lastDataNum))//判断是否整除
|
||||
{
|
||||
pageNum = pageNum+1;
|
||||
}
|
||||
Len_PAGE = pageNum * FLASH_PAGE_Write;//计算擦写长度
|
||||
sdrv_spi_nor_read(&flash, StartAddr, Buffer, Len_PAGE);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* bootMsgTx
|
||||
*
|
||||
* @param[in] Mode: 模式 0:can下载，1:以太网下载
|
||||
* @param[in] Cmd: 发送的命令
|
||||
* @param[in] *Buffer: 需要发送的数据
|
||||
*
|
||||
* @brief 发送下载时反馈给上位机的数据
|
||||
*/
|
||||
void bootMsgTx(uint8_t Mode,uint16_t Cmd,uint8_t *Buffer,uint8_t len)
|
||||
{
|
||||
uint16_t port = 0;
|
||||
//------------------------------------------------------------------------------
|
||||
switch(Mode)
|
||||
{
|
||||
case DOWNLOAD_CAN://can下载
|
||||
CAN_Send_Msg(&g_flexcan_handle,Cmd, FLEXCAN_STANDARD_FRAME, FLEXCAN_FrameTypeData, Buffer,len, TX_MB_INDEX);
|
||||
break;
|
||||
|
||||
case DOWNLOAD_ETH://以太网下载
|
||||
if(0x02 == Cmd)
|
||||
{
|
||||
port = BOOT_TX_PORT;
|
||||
}
|
||||
|
||||
UdpSendToData(UDPCB_1, Buffer,len, des_ipaddr, port);
|
||||
break;
|
||||
default:;
|
||||
}
|
||||
}
|
||||
/**
|
||||
* CAN_BootGetAddrData
|
||||
*
|
||||
* @param[in] none
|
||||
* @return : 节点地址。
|
||||
*
|
||||
* @brief 获取节点地址信息
|
||||
*/
|
||||
|
||||
uint16_t CAN_BootGetAddrData(void)
|
||||
{
|
||||
return 0x10;//返回的地址值需要根据实际情况进行修改
|
||||
}
|
||||
|
||||
/**
|
||||
* DataRecord_WriteUpgrade
|
||||
*
|
||||
* @param[in] upgradeFlag NORMAL_ON(0):normal start, CAN_BOOTLOADER_UPGRADE(1):bootloader upgrade
|
||||
* @return 0, success.-1, fail, other:flash ctrl fail
|
||||
*
|
||||
* @brief Unlock the eflash control
|
||||
*/
|
||||
int DataRecord_WriteUpgrade(uint8_t upgradeFlag)
|
||||
{
|
||||
IAP_EEPROM_READ( DATA_START_ADDR, (uint8_t *)&g_systemDataRecord, 4 );
|
||||
|
||||
IAP_EEPROM_ERASE(DATA_START_ADDR, FLASH_PAGE_SIZE);
|
||||
|
||||
g_systemDataRecord.canBootloaderUpgrade = 0;
|
||||
IAP_EEPROM_WRITE(DATA_START_ADDR, (uint8_t *)&g_systemDataRecord, 4);
|
||||
|
||||
|
||||
IAP_EEPROM_READ( DATA_START_ADDR, (uint8_t *)&g_systemDataRecord, 4 );
|
||||
|
||||
if (g_systemDataRecord.canBootloaderUpgrade == upgradeFlag)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
/**
|
||||
* goToApp
|
||||
*
|
||||
* @param[in] none
|
||||
* @return : none
|
||||
*
|
||||
* @brief APP跳转
|
||||
*/
|
||||
void goToApp(void)
|
||||
{
|
||||
/* global reset */
|
||||
/* soft reset flash */
|
||||
// flash.sw_rst = true;//跳转前先非初始化
|
||||
// sdrv_spi_nor_deinit(&flash);
|
||||
// /* soft reset xspi host */
|
||||
// sdrv_spi_nor_drv_deinit(&flash);
|
||||
|
||||
printf("goToApp\r\n");
|
||||
sdrv_gpio_set_pin_output_level(GPIO_B9, 0); //测量时间
|
||||
arch_invalidate_cache_range(0x01978000,0x8000);//清除 dcache
|
||||
sdrv_core_force_remap(SDRV_REMAP_SF, APP_Flash_adr+0x10000000);
|
||||
|
||||
}
|
||||
/**
|
||||
* CAN_BootExecutiveCommand
|
||||
*
|
||||
* @param[in] pRxMessage CAN总线消息
|
||||
* @return : none
|
||||
*
|
||||
* @brief 执行主机下发的命令
|
||||
*/
|
||||
void CAN_BootExecutiveCommand(ENET_RxBuf *pRxMessage)
|
||||
{
|
||||
uint16_t canCmd = 0;//ID的bit0~bit3位为命令码
|
||||
uint16_t crcData = 0;
|
||||
static uint32_t s_startAddr = 0;
|
||||
static uint32_t RgEasySize = 0;
|
||||
uint8_t ENETTxMessage[8] = {0,0,0,0,0,0,0};
|
||||
static uint8_t CAN_BootExecutiveStt = 0;
|
||||
uint8_t WriteE2adr = 0;//写地址中间值
|
||||
static uint8_t EnterRegion = 0;//区域
|
||||
|
||||
uint8_t psn_data[4]__attribute__((__aligned__(4))); //实际数据接收数据 注意4字节对齐 注意需要4字节对齐。
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
canCmd = (pRxMessage->RxData[0] << 8) + pRxMessage->RxData[1];
|
||||
|
||||
printf("Flash_RxBufLenNow :0x%x,Flash_RxBufSta :0x%x,Flash_RxBufLen:0x%x\r\n",Flash_RxBuf_1.Flash_RxBufLenNow, Flash_RxBuf_1.Flash_RxBufSta,Flash_RxBuf_1.Flash_RxBufLen);
|
||||
printf("Flash2_RxBufLenNow :0x%x,Flash2_RxBufSta :0x%x,Flash2_RxBufLen:0x%x\r\n",Flash_RxBuf_2.Flash_RxBufLenNow, Flash_RxBuf_2.Flash_RxBufSta,Flash_RxBuf_2.Flash_RxBufLen);
|
||||
printf("CAN_BootExecutiveStt :0x%x, canCmd:0x%x\r\n", CAN_BootExecutiveStt,canCmd);
|
||||
|
||||
switch(canCmd)
|
||||
{
|
||||
case ENTER_UPDATE_MODE: //boot重启
|
||||
/* global reset */
|
||||
/* soft reset flash */
|
||||
flash.sw_rst = true;
|
||||
sdrv_spi_nor_deinit(&flash);
|
||||
/* soft reset xspi host */
|
||||
sdrv_spi_nor_drv_deinit(&flash);
|
||||
|
||||
//20250822 修改为点击连接就修改IP，这样不需要外部来修改参数
|
||||
wrbyte_24c02(BOOT_DES_IP, (pRxMessage->RxData[2]));
|
||||
wrbyte_24c02(BOOT_DES_IP+1,(pRxMessage->RxData[3]));
|
||||
wrbyte_24c02(BOOT_DES_IP+2,(pRxMessage->RxData[4]));
|
||||
wrbyte_24c02(BOOT_DES_IP+3,(pRxMessage->RxData[5]));
|
||||
|
||||
|
||||
for(;;)
|
||||
{
|
||||
ssdk_printf(SSDK_INFO, "Restart!\r\n");
|
||||
udelay(100000);
|
||||
}
|
||||
break;
|
||||
|
||||
case READ_VERSION:
|
||||
if(BOOT0_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
ENETTxMessage[0] = (uint8_t)(READ_VERSION>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(READ_VERSION);
|
||||
ENETTxMessage[2] = BOOT0_index;
|
||||
ENETTxMessage[3] = rdbyte_24c02(BOOT0_VERSION_E2adr);
|
||||
ENETTxMessage[4] = rdbyte_24c02(BOOT0_VERSION_E2adr+1);
|
||||
ENETTxMessage[5] = rdbyte_24c02(BOOT0_VERSION_E2adr+2);
|
||||
ENETTxMessage[6] = rdbyte_24c02(BOOT0_VERSION_E2adr+3);
|
||||
ENETTxMessage[7] = rdbyte_24c02(BOOT0_VERSION_E2adr+4);
|
||||
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 8);
|
||||
}
|
||||
else if(BOOT1_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
ENETTxMessage[0] = (uint8_t)(READ_VERSION>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(READ_VERSION);
|
||||
ENETTxMessage[2] = BOOT1_index;
|
||||
ENETTxMessage[3] = rdbyte_24c02(BOOT1_VERSION_E2adr);
|
||||
ENETTxMessage[4] = rdbyte_24c02(BOOT1_VERSION_E2adr+1);
|
||||
ENETTxMessage[5] = rdbyte_24c02(BOOT1_VERSION_E2adr+2);
|
||||
ENETTxMessage[6] = rdbyte_24c02(BOOT1_VERSION_E2adr+3);
|
||||
ENETTxMessage[7] = rdbyte_24c02(BOOT1_VERSION_E2adr+4);
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 8);
|
||||
}
|
||||
else if(APP_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
ENETTxMessage[0] = (uint8_t)(READ_VERSION>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(READ_VERSION);
|
||||
ENETTxMessage[2] = APP_index;
|
||||
ENETTxMessage[3] = rdbyte_24c02(APP_VERSION_E2adr);
|
||||
ENETTxMessage[4] = rdbyte_24c02(APP_VERSION_E2adr+1);
|
||||
ENETTxMessage[5] = rdbyte_24c02(APP_VERSION_E2adr+2);
|
||||
ENETTxMessage[6] = rdbyte_24c02(APP_VERSION_E2adr+3);
|
||||
ENETTxMessage[7] = rdbyte_24c02(APP_VERSION_E2adr+4);
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 8);
|
||||
}
|
||||
else{}
|
||||
break;
|
||||
|
||||
case CRC_UPDATE:
|
||||
switch(CAN_BootExecutiveStt)
|
||||
{
|
||||
case 0:
|
||||
if(BOOT0_index == (pRxMessage->RxData[4]))
|
||||
{
|
||||
IAP_EEPROM_ERASE(BOOT0_Flash_adr,FLASH_BLOCK_SIZE);// 擦除4K
|
||||
s_startAddr = BOOT0_Flash_adr;
|
||||
}
|
||||
else if(BOOT1_index == (pRxMessage->RxData[4]))
|
||||
{
|
||||
IAP_EEPROM_ERASE(BOOT1_Flash_adr,FLASH_BLOCK_SIZE);//
|
||||
s_startAddr = BOOT1_Flash_adr;
|
||||
}
|
||||
else if(APP_index == (pRxMessage->RxData[4]))
|
||||
{
|
||||
IAP_EEPROM_ERASE(APP_Flash_adr,FLASH_BLOCK_SIZE);//
|
||||
s_startAddr = APP_Flash_adr;
|
||||
}
|
||||
else{}
|
||||
RgEasySize = FLASH_BLOCK_SIZE;//擦除长度，擦除多长那就下载多长
|
||||
CAN_BootExecutiveStt = 10;
|
||||
break;
|
||||
//循环烧写flash
|
||||
case 10:
|
||||
if(FlashBufComplete == (Flash_RxBuf_1.Flash_RxBufSta))//接收完成 缓存1
|
||||
{
|
||||
crcData = crc16_ccitt(&Flash_RxBuf_1.RxData[0], Flash_RxBuf_1.Flash_RxBufLen);
|
||||
|
||||
if(crcData == (Flash_RxBuf_1.Flash_RxBufCRC))
|
||||
{
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufCRCPass;
|
||||
ENETTxMessage[0] = (uint8_t)(CRC_UPDATE>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(CRC_UPDATE);
|
||||
ENETTxMessage[2] = CRC_Pass;
|
||||
|
||||
// ssdk_printf(SSDK_CRIT, "0x%x,ENETTxMessage[0]:0x%x,0x%x,CRC_Pass:0x%x\r\n",ENETTxMessage[0],ENETTxMessage[2]);
|
||||
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 3);
|
||||
|
||||
if(RgEasySize >= Flash_RxBuf_1.Flash_RxBufLen)//擦除长度是否大于写数据长度
|
||||
{
|
||||
// ssdk_printf(SSDK_CRIT, "RxData1[0] :0x%x,RxData1[1]:0x%x\r\n",Flash_RxBuf_1.RxData[0],Flash_RxBuf_1.RxData[1]);
|
||||
|
||||
External_wdt_refresh();//喂狗 4K喂狗一次
|
||||
IAP_EEPROM_WRITE(s_startAddr, &Flash_RxBuf_1.RxData[0], Flash_RxBuf_1.Flash_RxBufLen);//20230209修改写flash不需要转换为32位，就是单个字节
|
||||
s_startAddr = s_startAddr + (Flash_RxBuf_1.Flash_RxBufLen);//烧写地址累加
|
||||
RgEasySize = RgEasySize - Flash_RxBuf_1.Flash_RxBufLen;//擦除总长度-当前写入的长度
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufWrite;
|
||||
CAN_BootExecutiveStt = 10;
|
||||
}
|
||||
else//擦除之后也得写1K，已经校验通过了
|
||||
{
|
||||
External_wdt_refresh();//喂狗 4K喂狗一次
|
||||
CAN_BootExecutiveStt = 10;//擦除长度写完，重新擦除
|
||||
IAP_EEPROM_ERASE(s_startAddr,FLASH_BLOCK_SIZE);//
|
||||
RgEasySize = FLASH_BLOCK_SIZE;//重新为4K
|
||||
|
||||
// ssdk_printf(SSDK_CRIT, "RxData1[0] :0x%x,RxData1[1]:0x%x\r\n",Flash_RxBuf_1.RxData[0],Flash_RxBuf_1.RxData[1]);
|
||||
|
||||
IAP_EEPROM_WRITE(s_startAddr, &Flash_RxBuf_1.RxData[0], Flash_RxBuf_1.Flash_RxBufLen);//20230209修改写flash不需要转换为32位，就是单个字节
|
||||
s_startAddr = s_startAddr + (Flash_RxBuf_1.Flash_RxBufLen);//烧写地址累加
|
||||
RgEasySize = RgEasySize - Flash_RxBuf_1.Flash_RxBufLen;//擦除总长度-当前写入的长度
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufWrite;
|
||||
}
|
||||
}
|
||||
else//CRC 校验不通过
|
||||
{
|
||||
CAN_BootExecutiveStt = 10;
|
||||
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufCRCFail;
|
||||
ENETTxMessage[0] = (uint8_t)(CRC_UPDATE>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(CRC_UPDATE);
|
||||
ENETTxMessage[2] = CRC_Fail;
|
||||
|
||||
ssdk_printf(SSDK_CRIT, "CCCRCfail:0x%x,RxCRCfail:0x%x\r\n",crcData,Flash_RxBuf_1.Flash_RxBufCRC);
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 3);
|
||||
|
||||
}
|
||||
}
|
||||
else if(FlashBufComplete == (Flash_RxBuf_2.Flash_RxBufSta))//接收完成 缓存2
|
||||
{
|
||||
crcData = crc16_ccitt(&Flash_RxBuf_2.RxData[0], Flash_RxBuf_2.Flash_RxBufLen);
|
||||
if(crcData == (Flash_RxBuf_2.Flash_RxBufCRC))
|
||||
{
|
||||
CAN_BootExecutiveStt = 10;
|
||||
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufCRCPass;
|
||||
ENETTxMessage[0] = (uint8_t)(CRC_UPDATE>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(CRC_UPDATE);
|
||||
ENETTxMessage[2] = CRC_Pass;
|
||||
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 3);
|
||||
|
||||
if(RgEasySize > 0)
|
||||
{
|
||||
// ssdk_printf(SSDK_CRIT, "RxData2[0] :0x%x,RxData2[1]:0x%x\r\n",Flash_RxBuf_2.RxData[0],Flash_RxBuf_2.RxData[1]);
|
||||
External_wdt_refresh();//喂狗 4K喂狗一次
|
||||
IAP_EEPROM_WRITE(s_startAddr, &Flash_RxBuf_2.RxData[0], Flash_RxBuf_2.Flash_RxBufLen);//20230209修改写flash不需要转换为32位，就是单个字节
|
||||
s_startAddr = s_startAddr + (Flash_RxBuf_2.Flash_RxBufLen);//烧写地址累加
|
||||
RgEasySize = RgEasySize - Flash_RxBuf_2.Flash_RxBufLen;//擦除总长度-当前写入的长度
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufWrite;
|
||||
CAN_BootExecutiveStt = 10;
|
||||
}
|
||||
else//擦除之后也得写1K，已经校验通过了
|
||||
{
|
||||
External_wdt_refresh();//喂狗 4K喂狗一次
|
||||
CAN_BootExecutiveStt = 10;//擦除长度写完，重新擦除
|
||||
IAP_EEPROM_ERASE(s_startAddr,FLASH_BLOCK_SIZE);//
|
||||
RgEasySize = FLASH_BLOCK_SIZE;//重新为4K
|
||||
|
||||
// ssdk_printf(SSDK_CRIT, "RxData2[0] :0x%x,RxData2[1]:0x%x\r\n",Flash_RxBuf_2.RxData[0],Flash_RxBuf_2.RxData[1]);
|
||||
|
||||
IAP_EEPROM_WRITE(s_startAddr, &Flash_RxBuf_2.RxData[0], Flash_RxBuf_2.Flash_RxBufLen);//20230209修改写flash不需要转换为32位，就是单个字节
|
||||
s_startAddr = s_startAddr + (Flash_RxBuf_2.Flash_RxBufLen);//烧写地址累加
|
||||
RgEasySize = RgEasySize - Flash_RxBuf_2.Flash_RxBufLen;//擦除总长度-当前写入的长度
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufWrite;
|
||||
}
|
||||
}
|
||||
else//CRC 校验不通过
|
||||
{
|
||||
CAN_BootExecutiveStt = 10;
|
||||
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufCRCFail;
|
||||
ENETTxMessage[0] = (uint8_t)(CRC_UPDATE>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(CRC_UPDATE);
|
||||
ENETTxMessage[2] = CRC_Fail;
|
||||
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 3);
|
||||
|
||||
ssdk_printf(SSDK_CRIT, "CCCRCfail:0x%x,RxCRCfail:0x%x\r\n",crcData,Flash_RxBuf_2.Flash_RxBufCRC);
|
||||
}
|
||||
}
|
||||
else//都没有接收完成
|
||||
{
|
||||
CAN_BootExecutiveStt = 10;
|
||||
}
|
||||
break;
|
||||
default:break;
|
||||
}
|
||||
break;
|
||||
|
||||
case Write_VERSION:
|
||||
if(BOOT0_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
WriteE2adr = BOOT0_VERSION_E2adr;
|
||||
}
|
||||
else if(BOOT1_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
WriteE2adr = BOOT1_VERSION_E2adr;
|
||||
}
|
||||
else if(APP_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
WriteE2adr = APP_VERSION_E2adr;
|
||||
}
|
||||
else{}
|
||||
EnterRegion = (pRxMessage->RxData[2]);//下次跳转区域
|
||||
|
||||
wrbyte_24c02(WriteE2adr,pRxMessage->RxData[3]);
|
||||
wrbyte_24c02(WriteE2adr+1,pRxMessage->RxData[4]);
|
||||
wrbyte_24c02(WriteE2adr+2,pRxMessage->RxData[5]);
|
||||
wrbyte_24c02(WriteE2adr+3,pRxMessage->RxData[6]);
|
||||
wrbyte_24c02(WriteE2adr+4,pRxMessage->RxData[7]);
|
||||
|
||||
ENETTxMessage[0] = (uint8_t)(Write_VERSION>>8); //读取E2看是否正常写入
|
||||
ENETTxMessage[1] = (uint8_t)(Write_VERSION);
|
||||
ENETTxMessage[2] = (pRxMessage->RxData[2]);
|
||||
ENETTxMessage[3] = rdbyte_24c02(WriteE2adr);
|
||||
ENETTxMessage[4] = rdbyte_24c02(WriteE2adr+1);
|
||||
ENETTxMessage[5] = rdbyte_24c02(WriteE2adr+2);
|
||||
ENETTxMessage[6] = rdbyte_24c02(WriteE2adr+3);
|
||||
ENETTxMessage[7] = rdbyte_24c02(WriteE2adr+4);
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 8);
|
||||
break;
|
||||
case ENTER_APP:
|
||||
if((BOOT0_index == EnterRegion) || (BOOT1_index == EnterRegion))
|
||||
{
|
||||
flash.sw_rst = true;
|
||||
sdrv_spi_nor_deinit(&flash);
|
||||
/* soft reset xspi host */
|
||||
sdrv_spi_nor_drv_deinit(&flash);
|
||||
for(;;)
|
||||
{
|
||||
ssdk_printf(SSDK_INFO, "Restart!\r\n");
|
||||
udelay(100000);
|
||||
}//重启
|
||||
}
|
||||
else if(APP_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
goToApp();
|
||||
}
|
||||
else{}
|
||||
break;
|
||||
case EXCUTE_APP:
|
||||
wrbyte_24c02(Update_Flg_E2adr,NORMAL_ON);
|
||||
udelay(3000);//延时3ms
|
||||
goToApp();
|
||||
break;
|
||||
|
||||
case READ_PSN://读取PSN
|
||||
if(BOOT0_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
IAP_EEPROM_READ( BOOT0_PSN_adr,psn_data,4);
|
||||
}
|
||||
else if(BOOT1_index == (pRxMessage->RxData[2]))
|
||||
{
|
||||
IAP_EEPROM_READ( BOOT1_PSN_adr,psn_data, 4);
|
||||
}
|
||||
else
|
||||
{
|
||||
}
|
||||
|
||||
ENETTxMessage[0] = (uint8_t)(READ_PSN>>8); //读取E2看是否正常写入
|
||||
ENETTxMessage[1] = (uint8_t)(READ_PSN);
|
||||
ENETTxMessage[2] = (pRxMessage->RxData[2]);
|
||||
ENETTxMessage[3] = psn_data[3];
|
||||
ENETTxMessage[4] = psn_data[2];
|
||||
ENETTxMessage[5] = psn_data[1];
|
||||
ENETTxMessage[6] = psn_data[0];
|
||||
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 7);
|
||||
break;
|
||||
|
||||
case WRITE_IP://修改IP 重启后有效
|
||||
wrbyte_24c02(BOOT_DES_IP, (pRxMessage->RxData[2]));
|
||||
wrbyte_24c02(BOOT_DES_IP+1,(pRxMessage->RxData[3]));
|
||||
wrbyte_24c02(BOOT_DES_IP+2,(pRxMessage->RxData[4]));
|
||||
wrbyte_24c02(BOOT_DES_IP+3,(pRxMessage->RxData[5]));
|
||||
|
||||
ENETTxMessage[0] = (uint8_t)(WRITE_IP>>8); //读取E2看是否正常写入
|
||||
ENETTxMessage[1] = (uint8_t)(WRITE_IP);
|
||||
ENETTxMessage[2] = rdbyte_24c02(BOOT_DES_IP );
|
||||
ENETTxMessage[3] = rdbyte_24c02(BOOT_DES_IP+1);
|
||||
ENETTxMessage[4] = rdbyte_24c02(BOOT_DES_IP+2);
|
||||
ENETTxMessage[5] = rdbyte_24c02(BOOT_DES_IP+3);
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 6);
|
||||
break;
|
||||
|
||||
case LOST_FRAME://丢帧
|
||||
ENETTxMessage[0] = (uint8_t)(CRC_UPDATE>>8);
|
||||
ENETTxMessage[1] = (uint8_t)(CRC_UPDATE);
|
||||
ENETTxMessage[2] = CRC_Fail;
|
||||
printf("Lost Frame");
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, ENETTxMessage, 3);
|
||||
break;
|
||||
|
||||
default:break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ReadUpgradeFlag
|
||||
*
|
||||
* @param[in]
|
||||
* @return none
|
||||
*
|
||||
* @brief read upgrade flag from flash
|
||||
*/
|
||||
void ReadUpgradeFlag(void)
|
||||
{
|
||||
static uint16_t lost_cnt = 0;
|
||||
uint8_t flash_buf[8] = {0,0,0,0,0,0,0,0};
|
||||
//--------------------------------------------------------------------
|
||||
if ( (g_canRxMsgFlag) || (Eth_Rx_Flag != 0) )
|
||||
{
|
||||
g_canRxMsgFlag = 0;
|
||||
Eth_Rx_Flag --;
|
||||
CAN_BootExecutiveCommand(&ENET_RxBuf_1);
|
||||
}
|
||||
|
||||
if(1 == flash_eth_time)//超过2s，标志未清楚认为是丢帧
|
||||
{
|
||||
lost_cnt ++;
|
||||
if(lost_cnt >= 2000)//2s 定时
|
||||
{
|
||||
lost_cnt = 0;
|
||||
flash_eth_time = 0;
|
||||
ethCmdSTT = 0;//清空接收状态，重新开始接收
|
||||
|
||||
flash_buf[0] = (uint8_t)(CRC_UPDATE>>8);
|
||||
flash_buf[1] = (uint8_t)(CRC_UPDATE);
|
||||
flash_buf[2] = CRC_Fail;
|
||||
printf("Lost Frame");
|
||||
bootMsgTx(Flash_RxBuf_1.Download_Mode, OTA_CANTxID, flash_buf, 3);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
lost_cnt = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
288
IAP_Task.h
Normal file
288
IAP_Task.h
Normal file
@@ -0,0 +1,288 @@
|
||||
|
||||
#ifndef __IAP_TASK_H__
|
||||
#define __IAP_TASK_H__
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include <sdrv_spi_nor.h>
|
||||
#include <DLib_Product_string.h>
|
||||
#include <sdrv_flexcan.h>
|
||||
|
||||
|
||||
#define u8 uint8_t
|
||||
#define u16 uint16_t
|
||||
#define u32 uint32_t
|
||||
|
||||
|
||||
|
||||
#define EN_24C02 0
|
||||
|
||||
#define UDP_RECE_BUF_LEN 1472
|
||||
|
||||
#define TimeOutPeriod 10 /* Timer period, in Ms. */
|
||||
/*address assignment */
|
||||
#define BIM_IMAGE_START_ADD ((uint32_t) 0x08000000)
|
||||
#define BIM_IMAGE_MAX_SIZE 0xA000
|
||||
|
||||
#define USER_IMAGE_START_ADD ((uint32_t) 0x0800A000)
|
||||
#define USER_IMAGE_MAX_SIZE 0x1B000
|
||||
|
||||
#define BACKUP_IMAGE_START_ADD ((uint32_t) 0x08025000)
|
||||
#define BACKUP_IMAGE_MAX_SIZE 0x1B000
|
||||
|
||||
#define UPDATA_FLAG_STORAGE_ADD ((uint32_t) 0x0803FF00)
|
||||
|
||||
#define FLASH_BLOCK_SIZE 4096
|
||||
|
||||
#define READ_DATA_LEN 2048
|
||||
|
||||
#define FLASH_PAGE_SIZE 0x1000
|
||||
|
||||
#define FLASH_PAGE_Write 4//д<><D0B4>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
|
||||
/*Flash operation information*/
|
||||
#define BIN_INF_LEN 512
|
||||
|
||||
|
||||
#define BOOT_DEBUG 1
|
||||
|
||||
#define CMD_FAILD 0x0
|
||||
#define ONLINE_CHECK 0x1
|
||||
#define ERASE_FLASH 0x3
|
||||
#define SET_BAUDRATE 0x4
|
||||
#define BLOCK_WRITE_INFO 0x5
|
||||
#define WRITE_BLOCK_FLASH 0x6
|
||||
#define BLOCK_READ_INFO 0x7
|
||||
#define READ_BLOCK_FLASH 0x8
|
||||
|
||||
#define CMD_SUCCESS 0xB
|
||||
#define RESTART_Soft 0xD
|
||||
|
||||
|
||||
|
||||
#define ENTER_UPDATE_MODE 0x1
|
||||
#define READ_VERSION 0x100
|
||||
#define CRC_UPDATE 0x101
|
||||
#define Write_VERSION 0x103
|
||||
#define ENTER_APP 0x102
|
||||
#define EXCUTE_APP 0x02
|
||||
#define WDT_Refresh 0x200
|
||||
#define READ_PSN 0x400
|
||||
#define WRITE_IP 0x501
|
||||
|
||||
#define DELAY_LOST_FRAME 0x304//<2F><>ʱ<EFBFBD><CAB1>֡
|
||||
#define LOST_FRAME 0x305//<2F><>֡
|
||||
|
||||
#define CRC_Pass 0x1 //CRCУ<43><D0A3>ͨ<EFBFBD><CDA8>
|
||||
#define CRC_Fail 0x2 //CRCУ<43>鲻ͨ<E9B2BB><CDA8>
|
||||
|
||||
|
||||
|
||||
#define DOWNLOAD_CAN 0x0 //ͨ<><CDA8>can<61><6E><EFBFBD>س<EFBFBD><D8B3><EFBFBD>
|
||||
#define DOWNLOAD_ETH 0x1 //ͨ<><CDA8><EFBFBD><EFBFBD>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD>س<EFBFBD><D8B3><EFBFBD>
|
||||
|
||||
|
||||
|
||||
#define BOOT0_index 1
|
||||
#define BOOT1_index 2
|
||||
#define APP_index 3
|
||||
|
||||
|
||||
#define BPT_PSN_adr 0xFF0 //PSN<53><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>BPT<50>ײ<EFBFBD><D7B2>ĵ<EFBFBD>ַ
|
||||
#define BPT_IPSN_adr 0xFF4 //IPSN<53><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>BPT<50>ײ<EFBFBD><D7B2>ĵ<EFBFBD>ַ <20>൱<EFBFBD><E0B5B1>PSN<53><4E>ȡ<EFBFBD><C8A1>
|
||||
|
||||
#define BOOT0_Flash_adr 0x7000 //ע<><D7A2><EFBFBD><EFBFBD>ַҪ4K<34><4B><EFBFBD><EFBFBD>
|
||||
#define BOOT0_PSN_adr BOOT0_Flash_adr + BPT_PSN_adr //boot0 <20><>PSN
|
||||
#define BOOT0_IPSN_adr BOOT0_Flash_adr + BPT_IPSN_adr //boot0 <20><>IPSN
|
||||
|
||||
#define BOOT1_Flash_adr 0x9C000
|
||||
#define BOOT1_PSN_adr BOOT1_Flash_adr + BPT_PSN_adr //boot1 <20><>PSN
|
||||
#define BOOT1_IPSN_adr BOOT1_Flash_adr + BPT_IPSN_adr //boot1 <20><>IPSN
|
||||
|
||||
#define APP_Flash_adr 0x140000
|
||||
|
||||
|
||||
|
||||
|
||||
#define Update_Flg_E2adr 0x0 //ռ<><D5BC>1<EFBFBD><31><EFBFBD>ֽ<EFBFBD>
|
||||
#define BOOT0_VERSION_E2adr 0x1 //ռ<><D5BC>5<EFBFBD><35><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD>+ʱ<><CAB1>+<2B>汾<EFBFBD><E6B1BE> 20 24 08 08 01
|
||||
#define BOOT1_VERSION_E2adr 0x6 //ռ<><D5BC>5<EFBFBD><35><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD>+ʱ<><CAB1>+<2B>汾<EFBFBD><E6B1BE> 20 24 08 08 01
|
||||
#define APP_VERSION_E2adr 0xB //ռ<><D5BC>5<EFBFBD><35><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD>+ʱ<><CAB1>+<2B>汾<EFBFBD><E6B1BE> 20 24 08 08 01
|
||||
#define BOOT_DES_IP 0x10 //ռ<><D5BC>4<EFBFBD><34><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD>IP 192.168.17.3
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define CMD_WIDTH 4
|
||||
#define CMD_MASK 0xF
|
||||
#define ADDR_MASK 0x1FFFFFF
|
||||
|
||||
|
||||
#define DATA_SIZE (0x100) /* 256 bytes */
|
||||
#define DATA_START_ADDR ((uint32_t)0x0803FF00)//0x0803FF00 //<2F><><EFBFBD><EFBFBD>256<35><36><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x0803FF00- 0x0803FFFF 256K
|
||||
|
||||
|
||||
|
||||
typedef enum{
|
||||
NORMAL_ON = 0,
|
||||
CAN_BOOTLOADER_UPGRADE,
|
||||
}UpgradeFlag;
|
||||
|
||||
|
||||
|
||||
typedef struct _CBL_CMD_LIST{
|
||||
volatile uint8_t EraseFlash; //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
volatile uint8_t WriteBlockFlash; //<2F>Զ<EFBFBD><D4B6>ֽ<EFBFBD><D6BD><EFBFBD>ʽд<CABD><D0B4><EFBFBD><EFBFBD>
|
||||
volatile uint8_t ReadBlockFlash; //<2F>Զ<EFBFBD><D4B6>ֽ<EFBFBD><D6BD><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
volatile uint8_t BlockWriteInfo; //<2F><><EFBFBD>ö<EFBFBD><C3B6>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ز<EFBFBD><D8B2><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
volatile uint8_t BlockReadInfo; //<2F><><EFBFBD>ö<EFBFBD><C3B6>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݶ<EFBFBD><DDB6><EFBFBD><EFBFBD>ز<EFBFBD><D8B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
volatile uint8_t OnlineCheck; //<2F><><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
volatile uint8_t CmdSuccess; //<2F><><EFBFBD><EFBFBD>ִ<EFBFBD>гɹ<D0B3>
|
||||
volatile uint8_t CmdFaild; //<2F><><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4>ʧ<EFBFBD><CAA7>
|
||||
volatile uint8_t SetBaudRate; //<2F><><EFBFBD>ýڵ㲨<DAB5><E3B2A8><EFBFBD><EFBFBD>
|
||||
volatile uint8_t ExcuteApp; //ִ<><D6B4>Ӧ<EFBFBD>ó<EFBFBD><C3B3><EFBFBD>
|
||||
volatile uint8_t EnterUpdateMode; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
volatile uint8_t EnterAPP; //<2F><><EFBFBD><EFBFBD>APP
|
||||
volatile uint8_t Restart; //<2F><><EFBFBD><EFBFBD>
|
||||
volatile uint8_t Undefine2; //δ<><CEB4><EFBFBD><EFBFBD>
|
||||
volatile uint8_t Undefine3; //δ<><CEB4><EFBFBD><EFBFBD>
|
||||
} CBL_CMD_LIST,*PCBL_CMD_LIST;
|
||||
|
||||
|
||||
typedef struct _Flash_RxBuf
|
||||
{
|
||||
uint8_t Flash_RxBufSta; // flash <20><><EFBFBD><EFBFBD>״̬ 0 <20><><EFBFBD><EFBFBD>û<EFBFBD>н<EFBFBD><D0BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>1<EFBFBD><31><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>2CRCУ<43>鲻ͨ<E9B2BB><CDA8><EFBFBD><EFBFBD>3CRCУ<43><D0A3>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>4д<34><D0B4><EFBFBD><EFBFBD>
|
||||
uint16_t Flash_RxBufCRC; //CRC
|
||||
uint32_t Flash_RxBufLen; //<2F><><EFBFBD><EFBFBD>
|
||||
uint32_t Flash_RxBufLenNow; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>
|
||||
uint8_t Download_Mode; //<2F><><EFBFBD><EFBFBD>ģʽ 0 can 1<><31>̫<EFBFBD><CCAB>
|
||||
uint8_t RxData[1024]__attribute__((__aligned__(4))); //ʵ<><CAB5><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ע<><D7A2>4<EFBFBD>ֽڶ<D6BD><DAB6><EFBFBD> ע<><D7A2><EFBFBD><EFBFBD>Ҫ4<D2AA>ֽڶ<D6BD><DAB6>롣
|
||||
}Flash_RxBuf,*UnFlash_RxBuf;
|
||||
|
||||
|
||||
|
||||
typedef struct _Flash_info
|
||||
{
|
||||
uint16_t length; //<2F><><EFBFBD><EFBFBD>
|
||||
uint8_t dataBuffer[1100]; //ƥ<><C6A5>can<61><6E><EFBFBD><EFBFBD>
|
||||
}Flash_info,*UnFlash_info;
|
||||
|
||||
|
||||
|
||||
|
||||
#define FlashBufInitial 0x0//1k<31><6B><EFBFBD>ݳ<EFBFBD>ʼ״̬
|
||||
#define FlashBufInComplete 0x1//<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
#define FlashBufComplete 0x2//1k<31><6B><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define FlashBufCRCFail 0x3//CRCУ<43><D0A3><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
#define FlashBufCRCPass 0x4//CRCУ<43><D0A3><EFBFBD>ճɹ<D5B3>
|
||||
#define FlashBufWrite 0x5//<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
|
||||
|
||||
//typedef struct
|
||||
//{
|
||||
// u8 iapFileFlag[8]; //8-byte IAP flag, fixed as "WCHNET", the extra space is 0
|
||||
// u32 iapFileLen; //4 bytes IAP file length, which is bin file length + 512 bytes
|
||||
// u32 iapFileCheckSum; //4-byte checksum
|
||||
//}iapFileHeader;
|
||||
//
|
||||
//typedef struct{
|
||||
// u16 readIndex;
|
||||
// u16 writeIndex;
|
||||
// u16 buffUsedLen;
|
||||
// u8 *dataBuff;
|
||||
//}ethDataDeal;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct _ENET_RxBuf
|
||||
{
|
||||
uint8_t readPos; ///< read position in buffer
|
||||
uint8_t writePos; ///< write position in buffer
|
||||
uint8_t recvCount; ///< receive message count in buffer
|
||||
uint8_t RxData[8]; //ʵ<><CAB5><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}ENET_RxBuf,*pENET_RxBuf;
|
||||
|
||||
|
||||
typedef struct {
|
||||
volatile uint8_t canBootloaderUpgrade; //CAN<41><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
uint8_t test1;
|
||||
uint8_t test2;
|
||||
uint8_t test3;
|
||||
} SystemDataRecord;//<2F><><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APPͬ<50><CDAC>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern struct flash_info *flash_info;
|
||||
extern struct spi_nor flash;
|
||||
|
||||
extern flexcan_handle_t *handle;
|
||||
extern void flexcan_transfer_callback(flexcan_handle_t *handle,
|
||||
flexcan_status_e status, uint32_t result,
|
||||
void *userData);
|
||||
|
||||
|
||||
|
||||
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD>ݽṹ
|
||||
extern u8 IPAddr[4];//IP address
|
||||
extern u8 GWIPAddr[4];//Gateway IP address
|
||||
extern u8 IPMask[4];//subnet mask
|
||||
extern u8 DESIP[4];//destination IP address
|
||||
extern u16 desport;//destination port
|
||||
extern u16 srcport;//source port
|
||||
extern SystemDataRecord g_systemDataRecord;
|
||||
//extern ethDataDeal dataDeal;
|
||||
//extern iapFileHeader iapPara;
|
||||
extern u32 fileDataLen;
|
||||
extern u32 fileCheckSum;
|
||||
extern ENET_RxBuf ENET_RxBuf_1;
|
||||
extern CBL_CMD_LIST g_cmdList;
|
||||
extern volatile uint8_t g_canRxMsgFlag ;//<2F><><EFBFBD>յ<EFBFBD>CAN<41><4E><EFBFBD>ݺ<EFBFBD><DDBA>ı<EFBFBD>־
|
||||
extern uint16_t g_canAddr;
|
||||
extern uint8_t g_recvData[1028];
|
||||
extern uint32_t g_recvLen;
|
||||
extern uint32_t OTA_CANTxID ;//Ĭ<>Ϸ<EFBFBD><CFB7><EFBFBD>IDΪ0x02
|
||||
extern uint32_t OTA_CANRxID ;//Ĭ<>Ͻ<EFBFBD><CFBD><EFBFBD>IDΪ0x01
|
||||
extern uint32_t WDT_CANRxID ;//Ĭ<>Ͻ<EFBFBD><CFBD><EFBFBD>IDΪ0x03
|
||||
extern Flash_RxBuf Flash_RxBuf_1;
|
||||
extern Flash_RxBuf Flash_RxBuf_2;
|
||||
|
||||
extern bool WDTReFresh_flag;//busoff<66><66>־
|
||||
extern volatile uint16_t Eth_Rx_Flag;//<2F><><EFBFBD>յ<EFBFBD>CAN<41><4E><EFBFBD>ݺ<EFBFBD><DDBA>ı<EFBFBD>־
|
||||
extern uint8_t des_ipaddr[4];//<2F><><EFBFBD><EFBFBD>IP
|
||||
extern uint8_t flash_eth_time;//
|
||||
extern uint8_t ethCmdSTT;
|
||||
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>
|
||||
|
||||
void goToApp(void);
|
||||
u8 IAPCopyFlashDeal(void);
|
||||
void IAPParaInit(void);
|
||||
void saveUpdatedFile(void);
|
||||
void receUpdatedFile(u8 id);
|
||||
void IAPFileParaCheck(u8 id);
|
||||
uint16_t CAN_BootGetAddrData(void);
|
||||
void ReadUpgradeFlag(void);
|
||||
void IAP_EEPROM_ERASE_108k(u32 StartAddr);
|
||||
void IAP_EEPROM_READ( u32 StartAddr, u8 *Buffer, u32 Length );
|
||||
void IAP_EEPROM_ERASE(uint32_t Page_Address, u32 Length);
|
||||
void IAP_EEPROM_WRITE( u32 StartAddr, u8 *Buffer, u32 Length );
|
||||
int DataRecord_WriteUpgrade(uint8_t upgradeFlag);
|
||||
void WCHNET_HandleGlobalInt(void);
|
||||
|
||||
unsigned char rdbyte_24c02(unsigned int add);
|
||||
void wrbyte_24c02(unsigned int add,unsigned char dat);
|
||||
void initSpi();
|
||||
|
||||
|
||||
|
||||
#endif /* __IAP_TASK_H__ */
|
||||
104
btm_init.c
Normal file
104
btm_init.c
Normal file
@@ -0,0 +1,104 @@
|
||||
#include "regs_base.h"
|
||||
#include "irq_num.h"
|
||||
#include "btm_init.h"
|
||||
|
||||
|
||||
static sdrv_btm_t gstsdrv_btm_timer0;
|
||||
sdrv_btm_t gstsdrv_btm_timer1;
|
||||
|
||||
volatile uint8_t Btm10ms = 0;
|
||||
volatile uint8_t Btm1ms = 0;
|
||||
|
||||
|
||||
#define DEVICE_BASE(dev) _DEVICE_BASE(dev)
|
||||
#define _DEVICE_BASE(dev) APB_##dev##_BASE
|
||||
|
||||
#define DEVICE_INTR(dev) _DEVICE_INTR(dev)
|
||||
#define _DEVICE_INTR(dev) dev##_INTR_NUM
|
||||
|
||||
|
||||
|
||||
/*SDRV_BTM_G0时钟来源于APB clock, APB clock等于150MHz*/
|
||||
/*SDRV_BTM_G0分频之后，clock等于1M*/
|
||||
static sdrv_btm_cfg_t timer0_config = {
|
||||
.base = DEVICE_BASE(BTM2),
|
||||
.irq = DEVICE_INTR(BTM2_O_BTM),
|
||||
.tmr_id = SDRV_BTM_G0,
|
||||
.tmr_cfg = {
|
||||
.si_val = 74, /*输入时钟每(si_val + 1)cycle, G0计数器增加inc_val个*/
|
||||
.inc_val = 1,
|
||||
.frc_rld_rst_cnt_en = true, /*默认是true，表示初始化时是否对counter清零。*/
|
||||
.term_use_mode = SDRV_BTM_DIRECT, /*设置overflow值立即生效，而不是等到下一周期生效。*/
|
||||
.cmp_use_mode = SDRV_BTM_DIRECT, /*设置compare值立即生效，而不是等到下一周期生效。*/
|
||||
.cnt_dir = SDRV_BTM_CNT_UP, /*设置计数器的值是向上增长*/
|
||||
.cnt_mode = SDRV_BTM_CONTINOUS_MODE, /*设置计数器是连续模式*/
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
/*SDRV_BTM_G1时钟来源于外部晶振，等于24MHz*/
|
||||
/*SDRV_BTM_G1分频之后，clock等于1M*/
|
||||
static sdrv_btm_cfg_t timer1_config = {
|
||||
.base = DEVICE_BASE(BTM2),
|
||||
.irq = DEVICE_INTR(BTM2_O_BTM),
|
||||
.tmr_id = SDRV_BTM_G1,
|
||||
.tmr_cfg = {
|
||||
.si_val = 23,
|
||||
.inc_val = 1,
|
||||
.frc_rld_rst_cnt_en = true,
|
||||
.term_use_mode = SDRV_BTM_DIRECT,
|
||||
.cmp_use_mode = SDRV_BTM_DIRECT,
|
||||
.cnt_dir = SDRV_BTM_CNT_UP,
|
||||
.cnt_mode = SDRV_BTM_CONTINOUS_MODE,
|
||||
}
|
||||
};
|
||||
|
||||
//回调处理，10ms定时标志
|
||||
static void timer1_handle(void *arg)
|
||||
{
|
||||
static int timer1_count = 0;
|
||||
timer1_count++;
|
||||
|
||||
Btm1ms = 1;
|
||||
|
||||
if(timer1_count >= 10)
|
||||
{
|
||||
timer1_count = 0;
|
||||
Btm10ms = 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*启用g1计数器*/
|
||||
int btm_init(void)
|
||||
{
|
||||
sdrv_btm_init(&gstsdrv_btm_timer1, &timer0_config);//定时器1初始化
|
||||
sdrv_btm_set_callback(&gstsdrv_btm_timer1, timer1_handle, &gstsdrv_btm_timer1);//设定回调函数
|
||||
sdrv_btm_start(&gstsdrv_btm_timer1, BTM_TYPE_PERIOD, BTM_TIME_US, 1000);//设定1000us定时
|
||||
|
||||
sdrv_btm_init(&gstsdrv_btm_timer0, &timer1_config);//定时器0初始化
|
||||
sdrv_btm_start(&gstsdrv_btm_timer0, BTM_TYPE_PERIOD, BTM_TIME_MS, ~0);//设定1ms定时
|
||||
return 0;
|
||||
}
|
||||
|
||||
//获取当前计数器时间,lwip用
|
||||
uint32_t current_time(void)
|
||||
{
|
||||
return sdrv_btm_get_current_time(&gstsdrv_btm_timer0) / 1000;
|
||||
}
|
||||
|
||||
//获取当前计数器时间us
|
||||
uint32_t getCurrentTime(void)
|
||||
{
|
||||
return sdrv_btm_get_current_time(&gstsdrv_btm_timer0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
16
btm_init.h
Normal file
16
btm_init.h
Normal file
@@ -0,0 +1,16 @@
|
||||
#ifndef __BTM_INIT_H__
|
||||
#define __BTM_INIT_H__
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include "sdrv_btm.h"
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
extern volatile uint8_t Btm10ms;
|
||||
extern volatile uint8_t Btm1ms;
|
||||
extern sdrv_btm_t gstsdrv_btm_timer1;
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
int btm_init(void);
|
||||
|
||||
#endif /* __BTM_INIT_H__ */
|
||||
51
crc16.h
Normal file
51
crc16.h
Normal file
@@ -0,0 +1,51 @@
|
||||
#ifndef _CRC16_H_
|
||||
#define _CRC16_H_
|
||||
|
||||
static const uint16_t crc16tab[256] = {
|
||||
0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
|
||||
0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
|
||||
0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
|
||||
0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
|
||||
0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
|
||||
0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
|
||||
0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
|
||||
0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
|
||||
0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
|
||||
0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
|
||||
0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
|
||||
0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
|
||||
0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
|
||||
0xedae, 0xfd8f, 0xcdcc, 0xdded, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
|
||||
0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
|
||||
0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
|
||||
0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
|
||||
0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
|
||||
0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
|
||||
0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
|
||||
0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
|
||||
0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
|
||||
0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
|
||||
0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
|
||||
0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
|
||||
0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
|
||||
0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
|
||||
0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
|
||||
0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
|
||||
0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
|
||||
0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
|
||||
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
|
||||
};
|
||||
|
||||
__inline unsigned short crc16_ccitt(const unsigned char *buf, unsigned int len)
|
||||
{
|
||||
register unsigned int counter;
|
||||
register unsigned short crc = 0;
|
||||
for( counter = 0; counter < len; counter++)
|
||||
crc = (crc<<8) ^ crc16tab[((crc>>8) ^ *(unsigned char *)buf++)&0x00FF];
|
||||
return crc;
|
||||
}
|
||||
extern __inline unsigned short crc16_ccitt(const unsigned char *buf, unsigned int len);
|
||||
|
||||
#endif /* _CRC16_H_ */
|
||||
|
||||
|
||||
249
flexcan_init.c
Normal file
249
flexcan_init.c
Normal file
@@ -0,0 +1,249 @@
|
||||
|
||||
#include "flexcan_init.h"
|
||||
#include "IAP_Task.h"
|
||||
#include <flexcan_cfg.h>
|
||||
#include <debug.h>
|
||||
#include <wdt_refresh.h>
|
||||
|
||||
|
||||
#define TX_PADDING_VAL (0xA5)
|
||||
|
||||
static uint8_t g_rxFifoDataBuf[8];
|
||||
static flexcan_frame_t g_frameBuf;
|
||||
|
||||
bool busoff_occur_flag = false;//busoff<66><66>־
|
||||
|
||||
|
||||
void flexcan_config_rx_fifo(flexcan_handle_t *handle,
|
||||
flexcan_rx_fifo_config_t *config)
|
||||
{
|
||||
flexcan_frame_t *rx_fifo_frame = &g_frameBuf;
|
||||
rx_fifo_frame->dataBuffer = &g_rxFifoDataBuf[0];
|
||||
|
||||
flexcan_set_rx_fifo_config(handle, config);
|
||||
|
||||
for (uint8_t i = 0; i < USED_MB_FOR_FIFO;
|
||||
i++) {
|
||||
flexcan_set_rx_individual_mask(handle, i, config->filter_tab[i].filter_mask);
|
||||
}
|
||||
|
||||
/* rx by interrupt */
|
||||
flexcan_fifo_transfer_t Xfer = {rx_fifo_frame};
|
||||
flexcan_receive_fifo_nonblocking(handle, &Xfer);
|
||||
}
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn CAN_Send_Msg
|
||||
*
|
||||
* @brief CAN Transmit function.
|
||||
*
|
||||
* @param CANx- CAN1 or CAN2
|
||||
* ID - Message ID
|
||||
* IDE - CAN_Id_Standard or CAN_Id_Extended
|
||||
* RTR - CAN_RTR_Data or CAN_RTR_Remote
|
||||
* msg - Transmit data buffer.
|
||||
* len - Data length.
|
||||
*
|
||||
* @return 0 - Send successful.
|
||||
* 1 - Send failed.
|
||||
*/
|
||||
uint8_t CAN_Send_Msg( flexcan_handle_t *handle, uint32_t ID, flexcan_frame_format_e ide, flexcan_frame_type_e rtr, uint8_t *msg, uint8_t len, uint8_t tx_index)
|
||||
{
|
||||
uint16_t i = 0;
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
flexcan_frame_t frame = {.id = ID,
|
||||
.length = len,
|
||||
.type = rtr,
|
||||
.format = ide,
|
||||
.dataBuffer = msg};
|
||||
flexcan_mb_transfer_t xfer = {&frame, tx_index};
|
||||
|
||||
while( ( flexcan_get_mb_state(handle, tx_index) != FLEXCAN_StateIdle ) && (i < 0xFFF) )
|
||||
{
|
||||
i++;
|
||||
}
|
||||
|
||||
if( i == 0xFFF )
|
||||
{
|
||||
return 1;
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
flexcan_send_nonblocking(handle, &xfer, TX_PADDING_VAL);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn flexcan_transfer_callback
|
||||
*
|
||||
* @brief erase Data-Flash block, minimal block is 256B
|
||||
*
|
||||
* @param Page_Address - the address of the page being erased.
|
||||
* Length - Erased data length
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
uint32_t debugaa = 0;
|
||||
void flexcan_transfer_callback(flexcan_handle_t *handle,
|
||||
flexcan_status_e status, uint32_t result,
|
||||
void *userData)
|
||||
{
|
||||
// uint8_t ip_addr[4] = {0,0,0,0};
|
||||
// uint16_t i = 0;
|
||||
uint16_t FrameHeader = 0;
|
||||
// uint16_t canAddr = 0;
|
||||
flexcan_frame_t *buf = (flexcan_frame_t *)userData;
|
||||
// uint32_t Rgflexcan_transferCRC = 0;
|
||||
static uint8_t canCmdSTT = 0;
|
||||
// static uint32_t CANFlashNowLen1 = 0;
|
||||
// static uint32_t CANFlashNowLen2 = 0;
|
||||
|
||||
// uint32_t debugARR1[2] = {0,0};
|
||||
//--------------------------------------------------------------
|
||||
// ssdk_printf(SSDK_CRIT, "status:0x%x\r\n",status);
|
||||
switch (status)
|
||||
{
|
||||
case FLEXCAN_RX_IDLE:
|
||||
break;
|
||||
|
||||
case FLEXCAN_RX_FIFO_IDLE:
|
||||
|
||||
|
||||
if(OTA_CANRxID == (buf->id))//IDΪ1
|
||||
{
|
||||
g_canRxMsgFlag = 1;
|
||||
FrameHeader = ( (buf->dataBuffer[0] << 8) | (buf->dataBuffer[1]) );
|
||||
|
||||
// ssdk_printf(SSDK_CRIT, "FrameHeader:0x%x\r\n",FrameHeader);
|
||||
|
||||
switch(canCmdSTT)
|
||||
{
|
||||
case 0:
|
||||
if(FrameHeader == CRC_UPDATE )//CRCָ<43><D6B8>
|
||||
{
|
||||
memcpy(&ENET_RxBuf_1.RxData[0],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
Flash_RxBuf_1.Download_Mode = DOWNLOAD_CAN;
|
||||
|
||||
if( (FlashBufInitial == (Flash_RxBuf_1.Flash_RxBufSta)) || (FlashBufCRCFail == (Flash_RxBuf_1.Flash_RxBufSta)) || (FlashBufWrite == (Flash_RxBuf_1.Flash_RxBufSta)) )//<2F><>ʼ״̬<D7B4><CCAC>д<EFBFBD><D0B4><EFBFBD>ɣ<EFBFBD>crc<72><63><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
|
||||
{
|
||||
Flash_RxBuf_1.Flash_RxBufCRC = ( (buf->dataBuffer[2] << 8) | (buf->dataBuffer[3]) );//CRC
|
||||
Flash_RxBuf_1.Flash_RxBufLen = ( (buf->dataBuffer[5] << 16) | (buf->dataBuffer[6] << 8) | (buf->dataBuffer[7]) );//֡<><D6A1><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_1.Flash_RxBufLenNow = 0;
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
canCmdSTT = 10;
|
||||
}
|
||||
else if( (FlashBufInitial == (Flash_RxBuf_2.Flash_RxBufSta)) || (FlashBufCRCFail == (Flash_RxBuf_2.Flash_RxBufSta)) || (FlashBufWrite == (Flash_RxBuf_2.Flash_RxBufSta)) )//<2F><>ʼ״̬<D7B4><CCAC>д<EFBFBD><D0B4><EFBFBD>ɣ<EFBFBD>crc<72><63><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
|
||||
{
|
||||
Flash_RxBuf_2.Flash_RxBufCRC = ( (buf->dataBuffer[2] << 8) | (buf->dataBuffer[3]) );//CRC
|
||||
Flash_RxBuf_2.Flash_RxBufLen = ( (buf->dataBuffer[5] << 16) | (buf->dataBuffer[6] << 8) | (buf->dataBuffer[7]) );//֡<><D6A1><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_2.Flash_RxBufLenNow = 0;
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
canCmdSTT = 20;
|
||||
}
|
||||
else{}
|
||||
}
|
||||
else//<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
{
|
||||
memcpy(&ENET_RxBuf_1.RxData[0],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
canCmdSTT = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 10://<2F><>ȡflash
|
||||
ENET_RxBuf_1.RxData[0] = (uint8_t)(CRC_UPDATE >> 8);//<2F><>λ <20>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD>ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
ENET_RxBuf_1.RxData[1] = (uint8_t)(CRC_UPDATE);
|
||||
|
||||
memcpy(&Flash_RxBuf_1.RxData[Flash_RxBuf_1.Flash_RxBufLenNow],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_1.Flash_RxBufLenNow = (Flash_RxBuf_1.Flash_RxBufLenNow) + (buf->length);
|
||||
if( (Flash_RxBuf_1.Flash_RxBufLenNow) >= (Flash_RxBuf_1.Flash_RxBufLen) )//<2F><><EFBFBD>ճ<EFBFBD><D5B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>
|
||||
{
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufComplete;//<2F>л<EFBFBD>״̬
|
||||
canCmdSTT = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
canCmdSTT = 10;
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case 20://<2F><><EFBFBD><EFBFBD>2
|
||||
ENET_RxBuf_1.RxData[0] = (uint8_t)(CRC_UPDATE >> 8);//<2F><>λ <20>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD>ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
ENET_RxBuf_1.RxData[1] = (uint8_t)(CRC_UPDATE);
|
||||
memcpy(&Flash_RxBuf_2.RxData[Flash_RxBuf_2.Flash_RxBufLenNow],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_2.Flash_RxBufLenNow = (Flash_RxBuf_2.Flash_RxBufLenNow) + (buf->length);
|
||||
|
||||
if( (Flash_RxBuf_2.Flash_RxBufLenNow) >= (Flash_RxBuf_2.Flash_RxBufLen) )//<2F><><EFBFBD>ճ<EFBFBD><D5B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>
|
||||
{
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufComplete;//<2F>л<EFBFBD>״̬
|
||||
canCmdSTT = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
canCmdSTT = 20;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if(WDT_CANRxID == (buf->id))//WDT <20><>ID
|
||||
{
|
||||
FrameHeader = ( (buf->dataBuffer[0] << 8) | (buf->dataBuffer[1]) );
|
||||
|
||||
if(WDT_Refresh == FrameHeader)//ι<><CEB9>
|
||||
{
|
||||
|
||||
WDTReFresh_flag = true;//<2F><><EFBFBD>յ<EFBFBD>֡<EFBFBD><EFBFBD><CDB8><EFBFBD>
|
||||
ssdk_printf(SSDK_CRIT, "WDT_Refresh:0x%x\r\n", WDTReFresh_flag);
|
||||
}
|
||||
}
|
||||
else{}
|
||||
break;
|
||||
|
||||
case FLEXCAN_TX_IDLE:
|
||||
break;
|
||||
|
||||
case FLEXCAN_WAKEUP_TIMEOUT:
|
||||
break;
|
||||
|
||||
case FLEXCAN_WAKEUP_MATCH:
|
||||
break;
|
||||
|
||||
case FLEXCAN_ERROR_STATUS:
|
||||
busoff_occur_flag = true;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* reinitialize the controller. */
|
||||
void flexcan_busoff_recovery_demo(flexcan_handle_t *handle)
|
||||
{
|
||||
flexcan_deinit(handle);
|
||||
flexcan_init(handle, &g_flexcan_config);
|
||||
|
||||
flexcan_enable_interrupts(handle, FLEXCAN_BusOffInterruptEnable);
|
||||
|
||||
/* assign fifo only for rx. */
|
||||
flexcan_config_rx_fifo(handle, &flexcan_fifo_cfg);
|
||||
|
||||
/* assign mailbox14-20 for tx. */
|
||||
for (uint8_t i = TX_MB_INDEX; i < (TX_MB_INDEX + TX_MAILBOX_NUM);
|
||||
i++) {
|
||||
|
||||
flexcan_set_tx_mb_config(handle, i, true);
|
||||
}
|
||||
}
|
||||
|
||||
29
flexcan_init.h
Normal file
29
flexcan_init.h
Normal file
@@ -0,0 +1,29 @@
|
||||
|
||||
#ifndef __flexcan_init_H__
|
||||
#define __flexcan_init_H__
|
||||
|
||||
#include "regs_base.h"
|
||||
#include "irq_num.h"
|
||||
#include <sdrv_flexcan.h>
|
||||
|
||||
#define TX_MB_INDEX (USED_MB_FOR_FIFO)
|
||||
|
||||
|
||||
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>
|
||||
void flexcan_transfer_callback(flexcan_handle_t *handle,flexcan_status_e status, uint32_t result,void *userData);
|
||||
void flexcan_config_rx_fifo(flexcan_handle_t *handle,flexcan_rx_fifo_config_t *config);
|
||||
uint8_t CAN_Send_Msg( flexcan_handle_t *handle, uint32_t ID, flexcan_frame_format_e ide, flexcan_frame_type_e rtr, uint8_t *msg, uint8_t len, uint8_t tx_index);
|
||||
void flexcan_busoff_recovery_demo(flexcan_handle_t *handle);
|
||||
|
||||
|
||||
|
||||
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>
|
||||
extern flexcan_handle_t g_flexcan_handle;
|
||||
extern bool busoff_occur_flag;//<2F><>־<EFBFBD><D6BE>
|
||||
extern bool WDTReFresh_flag;//<2F><><EFBFBD>±<EFBFBD>־
|
||||
|
||||
|
||||
|
||||
#endif /* __IAP_TASK_H__ */
|
||||
293
interface_ethernet.c
Normal file
293
interface_ethernet.c
Normal file
@@ -0,0 +1,293 @@
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include "debug.h"
|
||||
#include <string.h>
|
||||
#include <udelay/udelay.h>
|
||||
#include "interface_ethernet.h"
|
||||
#include "eth_cfg.h"
|
||||
#include "lwip/timeouts.h"
|
||||
#include "sdrv_eth.h"
|
||||
#include "IAP_Task.h"
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define MAX_BUFFER_SIZE (sizeof(((RequestContext *)0)->param_request->arr))
|
||||
#define MAX_PACKET_SIZE 1024 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>СΪ1K
|
||||
|
||||
|
||||
struct udp_pcb *udpcb_1;
|
||||
struct udp_pcb *udpcb_2;
|
||||
struct udp_pcb *udpcb_3;
|
||||
|
||||
bool eth_pool_rx = false;
|
||||
|
||||
|
||||
UnEthernetFault ethernet_fault_Info = {
|
||||
.bit_data.auto_count = 0,
|
||||
.bit_data.manual_count = 0,
|
||||
.bit_data.auto_state = 0,
|
||||
.bit_data.manual_state = 0,
|
||||
};
|
||||
|
||||
|
||||
|
||||
StrEthernetParameter ethernet_parameter = {
|
||||
.local_ip = {192,168,17,20},
|
||||
.mask = {255,255,255,0},
|
||||
.computer_ip = {192,168,17,3},
|
||||
.local_communication_port = 8011,
|
||||
.Local_upper_port = 8000,
|
||||
.Local_download_port = 7811,
|
||||
.upper_ip = {192,168,17,3},
|
||||
.download_ip = {192,168,17,183},
|
||||
.target_upper_port = 8000,
|
||||
.target_download_port = 7811,
|
||||
.target_communication_port = 8011,
|
||||
};
|
||||
|
||||
|
||||
|
||||
static bool g_eth1_rx_pkt;
|
||||
|
||||
|
||||
|
||||
static void eth_dma_rx_int_cb(struct net_driver_s *dev)
|
||||
{
|
||||
if (dev == &g_eth1_dev)
|
||||
g_eth1_rx_pkt = true;
|
||||
}
|
||||
|
||||
|
||||
|
||||
void lwip_Ethernet(void)
|
||||
{
|
||||
// <20><><EFBFBD><EFBFBD>ETH֡<48><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD>LWIPЭ<50><D0AD>ջ
|
||||
// <20><><EFBFBD><EFBFBD>ʹ<EFBFBD>ܽ<EFBFBD><DCBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD>ΪISR<53><52><EFBFBD><EFBFBD>disable<6C><65><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20>жϽ<D0B6><CFBD>ձ<EFBFBD>־(g_eth1_rx_pkt)<29>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>в<EFBFBD><D0B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20>µĽ<C2B5><C4BD><EFBFBD><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD>ԣ<EFBFBD><D4A3><EFBFBD><EFBFBD>ﲻ<EFBFBD><EFB2BB><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⡣
|
||||
if ((!eth_pool_rx && g_eth1_rx_pkt) || eth_pool_rx)
|
||||
{
|
||||
g_eth1_rx_pkt = false;
|
||||
dwc_eth_rx(&g_eth1_dev, eth_pool_rx);
|
||||
}
|
||||
|
||||
// LWIPЭ<50><D0AD>ջ<EFBFBD>ӿڣ<D3BF><DAA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>LWIP<49><50>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
sys_check_timeouts();
|
||||
|
||||
// printf("lwipInterface spend time:%d\n",getCurrentTime() - time_boot);//<2F><><EFBFBD><EFBFBD>app<70><70><EFBFBD>˶ʱ<E0B3A4><CAB1>
|
||||
}
|
||||
|
||||
|
||||
//err_t
|
||||
//udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
|
||||
|
||||
void UdpSendToData(uint8_t udpcbID, uint8_t *buf, uint16_t len, uint8_t *sip, uint16_t port)
|
||||
{
|
||||
struct pbuf *DesPuff = NULL;
|
||||
ip4_addr_t Desaddr;
|
||||
//----------------------------------------------------------------------------------------------------
|
||||
IP4_ADDR(&Desaddr,sip[0],sip[1],sip[2],sip[3]);//<2F><>ֵַת<D6B5><D7AA>
|
||||
|
||||
DesPuff = pbuf_alloc(PBUF_TRANSPORT, len, PBUF_POOL); /* <20><><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD> */
|
||||
|
||||
pbuf_take(DesPuff, buf, len); /* <20><>g_lwip_demo_sendbuf<75>е<EFBFBD><D0B5><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD>pbuf<75>ṹ<EFBFBD><E1B9B9> */
|
||||
|
||||
if(UDPCB_1 == udpcbID)
|
||||
{
|
||||
udp_sendto(udpcb_1, DesPuff, &Desaddr, port);
|
||||
}
|
||||
else if(UDPCB_2 == udpcbID)
|
||||
{
|
||||
udp_sendto(udpcb_2, DesPuff, &Desaddr, port);
|
||||
}
|
||||
else
|
||||
{
|
||||
}
|
||||
pbuf_free(DesPuff); /* <20>ͷ<EFBFBD><CDB7>ڴ<EFBFBD> */
|
||||
}
|
||||
|
||||
// udpcbID UDP<44><50><EFBFBD><EFBFBD>
|
||||
//recv <20>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
//port <20>˿<F3B6A8B6>
|
||||
void UDP_Echo_Init(uint8_t udpcbID, udp_recv_fn recv, uint16_t port)
|
||||
{
|
||||
//------------------------------------------
|
||||
if(UDPCB_1 == udpcbID)
|
||||
{
|
||||
/* <20>½<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ƿ<EFBFBD>*/
|
||||
udpcb_1 = udp_new();
|
||||
ASSERT(udpcb_1);
|
||||
/* <20>˿ں<CBBF> */
|
||||
udp_bind(udpcb_1, IP_ADDR_ANY, port);
|
||||
/* ע<><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD> */
|
||||
udp_recv(udpcb_1, recv, (void *)udpcbID);
|
||||
}
|
||||
else if(UDPCB_2 == udpcbID)
|
||||
{
|
||||
/* <20>½<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ƿ<EFBFBD>*/
|
||||
udpcb_2 = udp_new();
|
||||
ASSERT(udpcb_2);
|
||||
/* <20>˿ں<CBBF> */
|
||||
udp_bind(udpcb_2, IP_ADDR_ANY, port);
|
||||
/* ע<><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD> */
|
||||
udp_recv(udpcb_2, recv, (void *)udpcbID);
|
||||
}
|
||||
else if(UDPCB_3 == udpcbID)
|
||||
{
|
||||
/* <20>½<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ƿ<EFBFBD>*/
|
||||
udpcb_3 = udp_new();
|
||||
ASSERT(udpcb_3);
|
||||
/* <20>˿ں<CBBF> */
|
||||
udp_bind(udpcb_3, IP_ADDR_ANY, port);
|
||||
/* ע<><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD> */
|
||||
udp_recv(udpcb_3, recv, (void *)udpcbID);
|
||||
}
|
||||
else
|
||||
{
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
void udp_Callback_2(void *arg, struct udp_pcb *upcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
|
||||
{
|
||||
uint16_t FrameHeader = 0;
|
||||
|
||||
uint8_t *Abuf = (uint8_t *)(p->payload);
|
||||
|
||||
// Eth_Rx_Flag = 1;
|
||||
|
||||
FrameHeader = ( (Abuf[0] << 8) | (Abuf[1]) );
|
||||
|
||||
if(WDT_Refresh == FrameHeader)//ι<><CEB9>
|
||||
{
|
||||
WDTReFresh_flag = true;//<2F><><EFBFBD>յ<EFBFBD>֡<EFBFBD><EFBFBD><CDB8><EFBFBD>
|
||||
ssdk_printf(SSDK_CRIT, "WDT_Refresh:0x%x\r\n", WDTReFresh_flag);
|
||||
}
|
||||
|
||||
pbuf_free(p);
|
||||
}
|
||||
|
||||
|
||||
void udp_Callback_1(void *arg, struct udp_pcb *upcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
|
||||
{
|
||||
uint8_t *Abuf = (uint8_t *)(p->payload);
|
||||
|
||||
Flash_info Bbuf = {0};
|
||||
Flash_info *buf = &Bbuf;
|
||||
uint16_t FrameHeader = 0;
|
||||
//------------------------------------------------------------------------------
|
||||
des_ipaddr[0] = addr->addr & 0xff; /* IADDR4 */
|
||||
des_ipaddr[1] = (addr->addr >> 8) & 0xff; /* IADDR3 */
|
||||
des_ipaddr[2] = (addr->addr >> 16) & 0xff; /* IADDR2 */
|
||||
des_ipaddr[3] = (addr->addr >> 24) & 0xff; /* IADDR1 */
|
||||
|
||||
Eth_Rx_Flag ++;
|
||||
Flash_RxBuf_1.Download_Mode = DOWNLOAD_ETH;//<2F><>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
|
||||
|
||||
for(uint16_t i = 0;i < (p->len);i++)//<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>
|
||||
{
|
||||
buf->dataBuffer[i] = Abuf[i];
|
||||
}
|
||||
buf->length = p->len;//<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
FrameHeader = ( (buf->dataBuffer[0] << 8) | (buf->dataBuffer[1]) );
|
||||
|
||||
switch(ethCmdSTT)
|
||||
{
|
||||
case 0:
|
||||
if(FrameHeader == CRC_UPDATE )//CRCָ<43><D6B8>
|
||||
{
|
||||
memcpy(&ENET_RxBuf_1.RxData[0],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
flash_eth_time = 1;
|
||||
|
||||
if( (FlashBufInitial == (Flash_RxBuf_1.Flash_RxBufSta)) || (FlashBufCRCFail == (Flash_RxBuf_1.Flash_RxBufSta)) || (FlashBufWrite == (Flash_RxBuf_1.Flash_RxBufSta)) )//<2F><>ʼ״̬<D7B4><CCAC>д<EFBFBD><D0B4><EFBFBD>ɣ<EFBFBD>crc<72><63><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
|
||||
{
|
||||
Flash_RxBuf_1.Flash_RxBufCRC = ( (buf->dataBuffer[2] << 8) | (buf->dataBuffer[3]) );//CRC
|
||||
Flash_RxBuf_1.Flash_RxBufLen = ( (buf->dataBuffer[5] << 16) | (buf->dataBuffer[6] << 8) | (buf->dataBuffer[7]) );//֡<><D6A1><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_1.Flash_RxBufLenNow = 0;
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
ethCmdSTT = 10;
|
||||
}
|
||||
else if( (FlashBufInitial == (Flash_RxBuf_2.Flash_RxBufSta)) || (FlashBufCRCFail == (Flash_RxBuf_2.Flash_RxBufSta)) || (FlashBufWrite == (Flash_RxBuf_2.Flash_RxBufSta)) )//<2F><>ʼ״̬<D7B4><CCAC>д<EFBFBD><D0B4><EFBFBD>ɣ<EFBFBD>crc<72><63><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
|
||||
{
|
||||
Flash_RxBuf_2.Flash_RxBufCRC = ( (buf->dataBuffer[2] << 8) | (buf->dataBuffer[3]) );//CRC
|
||||
Flash_RxBuf_2.Flash_RxBufLen = ( (buf->dataBuffer[5] << 16) | (buf->dataBuffer[6] << 8) | (buf->dataBuffer[7]) );//֡<><D6A1><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_2.Flash_RxBufLenNow = 0;
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
ethCmdSTT = 20;
|
||||
}
|
||||
else{}
|
||||
}
|
||||
else if(1024 == buf->length )//ֱ<>ӷ<EFBFBD><D3B7><EFBFBD>1K<31><4B><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>û<EFBFBD><C3BB><EFBFBD>յ<EFBFBD>CRC<52><43>ֱ<EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>Ϊ<EFBFBD><CEAA>֡
|
||||
{
|
||||
ENET_RxBuf_1.RxData[0] = (uint8_t)(LOST_FRAME >> 8);//<2F><>λ <20>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD>ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
ENET_RxBuf_1.RxData[1] = (uint8_t)(LOST_FRAME);
|
||||
ethCmdSTT = 0;
|
||||
}
|
||||
else//<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
{
|
||||
memcpy(&ENET_RxBuf_1.RxData[0],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
ssdk_printf(SSDK_CRIT, "ENET_RxBuf[0] :0x%x, ENET_RxBuf[1]:0x%x\r\n", ENET_RxBuf_1.RxData[0],ENET_RxBuf_1.RxData[1]);
|
||||
ethCmdSTT = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 10:
|
||||
ENET_RxBuf_1.RxData[0] = (uint8_t)(CRC_UPDATE >> 8);//<2F><>λ <20>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD>ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
ENET_RxBuf_1.RxData[1] = (uint8_t)(CRC_UPDATE);
|
||||
|
||||
memcpy(&Flash_RxBuf_1.RxData[Flash_RxBuf_1.Flash_RxBufLenNow],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_1.Flash_RxBufLenNow = (Flash_RxBuf_1.Flash_RxBufLenNow) + (buf->length);
|
||||
if( (Flash_RxBuf_1.Flash_RxBufLenNow) >= (Flash_RxBuf_1.Flash_RxBufLen) )//<2F><><EFBFBD>ճ<EFBFBD><D5B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>
|
||||
{
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufComplete;//<2F>л<EFBFBD>״̬
|
||||
ethCmdSTT = 0;
|
||||
flash_eth_time = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
flash_eth_time = 1;
|
||||
Flash_RxBuf_1.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
ethCmdSTT = 10;
|
||||
}
|
||||
break;
|
||||
|
||||
case 20://<2F><><EFBFBD><EFBFBD>2
|
||||
ENET_RxBuf_1.RxData[0] = (uint8_t)(CRC_UPDATE >> 8);//<2F><>λ <20>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD>ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
ENET_RxBuf_1.RxData[1] = (uint8_t)(CRC_UPDATE);
|
||||
memcpy(&Flash_RxBuf_2.RxData[Flash_RxBuf_2.Flash_RxBufLenNow],buf->dataBuffer,buf->length);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Flash_RxBuf_2.Flash_RxBufLenNow = (Flash_RxBuf_2.Flash_RxBufLenNow) + (buf->length);
|
||||
|
||||
if( (Flash_RxBuf_2.Flash_RxBufLenNow) >= (Flash_RxBuf_2.Flash_RxBufLen) )//<2F><><EFBFBD>ճ<EFBFBD><D5B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>
|
||||
{
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufComplete;//<2F>л<EFBFBD>״̬
|
||||
ethCmdSTT = 0;
|
||||
flash_eth_time = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
flash_eth_time = 1;
|
||||
Flash_RxBuf_2.Flash_RxBufSta = FlashBufInComplete;//<2F>л<EFBFBD>״̬
|
||||
ethCmdSTT = 20;
|
||||
}
|
||||
break;
|
||||
}
|
||||
pbuf_free(p);
|
||||
}
|
||||
|
||||
|
||||
// APPģ<50><C4A3><EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>
|
||||
void ethernetInterfaceInit(void)
|
||||
{
|
||||
//-----------------------------------
|
||||
if (!eth_pool_rx) {
|
||||
// ʹ<><CAB9>DMA Rx<52>жϡ<D0B6>Txδʹ<CEB4><CAB9><EFBFBD>жϣ<D0B6><CFA3><EFBFBD>ΪETH<54><48><EFBFBD>ʺܸߣ<DCB8>
|
||||
// Tx<54>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٶȡ<D9B6>
|
||||
dwc_eth_enable_dma_rx_int(&g_eth1_dev, eth_dma_rx_int_cb);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
108
interface_ethernet.h
Normal file
108
interface_ethernet.h
Normal file
@@ -0,0 +1,108 @@
|
||||
#ifndef _INTERFACE_ETHERNET_H_
|
||||
#define _INTERFACE_ETHERNET_H_
|
||||
|
||||
#include "lwip/err.h"
|
||||
#include "lwip/inet.h"
|
||||
#include "lwip/tcp.h"
|
||||
#include "lwip/udp.h"
|
||||
|
||||
#include "lwip/netif.h"
|
||||
#include "lwip/ip.h"
|
||||
#include "lwip/init.h"
|
||||
#include "netif/etharp.h"
|
||||
#include "lwip/pbuf.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//<2F><>̫<EFBFBD><CCAB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
typedef struct _StrEthernetFault
|
||||
{
|
||||
uint8_t auto_count; //<2F>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t manual_count; //<2F>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t auto_state; // <20>Զ<EFBFBD>״̬ | 0<><30><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD>
|
||||
uint8_t manual_state; // <20>ֶ<EFBFBD>״̬ | 0<><30><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD>
|
||||
} StrEthernetFault;
|
||||
|
||||
typedef union _UnEthernetFault
|
||||
{
|
||||
StrEthernetFault bit_data; // ʹ<>ö<EFBFBD><C3B6><EFBFBD><EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t arr[sizeof(StrEthernetFault)]; // ͨ<><CDA8><EFBFBD>ṹ<EFBFBD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD>С
|
||||
} UnEthernetFault;
|
||||
|
||||
|
||||
extern UnEthernetFault ethernet_fault_Info;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t local_ip[4];
|
||||
uint8_t mask[4];
|
||||
uint16_t Local_upper_port;
|
||||
uint16_t Local_download_port;
|
||||
uint16_t local_communication_port;
|
||||
uint8_t computer_ip[4];
|
||||
uint8_t upper_ip[4];
|
||||
uint8_t download_ip[4];
|
||||
uint16_t target_upper_port;
|
||||
uint16_t target_download_port;
|
||||
uint16_t target_communication_port;
|
||||
|
||||
} StrEthernetParameter;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define UDPCB_1 1//ͨѶ<CDA8>˿<EFBFBD>
|
||||
#define UDPCB_2 2//<2F><>λ<EFBFBD><CEBB><EFBFBD>˿<EFBFBD>
|
||||
#define UDPCB_3 3//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>˿<EFBFBD>
|
||||
|
||||
|
||||
|
||||
#define DOWNLOAR_PORT 7812 //<2F><>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD>Ķ˿ڣ<CBBF><DAA3><EFBFBD><EFBFBD>ն˿<D5B6>
|
||||
#define BOOT_TX_PORT 7811 //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>д<EFBFBD>Ķ˿ڣ<CBBF>Ŀ<EFBFBD><C4BF><EFBFBD>˿ڣ<CBBF><DAA3><EFBFBD><EFBFBD><EFBFBD>˭
|
||||
#define WDT_PORT 7813 //<2F><>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD>Ķ˿ڣ<CBBF><DAA3><EFBFBD><EFBFBD>ն˿<D5B6>
|
||||
|
||||
|
||||
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>
|
||||
void UDP_Echo_Init(uint8_t udpcbID, udp_recv_fn recv, uint16_t port);
|
||||
void UdpSendToData(uint8_t udpcbID, uint8_t *buf, uint16_t len, uint8_t *sip, uint16_t port);
|
||||
|
||||
void udp_Callback_1(void *arg, struct udp_pcb *upcb, struct pbuf *p, const ip_addr_t *addr, u16_t port);
|
||||
void udp_Callback_2(void *arg, struct udp_pcb *upcb, struct pbuf *p, const ip_addr_t *addr, u16_t port);
|
||||
void udp_Callback_3(void *arg, struct udp_pcb *upcb, struct pbuf *p, const ip_addr_t *addr, u16_t port);
|
||||
void ethernetTimerProcess(void);
|
||||
void ethernetInterfaceInit(void);
|
||||
void lwip_Ethernet(void);
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>
|
||||
extern struct udp_pcb *udpcb_1;
|
||||
extern StrEthernetParameter ethernet_parameter;
|
||||
|
||||
#endif /*ETH_DEMO_H */
|
||||
288
main.c
Normal file
288
main.c
Normal file
@@ -0,0 +1,288 @@
|
||||
#include <armv7-r/barriers.h>
|
||||
#include <armv7-r/cache.h>
|
||||
#include <clock_cfg.h>
|
||||
#include <clock_ip.h>
|
||||
#include <debug.h>
|
||||
#include <param.h>
|
||||
#include <part.h>
|
||||
#include <pinmux_cfg.h>
|
||||
#include <regs_base.h>
|
||||
#include <remap/remap.h>
|
||||
#include <reset_cfg.h>
|
||||
#include <reset_ip.h>
|
||||
#include <scr_hw.h>
|
||||
#include <sdrv_ckgen.h>
|
||||
#include <sdrv_rstgen.h>
|
||||
#include <sdrv_scr.h>
|
||||
#include <sdrv_spi_nor.h>
|
||||
#include <sdrv_xspi.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <types.h>
|
||||
#include <udelay/udelay.h>
|
||||
#include <sd_boot_img/sd_boot_img.h>
|
||||
#include "board.h"
|
||||
#include "irq_num.h"
|
||||
#include <flexcan_cfg.h>
|
||||
#include "IAP_Task.h"
|
||||
#include "btm_init.h"
|
||||
#include "flexcan_init.h"
|
||||
#include "irq.h"
|
||||
#include <sdrv_gpio.h>
|
||||
#include <wdt_refresh.h>
|
||||
#include "eth_cfg.h"
|
||||
#include "sdrv_eth.h"
|
||||
#include "interface_ethernet.h"
|
||||
|
||||
extern sdrv_scr_t g_scr_ctrl;
|
||||
|
||||
uint32_t udp_length = 0;
|
||||
|
||||
|
||||
#define RFD_ENABLE 0
|
||||
|
||||
static struct spi_nor_host spi_nor_host = {0};
|
||||
static struct xspi_pdata xspi = {0};
|
||||
struct spi_nor flash = {0};
|
||||
struct flash_info *flash_info;
|
||||
flexcan_handle_t g_flexcan_handle;
|
||||
|
||||
static struct xspi_config host_config = {
|
||||
.id = 0,
|
||||
.apb_base = APB_XSPI1PORTA_BASE,
|
||||
.direct_base = XSPI1_XSPI1PORTA_BASE,
|
||||
};
|
||||
|
||||
static struct spi_nor_config config = {
|
||||
.id = 0,
|
||||
.cs = 0,
|
||||
.baudrate = 20000000,
|
||||
.xfer_mode = SPI_NOR_XFER_POLLING_MODE,
|
||||
.dev_mode = SPI_NOR_DEV_SINGLE_MODE,
|
||||
.sw_rst = false, /* config soft reset spi norflash */
|
||||
.async_mode = false,
|
||||
#ifdef CONFIG_HYPERBUS_MODE
|
||||
.hyperbus_mode = CONFIG_HYPERBUS_MODE,
|
||||
#else
|
||||
.hyperbus_mode = false,
|
||||
#endif
|
||||
};
|
||||
|
||||
void xspi_lockstep_enable(bool flag)
|
||||
{
|
||||
#if ((CONFIG_E3210) || (CONFIG_E3110))
|
||||
scr_signal_t signal = SCR_SF_XSPI1_SRC_CFG_LOCKSTEP_MODE_N;
|
||||
#else
|
||||
scr_signal_t signal = SCR_SF_XSPI1_LOCKSTEP_DISABLE;
|
||||
#endif
|
||||
|
||||
sdrv_rstgen_assert(&rstsig_xspi1b);
|
||||
sdrv_rstgen_assert(&rstsig_xspi1a);
|
||||
|
||||
udelay(10u);
|
||||
scr_set(&g_scr_ctrl, &signal, !flag);
|
||||
udelay(10u);
|
||||
|
||||
sdrv_rstgen_deassert(&rstsig_xspi1a);
|
||||
sdrv_rstgen_deassert(&rstsig_xspi1b);
|
||||
}
|
||||
|
||||
void xspi_parallel_enable(bool flag)
|
||||
{
|
||||
scr_signal_t signal = SCR_SF_XSPI1_SRC_CFG_PARALLEL_MODE;
|
||||
|
||||
sdrv_rstgen_assert(&rstsig_xspi1b);
|
||||
sdrv_rstgen_assert(&rstsig_xspi1a);
|
||||
|
||||
udelay(10u);
|
||||
scr_set(&g_scr_ctrl, &signal, flag);
|
||||
udelay(10u);
|
||||
|
||||
sdrv_rstgen_deassert(&rstsig_xspi1a);
|
||||
sdrv_rstgen_deassert(&rstsig_xspi1b);
|
||||
}
|
||||
|
||||
void board_norflash_init(void)
|
||||
{
|
||||
bool locksetp_mode = false;
|
||||
bool parallel_mode = false;
|
||||
/* get xspi1a clk node */
|
||||
sdrv_ckgen_node_t *clk = CLK_NODE(g_ckgen_ip_xspi1a);
|
||||
|
||||
/* config dev spi nor dev single mode */
|
||||
switch (config.dev_mode) {
|
||||
case SPI_NOR_DEV_LOCKSTEP_MODE:
|
||||
locksetp_mode = true;
|
||||
break;
|
||||
|
||||
case SPI_NOR_DEV_PARALLEL_MODE:
|
||||
parallel_mode = true;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* close locksetp/parallel mode */
|
||||
xspi_lockstep_enable(locksetp_mode);
|
||||
xspi_parallel_enable(parallel_mode);
|
||||
|
||||
/* initializes xspi host */
|
||||
host_config.ref_clk = sdrv_ckgen_get_rate(clk);
|
||||
sdrv_xspi_host_init(&spi_nor_host, &xspi, &host_config);
|
||||
spi_nor_host.clk = clk;
|
||||
sdrv_ckgen_set_rate(clk, config.baudrate);
|
||||
ssdk_printf(SSDK_CRIT, "xspi clock rate is %u!\r\n",
|
||||
sdrv_ckgen_get_rate(clk));
|
||||
|
||||
/* initializes spi nor device */
|
||||
if (sdrv_spi_nor_init(&flash, &spi_nor_host, &config)) {
|
||||
ssdk_printf(SSDK_CRIT, "spinor init failed!\r\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* get flash info data information */
|
||||
flash_info = sdrv_spi_nor_get_info(&flash);
|
||||
ssdk_printf(SSDK_CRIT,
|
||||
"spinor flash size = 0x%llx, sector_size = 0x%x \r\n",
|
||||
flash_info->size, flash_info->sector_size);
|
||||
|
||||
#if RFD_ENABLE
|
||||
/* enable rfd */
|
||||
uint8_t rfd_mask = 0;
|
||||
if(!check_rfd(host_config.direct_base, &rfd_mask) && rfd_mask) {
|
||||
sdrv_spi_nor_enable_rfd(&flash, rfd_mask);
|
||||
}
|
||||
#endif
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
uint8_t mainCnt = 0;
|
||||
//uint8_t mainCntarr[8] = {0x56,0x88,0x98,0x79,0x23};
|
||||
//uint8_t mainCntarrRx[8] = {0,0,0,0,0};
|
||||
//uint32_t timeus = 0;
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
uint8_t BOOT_Arr[2] = {0x00,0x01};
|
||||
static uint8_t RgWDT500msflg = 0;
|
||||
//---------------------------------------------------------------
|
||||
/* reset module */
|
||||
board_reset_init();
|
||||
|
||||
/* initializes clock source */
|
||||
sdrv_ckgen_init(&g_clock_config);
|
||||
|
||||
/*VIC<49><43>ʼ<EFBFBD><CABC>*/
|
||||
irq_initialize(VIC1_BASE, IRQ_MAX_INTR_NUM);
|
||||
|
||||
/* config spinor pinmux */
|
||||
sdrv_pinctrl_init(NUM_OF_CONFIGURED_PINS, g_pin_init_config);
|
||||
|
||||
sdrv_gpio_set_pin_output_level(GPIO_B9, 1); //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
External_wdt_refresh();
|
||||
|
||||
// Timer<65><72>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṩLWIP sys_now<6F>ӿڻ<D3BF>ȡ<EFBFBD><C8A1>ǰʱ<C7B0><CAB1>
|
||||
btm_init();
|
||||
|
||||
/* board debug console uart init */
|
||||
board_debug_console_init();
|
||||
|
||||
sdrv_gpio_set_pin_output_level(GPIO_H12, 0); //CANʹ<4E><CAB9>
|
||||
/* initialize the FlexCAN handle. */
|
||||
flexcan_handle_t *handle = &g_flexcan_handle;
|
||||
|
||||
flexcan_create_handle(handle, FLEXCAN6, (void *)APB_CANFD6_BASE,
|
||||
CANFD6_CANFD_INTR_NUM, flexcan_transfer_callback,
|
||||
NULL);
|
||||
|
||||
/* initialize flexCAN. */
|
||||
flexcan_init(handle, &g_flexcan_config);
|
||||
|
||||
/* unfreeze the flexCAN by demo. */
|
||||
flexcan_freeze(handle, false);
|
||||
|
||||
/* enable busoff interrupt. */
|
||||
flexcan_enable_interrupts(handle, FLEXCAN_BusOffInterruptEnable);//
|
||||
|
||||
/* enable irq. */
|
||||
irq_attach(handle->irq_num, flexcan_irq_handler, handle);
|
||||
irq_enable(handle->irq_num);
|
||||
|
||||
/* assign fifo only for rx. */
|
||||
flexcan_config_rx_fifo(handle, &flexcan_fifo_cfg);
|
||||
|
||||
/* assign mailbox14-20 for tx. */
|
||||
for (uint8_t i = TX_MB_INDEX; i < (TX_MB_INDEX + TX_MAILBOX_NUM); i++)
|
||||
{
|
||||
flexcan_set_tx_mb_config(handle, i, true);
|
||||
}
|
||||
sdrv_gpio_set_pin_output_level(GPIO_Y1, 0); //E2дʹ<D0B4><CAB9>
|
||||
|
||||
External_wdt_refresh();
|
||||
|
||||
board_norflash_init();//flash <20><>ʼ<EFBFBD><CABC>
|
||||
|
||||
initSpi();
|
||||
// ETH<54><48>ʼ<EFBFBD><CABC>
|
||||
board_eth_init();
|
||||
// wdt_init(WDT_OUTms);
|
||||
|
||||
// wrbyte_24c02(0x00,1);
|
||||
|
||||
UDP_Echo_Init(UDPCB_1, udp_Callback_1, DOWNLOAR_PORT);
|
||||
|
||||
ethernetInterfaceInit();
|
||||
|
||||
g_systemDataRecord.canBootloaderUpgrade = rdbyte_24c02(0x00);
|
||||
|
||||
des_ipaddr[0] = rdbyte_24c02(BOOT_DES_IP);//<2F><>ȡ<EFBFBD><C8A1><EFBFBD>ص<EFBFBD>IP
|
||||
des_ipaddr[1] = rdbyte_24c02(BOOT_DES_IP+1);//<2F><>ȡ<EFBFBD><C8A1><EFBFBD>ص<EFBFBD>IP
|
||||
des_ipaddr[2] = rdbyte_24c02(BOOT_DES_IP+2);//<2F><>ȡ<EFBFBD><C8A1><EFBFBD>ص<EFBFBD>IP
|
||||
des_ipaddr[3] = rdbyte_24c02(BOOT_DES_IP+3);//<2F><>ȡ<EFBFBD><C8A1><EFBFBD>ص<EFBFBD>IP
|
||||
|
||||
if(g_systemDataRecord.canBootloaderUpgrade == NORMAL_ON)//0<><30><EFBFBD>ǽ<EFBFBD><C7BD><EFBFBD>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>BOOT<4F><54><EFBFBD><EFBFBD>
|
||||
{
|
||||
goToApp();
|
||||
}
|
||||
else
|
||||
{
|
||||
CAN_Send_Msg(handle,OTA_CANTxID, FLEXCAN_STANDARD_FRAME, FLEXCAN_FrameTypeData, BOOT_Arr,2, TX_MB_INDEX);//boot ֡
|
||||
UdpSendToData(UDPCB_1, BOOT_Arr, 2, des_ipaddr, BOOT_TX_PORT);
|
||||
}
|
||||
|
||||
ssdk_printf(SSDK_INFO, "SSDK E3 boot! verison V1.22 \r\n");
|
||||
|
||||
for(;;)
|
||||
{
|
||||
lwip_Ethernet();
|
||||
|
||||
if(1 == Btm1ms)
|
||||
{
|
||||
ReadUpgradeFlag(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Btm1ms = 0;
|
||||
}
|
||||
|
||||
if(1 == Btm10ms)//10ms<6D><73>
|
||||
{
|
||||
Btm10ms = 0;
|
||||
// if (busoff_occur_flag == true) //busoff
|
||||
// {
|
||||
// flexcan_busoff_recovery_demo(handle);
|
||||
// busoff_occur_flag = false;
|
||||
// }
|
||||
|
||||
RgWDT500msflg ++ ;
|
||||
if(RgWDT500msflg >= 5)
|
||||
{
|
||||
RgWDT500msflg = 0;
|
||||
External_wdt_refresh();
|
||||
|
||||
printf("RUN11! \r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
35
readme.txt
Normal file
35
readme.txt
Normal file
@@ -0,0 +1,35 @@
|
||||
|
||||
## 简介
|
||||
|
||||
本demo介绍如何使用E3芯片GPIO的input、output和interrupt功能。
|
||||
|
||||
## 硬件连接
|
||||
|
||||
- e3_176_ref参考板
|
||||
- Jlink debugger
|
||||
- 连接UART用于log输出
|
||||
|
||||
## 测试方法
|
||||
|
||||
使用以下工具编译本demo，并生成可执行文件：
|
||||
|
||||
- SEGGER Embedded Studio (SES)
|
||||
- IAR for ARM
|
||||
|
||||
使用JLINK下载镜像到e3_176_ref开发板，并启动调试。
|
||||
|
||||
- 当出现SSDK E3 GPIO Demo Start!打印，代表GPIO初始化完成
|
||||
- 按下SW401(GPIO_A9)，触发中断
|
||||
- 中断处理函数中读取GPIO_A9电平，并打印，同时翻转GPIO_Y8, GPIO_Y9电平
|
||||
- 打印SSDK E3 GPIO Demo Success!
|
||||
|
||||
## Demo流程说明
|
||||
|
||||
- clock初始化；
|
||||
- reset初始化；
|
||||
- irq初始化；
|
||||
- gpio初始化；
|
||||
- Debug串口初始化；
|
||||
- BUTTON gpio中断设置、注册回调函数、使能，
|
||||
- 进入死循环，
|
||||
按下/松开BUTTON按键，gpio中断触发，在注册的回调函数中点亮/熄灭LED。
|
||||
115
wdt_refresh.c
Normal file
115
wdt_refresh.c
Normal file
@@ -0,0 +1,115 @@
|
||||
#include <sdrv_btm.h>
|
||||
#include <regs_base.h>
|
||||
#include <irq_num.h>
|
||||
#include <debug.h>
|
||||
#include <wdt_refresh.h>
|
||||
#include <sdrv_rstgen.h>
|
||||
#include <sdrv_gpio.h>
|
||||
#include <udelay/udelay.h>
|
||||
#include <reset_ip.h>
|
||||
#include <sdrv_xspi.h>
|
||||
#include "IAP_Task.h"
|
||||
#include <armv7-r/cache.h>
|
||||
|
||||
void reboot_global(sdrv_rom_ctrl_boot_mode_e boot_mode)
|
||||
{
|
||||
uint32_t glb_status = sdrv_rstgen_global_status(&rstctl_glb);
|
||||
|
||||
ssdk_printf(SSDK_INFO,"global status: 0x%x \r\n", glb_status);
|
||||
#if CONFIG_E3L
|
||||
if (glb_status & (1 << 6u)) {
|
||||
#else
|
||||
if (glb_status & (1 << 11u | 1 << 31u)) {
|
||||
#endif
|
||||
ssdk_printf(SSDK_INFO, "SSDK E3 Global Reset Demo Success!\r\n");
|
||||
}
|
||||
|
||||
/* clear global reset status */
|
||||
sdrv_rstgen_global_status_clear(&rstctl_glb);
|
||||
|
||||
/* set boot pin mode */
|
||||
ssdk_printf(SSDK_INFO,"set boot pin mode: %d \r\n", boot_mode);
|
||||
sdrv_rom_ctrl_set_boot_pin_flag(boot_mode);
|
||||
|
||||
/* soft reset flash */
|
||||
flash.sw_rst = true;
|
||||
sdrv_spi_nor_deinit(&flash);
|
||||
/* soft reset xspi host */
|
||||
sdrv_spi_nor_drv_deinit(&flash);
|
||||
|
||||
/* wait 3 seconds */
|
||||
udelay(100000);
|
||||
|
||||
/* clear sf boot status */
|
||||
sdrv_rstgen_write_general(&reset_general_reg_sf_boot, 0);
|
||||
|
||||
/* Only for norflash, update rom ctrl data */
|
||||
#ifndef CONFIG_HYPERBUS_MODE
|
||||
/* <20><>Ҫ!!! <20>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>norflashû<68>б<EFBFBD><D0B1><EFBFBD>ʼ<EFBFBD><CABC> (sdrv_xspi_init) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,
|
||||
<20><>ʱsfs<66>ļ<EFBFBD><C4BC>ж<EFBFBD>flashģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<D7BC><C8B7>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>sfs<66>ļ<EFBFBD><C4BC><EFBFBD>flashģʽ
|
||||
֪ͨrom<6F><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>г<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>flash, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>sdrv_spi_nor_drv_deinit,
|
||||
<20><>xspi host deinit֮<74><D6AE><EFBFBD><EFBFBD>global reset, <20>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>! */
|
||||
sdrv_rom_ctrl_data_update();
|
||||
#endif
|
||||
|
||||
ssdk_printf(SSDK_INFO,"reset!: %d \r\n", boot_mode);
|
||||
|
||||
// arch_invalidate_cache_range(0x01978000,0x8000);//<2F><><EFBFBD><EFBFBD> dcache
|
||||
|
||||
/* global reset */
|
||||
sdrv_rstgen_global_reset(&rstctl_glb);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void External_wdt_refresh(void)
|
||||
{
|
||||
// sdrv_wdt_refresh(wdt_type);//ι<><CEB9>
|
||||
|
||||
sdrv_gpio_toggle_pin_output_level(WDTGPIO);
|
||||
}
|
||||
|
||||
|
||||
sdrv_wdt_t *wdt_type = (sdrv_wdt_t *)APB_WDT1_BASE;
|
||||
|
||||
static bool internal_reset_switch = true;
|
||||
static bool external_reset_switch = false;
|
||||
//<2F><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC>
|
||||
void wdt_init(uint32_t timeoutms)
|
||||
{
|
||||
static sdrv_wdt_config_t wdt_cfg;
|
||||
int ret = 0;
|
||||
//--------------------------------------------------
|
||||
sdrv_wdt_get_default_config(&wdt_cfg);
|
||||
|
||||
if (internal_reset_switch) {
|
||||
wdt_cfg.int_rst.reset_en = true;
|
||||
sdrv_rstgen_wdt_reset_enable(RESET_WDT1, true);
|
||||
}
|
||||
|
||||
if (external_reset_switch) {
|
||||
/* config GPIO_H12 as WDT1_RST_N function */
|
||||
wdt_cfg.ext_rst.reset_en = true;
|
||||
wdt_cfg.ext_rst.reset_mode = 0; /* low level active */
|
||||
}
|
||||
|
||||
ret = sdrv_wdt_init(wdt_type, &wdt_cfg);
|
||||
ASSERT(ret == 0);
|
||||
|
||||
// irq_attach(wdt_irq, wdt_irq_handler, NULL);
|
||||
// irq_enable(wdt_irq);
|
||||
|
||||
sdrv_wdt_set_timeout(wdt_type, timeoutms);
|
||||
|
||||
ret = sdrv_wdt_enable(wdt_type);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
65
wdt_refresh.h
Normal file
65
wdt_refresh.h
Normal file
@@ -0,0 +1,65 @@
|
||||
#ifndef _WDT_RFFRESH_H_
|
||||
#define _WDT_RFFRESH_H_
|
||||
|
||||
#include <sdrv_watchdog.h>
|
||||
#include <rom_ctrl/rom_ctrl.h>
|
||||
|
||||
#define WDTGPIO GPIO_F5
|
||||
//#define WDTGPIO GPIO_H13
|
||||
|
||||
#define WDT_OUTms 1600
|
||||
|
||||
|
||||
|
||||
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>
|
||||
void wdt_init(uint32_t timeoutms);
|
||||
|
||||
|
||||
void External_wdt_refresh(void);
|
||||
void reboot_global(sdrv_rom_ctrl_boot_mode_e boot_mode);
|
||||
|
||||
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>
|
||||
extern sdrv_wdt_t *wdt_type;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* _WDT_RFFRESH_H_*/
|
||||
Reference in New Issue
Block a user