SemiDrive SSDK Appication Program Interface PTG3.0
Data Structures | Functions
sdrv_spi.h File Reference
#include <sdrv_ckgen.h>
#include <stdbool.h>
#include <stdint.h>
#include "reg.h"
#include "sdrv_dma.h"
#include "spi_reg.h"

Go to the source code of this file.

Data Structures

struct  spi_device_config
 
struct  spi_common_config
 
union  spi_data_ptr
 
struct  spi_dma_context
 
struct  spi_transmit_cb
 
struct  sdrv_spi
 

Functions

int sdrv_spi_init (struct sdrv_spi *spi, struct spi_common_config *cfg)
 
int sdrv_spi_deinit (struct sdrv_spi *bus)
 
int sdrv_spi_config_device (struct sdrv_spi *spi, const struct spi_device_config *cfg)
 
int sdrv_spi_sync_transmit (struct sdrv_spi *spi, void *tx_buf, void *rx_buf, uint32_t bytes, uint32_t timeout)
 
void sdrv_spi_attach_async_callback (struct sdrv_spi *spi, spi_callback_t cb)
 
int sdrv_spi_async_transmit (struct sdrv_spi *spi, void *tx_buf, void *rx_buf, uint32_t bytes, enum spi_ops_type type)
 
enum spi_bus_state sdrv_spi_get_status (struct sdrv_spi *spi)
 
void sdrv_spi_polling (struct sdrv_spi *bus)
 
uint32_t sdrv_spi_slave_get_transmit_len (struct sdrv_spi *bus)
 

Detailed Description

Macro Definition Documentation

◆ BUS_BUSY_ASYNC_MASK

#define BUS_BUSY_ASYNC_MASK   (BUS_BUSY_DMA_MASK | BUS_BUSY_IRQ_MASK)

◆ BUS_BUSY_DMA_MASK

#define BUS_BUSY_DMA_MASK   (SPI_STATE_DMA_TX | SPI_STATE_DMA_RX)

◆ BUS_BUSY_IRQ_MASK

#define BUS_BUSY_IRQ_MASK   (SPI_STATE_IRQ_TX | SPI_STATE_IRQ_RX)

◆ BUS_BUSY_MASK

#define BUS_BUSY_MASK   (SPI_STATE_BUSY_TX | SPI_STATE_BUSY_RX)

◆ BUS_BUSY_STATUS_MASK

#define BUS_BUSY_STATUS_MASK   (BUS_BUSY_MASK | BUS_BUSY_ASYNC_MASK)

◆ BUS_FIFO_EMPTYE_TIMEOUT

#define BUS_FIFO_EMPTYE_TIMEOUT (   f_delay,
  s_delay,
  e_delay,
  baudrate 
)
Value:
(((f_delay) + (s_delay) + (e_delay) + SPI_DATA_WIDTH_MAX) * 1000000 / \
(baudrate))
#define SPI_DATA_WIDTH_MAX
Definition: sdrv_spi.h:289

◆ BUS_FIFO_STATE_ERR_MASK

#define BUS_FIFO_STATE_ERR_MASK    (SPI_TX_FIFO_UDR | SPI_RX_FIFO_OVR | SPI_TX_DMA_ERR | SPI_RX_DMA_ERR)

◆ BUS_FIFO_STATE_MASK

#define BUS_FIFO_STATE_MASK   (SPI_RX_FIFO_READ | SPI_TX_FIFO_WRITE)

◆ BUS_STATE_RX_MASK

#define BUS_STATE_RX_MASK    (SPI_STATE_DMA_RX | SPI_STATE_BUSY_RX | SPI_STATE_IRQ_RX)

◆ BUS_STATE_TX_MASK

#define BUS_STATE_TX_MASK    (SPI_STATE_DMA_TX | SPI_STATE_BUSY_TX | SPI_STATE_IRQ_TX)

◆ SPI_CLK_PRESSCALE_MAX

#define SPI_CLK_PRESSCALE_MAX   0xFFu

◆ SPI_CLK_PRESSCALE_MAX_SHIFT

#define SPI_CLK_PRESSCALE_MAX_SHIFT   (8u)

◆ SPI_DATA_WIDTH_BYTE

#define SPI_DATA_WIDTH_BYTE   8U

◆ SPI_DATA_WIDTH_HALF_WORD

#define SPI_DATA_WIDTH_HALF_WORD   16U

◆ SPI_DATA_WIDTH_MAX

#define SPI_DATA_WIDTH_MAX   SPI_DATA_WIDTH_WORD

◆ SPI_DATA_WIDTH_MIN

#define SPI_DATA_WIDTH_MIN   4U

Spi transmit data width type only for internal .

◆ SPI_DATA_WIDTH_WORD

#define SPI_DATA_WIDTH_WORD   32U

◆ SPI_END_DELAY_MAX

#define SPI_END_DELAY_MAX   0xFFu

◆ SPI_FIFO_LEN

#define SPI_FIFO_LEN   16u

◆ SPI_FRAME_DELAY_MAX

#define SPI_FRAME_DELAY_MAX   0xFFu

◆ SPI_FRAME_SIZE_MAX

#define SPI_FRAME_SIZE_MAX   1024U

◆ SPI_FSM_IDLE_STA

#define SPI_FSM_IDLE_STA   2U

◆ SPI_FSM_M_STR_STA

#define SPI_FSM_M_STR_STA   3U

◆ SPI_FSM_WAIT_DATA_STA

#define SPI_FSM_WAIT_DATA_STA   7U

◆ SPI_GET_WIDTH_SHIFT

#define SPI_GET_WIDTH_SHIFT (   width_type)
Value:
(((width_type) == SPI_DATA_WIDTH_WORD \
? 2 \
: ((width_type) / SPI_DATA_WIDTH_BYTE) - 1))
#define SPI_DATA_WIDTH_BYTE
Definition: sdrv_spi.h:286
#define SPI_DATA_WIDTH_WORD
Definition: sdrv_spi.h:288

◆ SPI_GET_WIDTH_TYPE

#define SPI_GET_WIDTH_TYPE (   width)
Value:
(((width) > 16U) \
unsigned int width
Definition: logo_rgb565.h:32912
#define SPI_DATA_WIDTH_HALF_WORD
Definition: sdrv_spi.h:287

◆ SPI_INTERNAL_DIV_SHIFT

#define SPI_INTERNAL_DIV_SHIFT   (1u)

◆ SPI_IS_VALID_LEN

#define SPI_IS_VALID_LEN (   bytes,
  width 
)     (!((bytes) & ((0x1 << SPI_GET_WIDTH_SHIFT(SPI_GET_WIDTH_TYPE(width))) - 1)))

◆ SPI_PIPE_LINE_SIZE_2B

#define SPI_PIPE_LINE_SIZE_2B   5U

◆ SPI_PIPE_LINE_SIZE_4B

#define SPI_PIPE_LINE_SIZE_4B   4U

◆ SPI_PIPE_LINE_SIZE_8B

#define SPI_PIPE_LINE_SIZE_8B   3U

◆ SPI_PIPE_LINE_SIZE_OB

#define SPI_PIPE_LINE_SIZE_OB   2U

◆ SPI_POL_VEL_ILLEGAL

#define SPI_POL_VEL_ILLEGAL   (~0xFu)

◆ SPI_READ_FIFO_TIMEOUT_MAX

#define SPI_READ_FIFO_TIMEOUT_MAX (   f_delay,
  s_delay,
  e_delay,
  baudrate 
)
Value:
((((f_delay) + (s_delay) + (e_delay)) * 9 + \
SPI_DATA_WIDTH_MAX * SPI_FIFO_LEN) * \
1000000 / (baudrate))
#define SPI_FIFO_LEN
Definition: sdrv_spi.h:278

◆ SPI_SATE_EXT_FLAGS

#define SPI_SATE_EXT_FLAGS    (SPI_STATE_IS_UNS_EN | SPI_STATE_IS_RO_END | SPI_STATE_CS_ACTIVEED)

◆ SPI_SLAVE_IRQ_NICE_ADJUST

#define SPI_SLAVE_IRQ_NICE_ADJUST   (-1) /* slave irq nice val */

◆ SPI_START_DELAY_MAX

#define SPI_START_DELAY_MAX   0xFFu

◆ SPI_TIMMING_CFG

#define SPI_TIMMING_CFG (   f,
  s,
 
)
Value:
(FV_SPI_TIM_CTRL_START_DLY(s) | FV_SPI_TIM_CTRL_END_DLY(e) | \
FV_SPI_TIM_CTRL_FRM_DLY(f))

Typedef Documentation

◆ sdrv_spi_t

typedef struct sdrv_spi sdrv_spi_t

Spi bus module handler type .

◆ spi_callback_t

typedef void(* spi_callback_t) (void *spi, spi_event_type Event)

Spi async transmit callback type .

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

spi status return code

Enumerator
SDRV_SPI_STATUS_MODE_ERROR 
SDRV_SPI_STATUS_GCMD_NO_SUPPORT 
SDRV_SPI_STATUS_GCMD_TIMEOUT_WRITE 
SDRV_SPI_STATUS_GCMD_TIMEOUT_FINISH 
SDRV_SPI_STATUS_SOFT_CS_TIMEOUT 
SDRV_SPI_STATUS_UCMD_TIMEOUT_WRITE 
SDRV_SPI_STATUS_UCMD_TIMEOUT_FINISH 
SDRV_SPI_STATUS_SYNC_TIMEOUT 
SDRV_SPI_STATUS_SOFT_CS_WAIT_TIMEOUT 
SDRV_SPI_STATUS_FAIL_DMA_SETUP 
SDRV_SPI_STATUS_FAIL_IRQ_SETUP 
SDRV_SPI_STATUS_PARAM_ILLEGAL 

◆ data_dir

enum data_dir

Spi transmit data direction type .

Enumerator
SPI_RX_DIR 
SPI_TX_DIR 

◆ fifo_state

enum fifo_state

Spi fifo state flags.

Enumerator
SPI_RX_FIFO_READ 
SPI_TX_FIFO_WRITE 
SPI_TX_FIFO_UDR 
SPI_RX_FIFO_OVR 
SPI_TX_DMA_ERR 
SPI_RX_DMA_ERR 
SPI_TX_ONLY_DONE 

◆ irq_type

enum irq_type

Spi irq type .

Enumerator
SPI_TRASPORT_FINISH 
SPI_RX_READ_REQ 
SPI_TX_WRITE_REQ 
SPI_CS_INVLD_REQ 

◆ spi_bus_state

Spi bus idle/busy state .

Enumerator
SPI_IDLE 
SPI_BUSY 

◆ spi_cpha

enum spi_cpha

Spi sclk phase mode.

Enumerator
DATA_CPT_ON_FIRST_SCK_EDGE 
DATA_CPT_ON_SECOND_SCK_EDGE 

◆ spi_cpol

enum spi_cpol

Spi sclk idle mode.

Enumerator
SCK_IDLE_LOW 
SCK_IDLE_HIGH 

◆ spi_cs_polarity

Spi cs mode.

Enumerator
CS_ACTIVE_LOW 
CS_ACTIVE_HIGH 

◆ spi_cs_select

Spi hardware cs select .

Enumerator
CS_SEL_SS0 
CS_SEL_SS1 
CS_SEL_SS2 
CS_SEL_SS3 

◆ spi_event_type

Spi async transmit callback type .

Enumerator
SPI_TRANS_DONE 
SPI_TRANS_FAIL 
SPI_TRANS_PASS 

◆ spi_ops_type

Spi transmit mode .

Enumerator
OP_MODE_SYNC 
OP_MODE_IRQ 
OP_MODE_DMA 

◆ spi_state

enum spi_state

Spi Bus state flags.

Enumerator
SPI_STATE_UNINIT 
SPI_STATE_INITED 
SPI_STATE_BUSY_TX 
SPI_STATE_BUSY_RX 
SPI_STATE_IRQ_ACT 
SPI_STATE_DMA_TX 
SPI_STATE_DMA_RX 
SPI_STATE_IRQ_TX 
SPI_STATE_IRQ_RX 
SPI_STATE_IS_SLAVE 
SPI_STATE_CS_ACTIVEED 
SPI_STATE_IS_UNS_EN 
SPI_STATE_IS_RO_END 
SPI_STATE_DMA_TX_RD 
SPI_STATE_DMA_RX_RD 

Function Documentation

◆ sdrv_spi_async_transmit()

int sdrv_spi_async_transmit ( struct sdrv_spi spi,
void *  tx_buf,
void *  rx_buf,
uint32_t  bytes,
enum spi_ops_type  type 
)

SPI async transmit in IRQ or DMA mode.

Parameters
[in]spiSPI bus
[in]tx_bufPointer to data to transmit, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception.
[out]rx_bufPointer to receive data storage, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception.
[in]bytesThe amount of data in bytes.
[in]typeOP_MODE_IRQ for IRQ Mode. OP_MODE_DMA for DMA Mode.
Returns
0 is ok, and other values for error.

◆ sdrv_spi_attach_async_callback()

void sdrv_spi_attach_async_callback ( struct sdrv_spi spi,
spi_callback_t  cb 
)

Setup the async callback handler.

Parameters
[in]spiSPI bus
[in]cbThe async callback handler.

◆ sdrv_spi_config_device()

int sdrv_spi_config_device ( struct sdrv_spi spi,
const struct spi_device_config cfg 
)

SPI device configuration.

This function select and activate an external device. Data transfers are performed according to this device configuration.

Parameters
[in]spiSPI bus
[in]cfgSPI device configuration.
Note
SPI device configuration memory must not be recycled during transfer.
Returns
0 is ok, and other values mean bus is busy.

◆ sdrv_spi_deinit()

int sdrv_spi_deinit ( struct sdrv_spi bus)

Deinitialize the SPI device.

Parameters
[in]busSPI bus
Returns
0 is ok, otherwise bus error occurred.

◆ sdrv_spi_get_status()

enum spi_bus_state sdrv_spi_get_status ( struct sdrv_spi spi)

Get SPI bus state.

Parameters
[in]spiSPI bus
Returns
SPI_BUSY: spi bus is busy. SPI_IDLE: spi bus is idle.

◆ sdrv_spi_init()

int sdrv_spi_init ( struct sdrv_spi spi,
struct spi_common_config cfg 
)

Initialize the SPI module.

Parameters
[in]spiSPI bus
[in]cfgSPI device configuration.
Note
SPI device configuration memory must not be recycled during transfer.
Returns
0 is ok, otherwise bus error occurred.

◆ sdrv_spi_polling()

void sdrv_spi_polling ( struct sdrv_spi bus)

Get SPI bus polling.

Parameters
spiSPI bus
Returns
None

◆ sdrv_spi_slave_get_transmit_len()

uint32_t sdrv_spi_slave_get_transmit_len ( struct sdrv_spi bus)

Get slave transmit cnt.

Parameters
[in]spiSPI bus
Returns
uint32: transmited bytes.

◆ sdrv_spi_sync_transmit()

int sdrv_spi_sync_transmit ( struct sdrv_spi spi,
void *  tx_buf,
void *  rx_buf,
uint32_t  bytes,
uint32_t  timeout 
)

SPI sync transmit.

Parameters
[in]spiSPI bus.
[in]tx_bufPointer to data to transmit, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception.
[out]rx_bufPointer to receive data storage, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception.
[in]bytesThe amount of data in bytes.
[in]timeoutTimeout time >= total transmitted bytes / data-width*2.
Returns
0 is ok, and other values for error.