#include <sdrv_sdhci.h>

Data Fields
uint32_t	base_clk_rate

uint32_t	max_blk_len

uint8_t	bus_width_8bit

uint8_t	spec_version

uint8_t	adma2_support

uint8_t	addr_64bit_v3

uint8_t	addr_64bit_v4

uint8_t	voltage

uint8_t	sdr_support

uint8_t	ddr_support

uint8_t	sdr50_support

uint8_t	sdr104_support

uint8_t	hs200_support

uint8_t	hs400_support

uint8_t	hw_reset_support

uint8_t	uhs_support

Field Documentation

◆ addr_64bit_v3

uint8_t addr_64bit_v3

addr 64bit for v3 support

◆ addr_64bit_v4

uint8_t addr_64bit_v4

addr 64bit for v3 support

◆ adma2_support

uint8_t adma2_support

Adma2 support

◆ base_clk_rate

uint32_t base_clk_rate

Max clock rate supported

◆ bus_width_8bit

uint8_t bus_width_8bit

8 Bit mode supported

◆ ddr_support

uint8_t ddr_support

Dual Data rate

◆ hs200_support

uint8_t hs200_support

Hs200 mode, with 200 MHZ clock

◆ hs400_support

uint8_t hs400_support

Hs400 mode, with 400 MHZ clock

◆ hw_reset_support

uint8_t hw_reset_support

SDHC hardware reset supported or not

◆ max_blk_len

uint32_t max_blk_len

Max block len supported

◆ sdr104_support

uint8_t sdr104_support

UHS mode, with 200 MHZ clock

◆ sdr50_support

uint8_t sdr50_support

UHS mode, with 100 MHZ clock

◆ sdr_support

uint8_t sdr_support

Single Data rate

◆ spec_version

uint8_t spec_version

spec version num in sdhci controller

◆ uhs_support

uint8_t uhs_support

SDHC hardware supported uhs mode

◆ voltage

uint8_t voltage

Supported voltage

The documentation for this struct was generated from the following file:

Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/sdrv_sdhci.h

Data Fields