上一次错了,这次增加错误处理

This commit is contained in:
2025-10-21 21:13:19 +08:00
parent c7bed50170
commit 2153bfcd1b
10 changed files with 2531 additions and 205 deletions

22
CAN.C
View File

@@ -150,15 +150,19 @@ void CAN_vInit(void)
/// General Configuration of the Node 0:
/// - set INIT and CCE
/// - enable interrupt generation upon a change of BOFF or EWARN or upon a
/// set of LLE, LOE or INIT
/// - alert interrupt node pointer: MultiCAN SRN 0
//-----------CAN_NCR0 = 0x00000041-------------------------------------
//-----------CAN_NCR0 = 0x00000049-------------------------------------
CAN_vWriteCANAddress(CAN_NCR0); // Addressing CAN_NCR0
CAN_DATA0 = 0x41; // load NODE 0 control register[7-0]
CAN_DATA0 = 0x49; // load NODE 0 control register[7-0]
CAN_vWriteEN(D0_VALID+ADR_INC); // Data0 is Valid for transmission and
// Write is EnabledCAN Address pointing
// to the CAN_NSR0.
// CAN Address pointing to the CAN_NIPR0
CAN_ADCON = ADR_INC; // Auto Increment the current address(+1)
@@ -193,16 +197,16 @@ void CAN_vInit(void)
/// Configuration of the Node 0 Baud Rate:
/// - required baud rate = 250.000 kbaud
/// - real baud rate = 252.632 kbaud
/// - sample point = 80.00 %
/// - there are 7 time quanta before sample point
/// - there are 2 time quanta after sample point
/// - real baud rate = 250.000 kbaud
/// - sample point = 75.00 %
/// - there are 11 time quanta before sample point
/// - there are 4 time quanta after sample point
/// - the (re)synchronization jump width is 2 time quanta
//-----------CAN_NBTR0 = 0x00001652-------------------------------------
//-----------CAN_NBTR0 = 0x00003A4B-------------------------------------
CAN_DATA0 = 0x52; // load NBTR0_SJW, BRP
CAN_DATA1 = 0x16; // load NBTR0_DIV8, TSEG2, TSEG1
CAN_DATA0 = 0x4B; // load NBTR0_SJW, BRP
CAN_DATA1 = 0x3A; // load NBTR0_DIV8, TSEG2, TSEG1
CAN_vWriteEN(D0_VALID+D1_VALID+ADR_INC); // Data0, 1 are valid for
// transmission and Write is
// Enabled with Auto