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liumin
2025-09-05 21:09:02 +08:00
commit f0106c0f17
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ETH/UdpServer/User/interface_uart.c Normal file
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/*
* eth_drive.c
*
* Created on: 2023<32><33>1<EFBFBD><31>5<EFBFBD><35>
* Author: Administrator
*/
#include "interface_uart.h"
#include "interface_config.h"
#include <string.h>
#include <ctype.h>
Timer nmea_timer;
static RingBuffer nmea_rx_buf;
#define DMA_BUF_SIZE 1400
uint8_t dma_rx_buffer[DMA_BUF_SIZE] __attribute__((aligned(4)));
//__attribute__((aligned(4))) uint8_t dma_buffer[2048]; // GCC<43>﷨
//void USART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USART3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void UART4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void UART8_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void UART6_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void UART7_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void DMA2_Channel3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void DMA1_Channel3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void DMA2_Channel9_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn USART3_IRQHandler
*
* @brief This function handles USART3 global interrupt request.
*
* @return none
*/
uint8_t state = 0;
uint8_t char_data[100] = {0};
unsigned char UART3_RX_cnt = 0;
void USART3_IRQHandler(void)
{
//----------------------------------------------------------
enter_critical_section();
if(USART_GetITStatus(USART3, USART_IT_IDLE) != RESET)
{
imu_buffer1.buf_len = IMU_LEN - DMA_GetCurrDataCounter(IMU_RX_CH);
if( (imu_buffer1.dma_buffer[imu_buffer1.active_buf][0] == IMU_IIM46234_HEADER1) && //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
(imu_buffer1.dma_buffer[imu_buffer1.active_buf][1] == IMU_IIM46234_HEADER2) )
{
imu_buffer1.type = IIM46234;
publishMessage(&imu_buffer1, 1);
}
else if( (imu_buffer1.dma_buffer[imu_buffer1.active_buf][0] == IMU_YIS321_HEADER1) &&
(imu_buffer1.dma_buffer[imu_buffer1.active_buf][1] == IMU_YIS321_HEADER2) )
{
imu_buffer1.type = YIS321;
publishMessage(&imu_buffer1, 1);
}
else{}
imu_buffer1.active_buf ^= 1;
DMA_Cmd(IMU_RX_CH, DISABLE);
DMA_SetCurrDataCounter(IMU_RX_CH, IMU_LEN);
// Switch buffer
IMU_RX_CH->MADDR = (uint32_t)(uintptr_t)&(imu_buffer1.dma_buffer[imu_buffer1.active_buf][0]);
DMA_Cmd(IMU_RX_CH, ENABLE);
USART_ReceiveData(USART3); // clear IDLE flag
}
exit_critical_section(0);
}
void UART4_IRQHandler(void)
{
enter_critical_section();
if(USART_GetITStatus(UART4, USART_IT_IDLE) != RESET)
{
RTCM_Buffer1.buf_len = RX_BUFFER_LEN - DMA_GetCurrDataCounter(RTCM_RX_CH);
RTCM_Buffer1.active_buf ^= 1;
DMA_Cmd(RTCM_RX_CH, DISABLE);
DMA_SetCurrDataCounter(RTCM_RX_CH, RX_BUFFER_LEN);
// Switch buffer
RTCM_RX_CH->MADDR = (uint32_t)(uintptr_t)&(RTCM_Buffer1.dma_buffer[RTCM_Buffer1.active_buf][0]);
DMA_Cmd(RTCM_RX_CH, ENABLE);
printf("rtcm receive\n");
USART_ReceiveData(UART4); // clear IDLE flag
publishMessage(&RTCM_Buffer1, 1);
}
exit_critical_section(0);
}
void UART8_IRQHandler(void)
{
enter_critical_section();
if(USART_GetITStatus(UART8, USART_IT_RXNE) != RESET)
{
uint8_t UART_temp = 0;
UART_temp = USART_ReceiveData(UART8);
// printf("USART8:%d\n", UART_temp); // <20><><EFBFBD><EFBFBD>
}
exit_critical_section(0);
}
void UART6_IRQHandler(void)
{
enter_critical_section();
if(USART_GetITStatus(UART6, USART_IT_RXNE) != RESET)
{
char ch = USART_ReceiveData(UART6);
}
exit_critical_section(0);
}
void UART7_IRQHandler(void)
{
enter_critical_section();
if(USART_GetITStatus(UART7, USART_IT_IDLE) != RESET)
{
DMA_Cmd(UM982_RX_CH, DISABLE);
uint16_t received_len = DMA_BUF_SIZE - DMA_GetCurrDataCounter(UM982_RX_CH);
// 3. <20><><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD>
for(uint16_t i = 0; i < received_len; i++)
{
uint16_t next_head = (nmea_rx_buf.head + 1) % RING_BUF_SIZE;
if(next_head != nmea_rx_buf.tail)
{
nmea_rx_buf.buffer[nmea_rx_buf.head] = dma_rx_buffer[i];
nmea_rx_buf.head = next_head;
}
else
{
nmea_rx_buf.overflow = 1;
}
}
DMA_SetCurrDataCounter(UM982_RX_CH, DMA_BUF_SIZE);
DMA_Cmd(UM982_RX_CH, ENABLE);
USART_ReceiveData(UART7); // clear IDLE flag
}
exit_critical_section(0);
}
/*********************************************************************
* @fn DMA1_Channel5_IRQHandler
*
* @brief This function handles DMA1 Channel 5 global interrupt request.
*
* @return none
*/
void DMA1_Channel3_IRQHandler(void)
{
enter_critical_section();
imu_buffer1.buf_len = RX_BUFFER_LEN;
DMA_ClearITPendingBit(DMA1_IT_TC3);//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
exit_critical_section(0);
}
/*********************************************************************
* @fn DMA2_Channel3_IRQHandler
*
* @brief This function handles DMA1 Channel 5 global interrupt request.
*
* @return none
*/
void DMA2_Channel3_IRQHandler(void)
{
enter_critical_section();
RTCM_Buffer1.buf_len = RX_BUFFER_LEN;
DMA_ClearITPendingBit(DMA2_IT_TC3);//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
exit_critical_section(0);
}
/*********************************************************************
* @fn DMA2_Channel3_IRQHandler
*
* @brief This function handles DMA1 Channel 5 global interrupt request.
*
* @return none
*/
void DMA2_Channel9_IRQHandler(void)
{
enter_critical_section();
DMA_ClearITPendingBit(DMA2_IT_TC9);//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
exit_critical_section(0);
}
/*********************************************************************
* @fn DMA_INIT
*
* @brief Configures the DMA for USART1.
*
* @return none
*/
void dmaInit(void)
{
DMA_InitTypeDef DMA_InitStructure = {0};
NVIC_InitTypeDef NVIC_InitStructure = {0};
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2|RCC_AHBPeriph_DMA1, ENABLE);
DMA_DeInit(RTCM_RX_CH);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&RTCM_UART->DATAR);
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)(uintptr_t)&(RTCM_Buffer1.dma_buffer[0][0]);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = RX_BUFFER_LEN;
DMA_Init(RTCM_RX_CH, &DMA_InitStructure);
DMA_ITConfig(RTCM_RX_CH, DMA_IT_TC, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = RTCM_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_Cmd(RTCM_RX_CH, ENABLE);
USART_DMACmd(RTCM_UART, USART_DMAReq_Rx, ENABLE);
//IMU DMA<4D><41><EFBFBD><EFBFBD>
DMA_DeInit(IMU_RX_CH);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&IMU_UART->DATAR);
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)(uintptr_t)&(imu_buffer1.dma_buffer[0][0]);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = IMU_LEN;
DMA_Init(IMU_RX_CH, &DMA_InitStructure);
DMA_ITConfig(IMU_RX_CH, DMA_IT_TC, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = IMU_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_Cmd(IMU_RX_CH, ENABLE);
USART_DMACmd(IMU_UART, USART_DMAReq_Rx, ENABLE);
//982 DMA<4D><41><EFBFBD><EFBFBD>
DMA_DeInit(UM982_RX_CH);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&UM982_UART->DATAR);
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)(uintptr_t)(dma_rx_buffer);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = DMA_BUF_SIZE;
DMA_Init(UM982_RX_CH, &DMA_InitStructure);
DMA_ITConfig(UM982_RX_CH, DMA_IT_TC, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = UM982_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_Cmd(UM982_RX_CH, ENABLE);
USART_DMACmd(UM982_UART, USART_DMAReq_Rx, ENABLE);
}
void initUart(void)
{
GPIO_InitTypeDef GPIO_InitStructure = {0};
USART_InitTypeDef USART_InitStructure1 = {0};
NVIC_InitTypeDef NVIC_InitStructure = {0};
//----------------------------------------------------------------------------
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 | RCC_APB1Periph_UART6 | RCC_APB1Periph_UART7 | RCC_APB1Periph_UART8, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
/* USART3 TX-->D.8 RX-->D.9 */
GPIO_PinRemapConfig( GPIO_FullRemap_USART3, ENABLE);//
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOD, &GPIO_InitStructure);
USART_InitStructure1.USART_BaudRate = 921600;
USART_InitStructure1.USART_WordLength = USART_WordLength_8b;
USART_InitStructure1.USART_StopBits = USART_StopBits_1;
USART_InitStructure1.USART_Parity = USART_Parity_No;
USART_InitStructure1.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure1.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
USART_Init(USART3, &USART_InitStructure1);
USART_ITConfig(USART3, USART_IT_IDLE, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
USART_Cmd(USART3, ENABLE);
/* USART4 TX-->B.0 RX-->B.1 */
GPIO_PinRemapConfig( GPIO_PartialRemap_USART4, ENABLE);//
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOB, &GPIO_InitStructure);
USART_InitStructure1.USART_BaudRate = 115200;
USART_InitStructure1.USART_WordLength = USART_WordLength_8b;
USART_InitStructure1.USART_StopBits = USART_StopBits_1;
USART_InitStructure1.USART_Parity = USART_Parity_No;
USART_InitStructure1.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure1.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
USART_Init(UART4, &USART_InitStructure1);
USART_ITConfig(UART4, USART_IT_IDLE, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = UART4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
USART_Cmd(UART4, ENABLE);
/* UART6 TX-->C.0 RX-->C.1 */ //<2F>ӵ<EFBFBD>982<38><32>com1
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOC, &GPIO_InitStructure);
USART_InitStructure1.USART_BaudRate = 115200;
USART_InitStructure1.USART_WordLength = USART_WordLength_8b;
USART_InitStructure1.USART_StopBits = USART_StopBits_1;
USART_InitStructure1.USART_Parity = USART_Parity_No;
USART_InitStructure1.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure1.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
USART_Init(UART6, &USART_InitStructure1);
USART_ITConfig(UART6, USART_IT_RXNE, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = UART6_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
USART_Cmd(UART6, ENABLE);
/* UART7 TX-->C.2 RX-->C.3 *///<2F>ӵ<EFBFBD>982<38><32>com2
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOC, &GPIO_InitStructure);
USART_InitStructure1.USART_BaudRate = 115200;
USART_InitStructure1.USART_WordLength = USART_WordLength_8b;
USART_InitStructure1.USART_StopBits = USART_StopBits_1;
USART_InitStructure1.USART_Parity = USART_Parity_No;
USART_InitStructure1.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure1.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
USART_Init(UART7, &USART_InitStructure1);
USART_ITConfig(UART7, USART_IT_IDLE, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = UART7_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
USART_Cmd(UART7, ENABLE);
/* UART8 TX-->C.4 RX-->C.5 */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART8, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOC, &GPIO_InitStructure);
USART_InitStructure1.USART_BaudRate = 115200;
USART_InitStructure1.USART_WordLength = USART_WordLength_8b;
USART_InitStructure1.USART_StopBits = USART_StopBits_1;
USART_InitStructure1.USART_Parity = USART_Parity_No;
USART_InitStructure1.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure1.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
USART_Init(UART8, &USART_InitStructure1);
USART_Cmd(UART8, ENABLE);
dmaInit();
}
void uartSendto(USART_TypeDef *USARTx, uint8_t * ucData, uint16_t len)//<2F><><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
{
for(uint16_t i = 0; i<len; i++)
{
USART_SendData(USARTx,ucData[i]);
while(USART_GetFlagStatus(USARTx, USART_FLAG_TXE) == RESET) /* waiting for sending finish */
{
}
}
}
void rtcmProcess(void *signal_id)
{
(void)signal_id; // <20><><EFBFBD>DZ<EFBFBD><C7B1><EFBFBD>Ϊ<EFBFBD><CEAA>ʹ<EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uartSendto(UART6, (uint8_t *)&(RTCM_Buffer1.dma_buffer[RTCM_Buffer1.active_buf^1][0]), RTCM_Buffer1.buf_len);//ֱ<>ӷ<EFBFBD><D3B7>ͷǼ<CDB7><C7BC><EFBFBD><EFBFBD>ڴ<EFBFBD>
printf("rtcm forwarding\n");
}
void setDataProcess(void *signal_id)
{
(void)signal_id; // <20><><EFBFBD>DZ<EFBFBD><C7B1><EFBFBD>Ϊ<EFBFBD><CEAA>ʹ<EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uartSendto(USART3, set_output_data, 20);
}
void setRateProcess(void *signal_id)
{
(void)signal_id; // <20><><EFBFBD>DZ<EFBFBD><C7B1><EFBFBD>Ϊ<EFBFBD><CEAA>ʹ<EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uartSendto(USART3, set_rate, 20);
}
void setSaveProcess(void *signal_id)
{
(void)signal_id; // <20><><EFBFBD>DZ<EFBFBD><C7B1><EFBFBD>Ϊ<EFBFBD><CEAA>ʹ<EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uartSendto(USART3, save_cmd, 20);
}
void setSteamProcess(void *signal_id)
{
(void)signal_id; // <20><><EFBFBD>DZ<EFBFBD><C7B1><EFBFBD>Ϊ<EFBFBD><CEAA>ʹ<EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uartSendto(USART3, stream_cmd, 20);
}
/* /?**?
* @brief <20><><EFBFBD><EFBFBD>NMEA<45><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ͣ<EFBFBD>XOR<4F><52><EFBFBD><EFBFBD>У<EFBFBD>飩
* @param nmea_str <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>NMEA<45><41><EFBFBD>䣨<EFBFBD><E4A3A8><EFBFBD><EFBFBD>$<24><>*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>β<EFBFBD><CEB2>CRLF<4C><46>
* @return <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8λУ<CEBB><D0A3><EFBFBD>ͣ<EFBFBD>0x00~0xFF<46><46>
*/
uint8_t nmea_checksum(const char *nmea_str)
{
uint8_t checksum = 0;
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>'$'<27><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD>
if (*nmea_str == '$') nmea_str++;
// <20><><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>'*'<27><><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
while (*nmea_str && *nmea_str != '*') {
checksum ^= (uint8_t)*nmea_str++;
}
return checksum;
}
/*
* @brief <20><>֤NMEA<45><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>
* @param nmea_str <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>NMEA<45><41><EFBFBD>䣨<EFBFBD><E4A3A8>"$GPGGA,...*2A\r\n"<22><>
* @return У<><D0A3><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31>ʧ<EFBFBD>ܷ<EFBFBD><DCB7><EFBFBD>0
*/
bool nmea_validate_checksum(const char *nmea_str)
{
const char *p = nmea_str;
uint8_t computed_cs, received_cs;
// <20><><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼλ<CABC><CEBB>'*'
while (*p && *p != '*') p++;
if (*p != '*') return 0; // <20><>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD>
// <20><>ȡ<EFBFBD><C8A1><EFBFBD>յ<EFBFBD><D5B5><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ͣ<EFBFBD>2λʮ<CEBB><CAAE><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>
if (!isxdigit(p[1]) || !isxdigit(p[2])) return 0;
received_cs = (uint8_t)strtol(p+1, NULL, 16);
// <20><><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5>У<EFBFBD><D0A3><EFBFBD><EFBFBD>
computed_cs = nmea_checksum(nmea_str);
return (computed_cs == received_cs);
}
void ProcessNMEAFrames(void *signal_id)
{
static uint8_t parsing_buf[1024];
static uint16_t parse_idx = 0;
bool frame_complete = false;
static uint8_t debug1s_cnt = 0;
debug1s_cnt ++;
if(debug1s_cnt >= 20)
{
debug1s_cnt = 0;
printf("nmea_buf tail:%d head:%d\n",
nmea_rx_buf.tail, nmea_rx_buf.head);
}
while(nmea_rx_buf.tail != nmea_rx_buf.head && !frame_complete)
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>һ֡<D2BB><D6A1><EFBFBD><EFBFBD>
uint8_t ch = nmea_rx_buf.buffer[nmea_rx_buf.tail];
nmea_rx_buf.tail = (nmea_rx_buf.tail + 1) % RING_BUF_SIZE;
if(nmea_rx_buf.overflow) {
nmea_rx_buf.tail = nmea_rx_buf.head;
// 3. <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
nmea_rx_buf.overflow = 0;
// 4. <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
printf("Overflow recovery\n");
}
// ֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD>
if(ch == '$') {
if(parse_idx > 0 && parsing_buf[parse_idx-1] == '\n')
{
if (nmea_validate_checksum((char *)parsing_buf)) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
memcpy(&nema_output1.buffer[0],parsing_buf,parse_idx);
publishMessage(&nema_output1, 1);
frame_complete = true; // <20><><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
else
{
printf("nmea crc error");
frame_complete = true; // <20><><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
}
parse_idx = 0;
}
// <20>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD>
if(parse_idx < RING_BUF_SIZE-1 && !frame_complete)
{
parsing_buf[parse_idx++] = ch;
// ֡β<D6A1><CEB2><EFBFBD><EFBFBD>
if(parse_idx >= 2 &&
parsing_buf[parse_idx-2] == '\r' &&
parsing_buf[parse_idx-1] == '\n')
{
if (nmea_validate_checksum((char *)parsing_buf)) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
memcpy(&nema_output1.buffer[0],parsing_buf,parse_idx);
publishMessage(&nema_output1, 1);
frame_complete = true; // <20><><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
else
{
printf("nmea buf error");
frame_complete = true; // <20><><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
parse_idx = 0;
}
}
else if(!frame_complete)
{
parse_idx = 0; // <20><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
}
}
timerStart(&nmea_timer, 50, 1); // 100ms<6D><73><EFBFBD>ٴδ<D9B4><CEB4><EFBFBD>
}
void navigationRs232Process(void *signal_id)
{
uartSendto(UART8, (uint8_t *)&navigation_rs232_output, sizeof(navigation_rs232_output));
}
// APPģ<50><C4A3><EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>
void interfaceUartInit(void)
{
subscribe(&set_output_data, setDataProcess);
subscribe(&set_rate, setRateProcess);
subscribe(&save_cmd, setSaveProcess);
subscribe(&stream_cmd, setSteamProcess);
subscribe(&RTCM_Buffer1, rtcmProcess);
subscribe(&nmea_timer, ProcessNMEAFrames);
subscribe(&navigation_rs232_output, navigationRs232Process);
timerStart(&nmea_timer, 50,1);//50ms
printf("interface uart: initial OK %d\n",getCurrentTime());
}