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118
arch/include/armv7-r/spinlock.h
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118
arch/include/armv7-r/spinlock.h
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/*
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* spinlock.h
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*
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* Copyright (c) 2020 Semidrive Semiconductor.
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* All rights reserved.
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*
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* Description: ARM spinlock interface.
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*
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* Revision History:
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* -----------------
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*/
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#ifndef INCLUDE_ARM_SPINLOCK_H
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#define INCLUDE_ARM_SPINLOCK_H
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#include <armv7-r/barriers.h>
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#define SPIN_LOCK_INITIAL_VALUE (0)
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#ifndef ASSEMBLY
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__BEGIN_CDECLS
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/* spin lock type */
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typedef unsigned long spin_lock_t;
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#ifdef CONFIG_MULTI_CORE_SMP
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#else
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static inline int __arch_spin_lock_testset(spin_lock_t *spinlock, int value)
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{
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int result = 0;
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__ASM volatile
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(
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"1:\n"
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"\tldrex %0, [%1]\n"
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"\tcmp %0, %2\n"
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"\tbeq 2f\n"
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"\tstrex %0, %2, [%1]\n"
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"\tcmp %0, %2\n"
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"\tbeq 1b\n"
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"\tdmb ish\n"
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"2:\n"
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: "=&r" (result)
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: "r" (spinlock), "r" (value)
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: "cc", "memory"
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);
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return result;
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}
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#endif
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/*
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* arch spinlock init.
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*
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* @spinlock spinlock address.
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*/
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#ifdef CONFIG_MULTI_CORE_SMP
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void arch_spin_lock_init(spin_lock_t *spinlock);
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#else
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static inline void arch_spin_lock_init(spin_lock_t *spinlock)
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{
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*spinlock = SPIN_LOCK_INITIAL_VALUE;
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}
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#endif
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/*
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* arch spin lock.
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*
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* @spinlock spinlock address.
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*/
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#ifdef CONFIG_MULTI_CORE_SMP
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void arch_spin_lock(spin_lock_t *spinlock);
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#else
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static inline void arch_spin_lock(spin_lock_t *spinlock)
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{
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/* spin until lock is acquired */
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while (__arch_spin_lock_testset(spinlock, 1)) {
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DSB;
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};
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}
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#endif
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/*
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* arch spin trylock.
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*
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* @spinlock spinlock address.
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*/
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#ifdef CONFIG_MULTI_CORE_SMP
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int arch_spin_trylock(spin_lock_t *spinlock);
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#else
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static inline int arch_spin_trylock(spin_lock_t *spinlock)
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{
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return __arch_spin_lock_testset(spinlock, 1) == 0;
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}
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#endif
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/*
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* arch spin unlock.
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*
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* @spinlock spinlock address.
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*/
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#ifdef CONFIG_MULTI_CORE_SMP
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void arch_spin_unlock(spin_lock_t *spinlock);
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#else
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static inline void arch_spin_unlock(spin_lock_t *spinlock)
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{
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DMB;
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*spinlock = 0;
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DSB;
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}
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#endif
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__END_CDECLS
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#endif
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#endif
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