224 lines
6.8 KiB
C
224 lines
6.8 KiB
C
/** ************************************************************************************************
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* SEMIDRIVE Copyright Statement
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* Copyright (c) SEMIDRIVE. All rights reserved
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*
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* This software and all rights therein are owned by SEMIDRIVE, and are
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* protected by copyright law and other relevant laws, regulations and
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* protection. Without SEMIDRIVE's prior written consent and/or related rights,
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* please do not use this software or any potion thereof in any form or by any
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* means. You may not reproduce, modify or distribute this software except in
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* compliance with the License. Unless required by applicable law or agreed to
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* in writing, software distributed under the License is distributed on
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* an 'AS IS' basis, WITHOUT WARRANTIES OF ANY KIND, either express or implied.
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*
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**************************************************************************************************/
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/** ************************************************************************************************
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* \file firewall_hw.c
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* \brief Firewall hardware information.
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*
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* <table>
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* <tr><th>Date <th>Version
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* <tr><td>2023/11/29 <td>1.0.0
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* </table>
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**************************************************************************************************/
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/***************************************************************************************************
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* Include header files
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**************************************************************************************************/
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#include <types.h>
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#include <firewall_hw.h>
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#include <part.h>
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/***************************************************************************************************
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* Global Function Declarations
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**************************************************************************************************/
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/**
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* @brief Get the maximum number of memory regions in the specified memory port.
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*
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* This function return the maximum number of regions for the port.
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*
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* @param[in] base_offset the offset address of the port.
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*
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* @return The maximum number of regions for the port.
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*/
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uint8_t mpc_get_region_maxnum(uint16_t base_offset)
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{
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uint8_t region_num;
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/* #10 Get the maximum number of the memory port. */
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switch (base_offset)
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{
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case FIREWALL_MPC_ROMC_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_ROM_MAXREGION;
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break;
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}
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/* The maximum number of regions in RAM port are same. */
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case FIREWALL_MPC_RAM1C_ADDR_OFFSET:
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case FIREWALL_MPC_RAM2C_ADDR_OFFSET:
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case FIREWALL_MPC_RAM3C_ADDR_OFFSET:
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case FIREWALL_MPC_RAM4C_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_RAM_MAXREGION;
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break;
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}
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case FIREWALL_MPC_SDRAMC_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_DRAM_MAXREGION;
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break;
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}
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/* The maximum number of regions in XSPI port are same. */
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case FIREWALL_MPC_XSPI1A_ADDR_OFFSET:
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case FIREWALL_MPC_XSPI1B_ADDR_OFFSET:
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case FIREWALL_MPC_XSPI2A_ADDR_OFFSET:
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case FIREWALL_MPC_XSPI2B_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_XSPI_MAXREGION;
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break;
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}
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case FIREWALL_MPC_MB_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_MB_MAXREGION;
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break;
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}
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/* The maximum number of regions in VIC port are same. */
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case FIREWALL_MPC_VIC1_ADDR_OFFSET:
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case FIREWALL_MPC_VIC2A_ADDR_OFFSET:
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case FIREWALL_MPC_VIC2B_ADDR_OFFSET:
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case FIREWALL_MPC_VIC3A_ADDR_OFFSET:
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case FIREWALL_MPC_VIC3B_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_VIC_MAXREGION;
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break;
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}
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/* The maximum number of regions in CR5 CACHE/TCM port are same. */
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case FIREWALL_MPC_CR5SF_ADDR_OFFSET:
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case FIREWALL_MPC_CR5SP0_ADDR_OFFSET:
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case FIREWALL_MPC_CR5SP1_ADDR_OFFSET:
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case FIREWALL_MPC_CR5SX0_ADDR_OFFSET:
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case FIREWALL_MPC_CR5SX1_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_CR5_MAXREGION;
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break;
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}
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case FIREWALL_MPC_SEIP_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_SEIP_MAXREGION;
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break;
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}
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case FIREWALL_MPC_GAMA_ADDR_OFFSET:
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{
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region_num = FIREWALL_MPC_GAMA_MAXREGION;
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break;
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}
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default:
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{
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region_num = 0U;
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break;
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}
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}
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return region_num;
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}
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/**
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* @brief Get the maximum number of peripherals for the apbmux.
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*
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* This function get the maximum number of peripherals in the specified apbmux.
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*
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* @param[in] ppc_apbmux_id the id of the apbmux.
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*
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* @return The maximum number of peripherals for the apbmux.
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*/
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uint16_t sdrv_firewall_ppc_get_apbmux_ip_maxnum(uint8_t ppc_apbmux_id)
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{
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uint16_t ip_maxnum;
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/* #10 Get the maximum number of peripherals in the specified apbmux. */
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switch (ppc_apbmux_id)
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{
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case 0:
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{
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ip_maxnum = FIREWALL_PPC_APBMUX1_IP_MAXNUM;
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break;
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}
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case 1:
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{
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ip_maxnum = FIREWALL_PPC_APBMUX2_IP_MAXNUM;
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break;
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}
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case 2:
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{
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ip_maxnum = FIREWALL_PPC_APBMUX3_IP_MAXNUM;
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break;
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}
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case 3:
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{
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ip_maxnum = FIREWALL_PPC_APBMUX4_IP_MAXNUM;
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break;
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}
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case 4:
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{
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ip_maxnum = FIREWALL_PPC_APBMUX5_IP_MAXNUM;
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break;
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}
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case 5:
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{
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ip_maxnum = FIREWALL_PPC_APBMUX6_IP_MAXNUM;
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break;
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}
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case 6:
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{
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ip_maxnum = FIREWALL_PPC_APBMUX7_IP_MAXNUM;
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break;
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}
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default:
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{
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ip_maxnum = 0U;
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break;
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}
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}
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return ip_maxnum;
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}
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/**
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* @brief Get the base address of the gpio controller.
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*
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* @param[in] channel_id The id of the pin channel.
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* @param[in] gpio_Base The base address of the gpio controller.
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*
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* @return The result of this function.
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* @details - return FIREWALL_E_OK : Get the specified gpio base address success.
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* - return FIREWALL_E_GPIO_CHANNEL_ID : The id of the pin channel is unvalid.
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*/
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bool sdrv_firewall_gpio_get_base_addr(uint16_t *channel_id, uint32_t *gpio_Base)
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{
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bool ret_val = true;
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/* #10 Check the parameters. */
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if (FIREWALL_GPIO_CHANNEL_MAXNUM <= *channel_id)
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{
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ret_val = false;
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}
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else
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{
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/* #20 Get the base address of the gpio controller. */
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if (FIREWALL_GPIO_SF_MAXNUM > *channel_id)
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{
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*gpio_Base = FIREWALL_APB_GPIO_SF_BASE;
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}
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#ifndef CONFIG_E3L
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else
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{
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*channel_id -= FIREWALL_GPIO_SF_MAXNUM;
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*gpio_Base = FIREWALL_APB_GPIO_AP_BASE;
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}
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#endif
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}
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return ret_val;
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}
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/* End of file */
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