/** ************************************************************************************************
 * SEMIDRIVE Copyright Statement
 * Copyright (c) SEMIDRIVE. All rights reserved
 *
 * This software and all rights therein are owned by SEMIDRIVE, and are
 * protected by copyright law and other relevant laws, regulations and
 * protection. Without SEMIDRIVE's prior written consent and/or related rights,
 * please do not use this software or any potion thereof in any form or by any
 * means. You may not reproduce, modify or distribute this software except in
 * compliance with the License. Unless required by applicable law or agreed to
 * in writing, software distributed under the License is distributed on
 * an 'AS IS' basis, WITHOUT WARRANTIES OF ANY KIND, either express or implied.
 *
 **************************************************************************************************/
/** ************************************************************************************************
 * \file     firewall_hw.c
 * \brief    Firewall hardware information.
 *
 * <table>
 * <tr><th>Date           <th>Version
 * <tr><td>2023/11/29     <td>1.0.0
 * </table>
 **************************************************************************************************/

/***************************************************************************************************
 *                                      Include header files
 **************************************************************************************************/
#include <types.h>
#include <firewall_hw.h>
#include <part.h>

/***************************************************************************************************
 *                                  Global Function Declarations
 **************************************************************************************************/
/**
 * @brief Get the maximum number of memory regions in the specified memory port.
 *
 * This function return the maximum number of regions for the port.
 *
 * @param[in] base_offset the offset address of the port.
 *
 * @return The maximum number of regions for the port.
 */
uint8_t mpc_get_region_maxnum(uint16_t base_offset)
{
    uint8_t region_num;

    /* #10 Get the maximum number of the memory port. */
    switch (base_offset)
    {
        case FIREWALL_MPC_ROMC_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_ROM_MAXREGION;
            break;
        }
        /* The maximum number of regions in RAM port are same. */
        case FIREWALL_MPC_RAM1C_ADDR_OFFSET:
        case FIREWALL_MPC_RAM2C_ADDR_OFFSET:
        case FIREWALL_MPC_RAM3C_ADDR_OFFSET:
        case FIREWALL_MPC_RAM4C_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_RAM_MAXREGION;
            break;
        }
        case FIREWALL_MPC_SDRAMC_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_DRAM_MAXREGION;
            break;
        }
        /* The maximum number of regions in XSPI port are same. */
        case FIREWALL_MPC_XSPI1A_ADDR_OFFSET:
        case FIREWALL_MPC_XSPI1B_ADDR_OFFSET:
        case FIREWALL_MPC_XSPI2A_ADDR_OFFSET:
        case FIREWALL_MPC_XSPI2B_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_XSPI_MAXREGION;
            break;
        }
        case FIREWALL_MPC_MB_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_MB_MAXREGION;
            break;
        }
        /* The maximum number of regions in VIC port are same. */
        case FIREWALL_MPC_VIC1_ADDR_OFFSET:
        case FIREWALL_MPC_VIC2A_ADDR_OFFSET:
        case FIREWALL_MPC_VIC2B_ADDR_OFFSET:
        case FIREWALL_MPC_VIC3A_ADDR_OFFSET:
        case FIREWALL_MPC_VIC3B_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_VIC_MAXREGION;
            break;
        }
        /* The maximum number of regions in CR5 CACHE/TCM port are same. */
        case FIREWALL_MPC_CR5SF_ADDR_OFFSET:
        case FIREWALL_MPC_CR5SP0_ADDR_OFFSET:
        case FIREWALL_MPC_CR5SP1_ADDR_OFFSET:
        case FIREWALL_MPC_CR5SX0_ADDR_OFFSET:
        case FIREWALL_MPC_CR5SX1_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_CR5_MAXREGION;
            break;
        }
        case FIREWALL_MPC_SEIP_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_SEIP_MAXREGION;
            break;
        }
        case FIREWALL_MPC_GAMA_ADDR_OFFSET:
        {
            region_num = FIREWALL_MPC_GAMA_MAXREGION;
            break;
        }
        default:
        {
            region_num = 0U;
            break;
        }
    }

    return region_num;
}

/**
 * @brief Get the maximum number of peripherals for the apbmux.
 *
 * This function get the maximum number of peripherals in the specified apbmux.
 *
 * @param[in] ppc_apbmux_id the id of the apbmux.
 *
 *  @return The maximum number of peripherals for the apbmux.
 */
uint16_t sdrv_firewall_ppc_get_apbmux_ip_maxnum(uint8_t ppc_apbmux_id)
{
    uint16_t ip_maxnum;

    /* #10 Get the maximum number of peripherals in the specified apbmux. */
    switch (ppc_apbmux_id)
    {
        case 0:
        {
            ip_maxnum = FIREWALL_PPC_APBMUX1_IP_MAXNUM;
            break;
        }
        case 1:
        {
            ip_maxnum = FIREWALL_PPC_APBMUX2_IP_MAXNUM;
            break;
        }
        case 2:
        {
            ip_maxnum = FIREWALL_PPC_APBMUX3_IP_MAXNUM;
            break;
        }
        case 3:
        {
            ip_maxnum = FIREWALL_PPC_APBMUX4_IP_MAXNUM;
            break;
        }
        case 4:
        {
            ip_maxnum = FIREWALL_PPC_APBMUX5_IP_MAXNUM;
            break;
        }
        case 5:
        {
            ip_maxnum = FIREWALL_PPC_APBMUX6_IP_MAXNUM;
            break;
        }
        case 6:
        {
            ip_maxnum = FIREWALL_PPC_APBMUX7_IP_MAXNUM;
            break;
        }
        default:
        {
            ip_maxnum = 0U;
            break;
        }
    }

    return ip_maxnum;
}

/**
 * @brief Get the base address of the gpio controller.
 *
 * @param[in] channel_id The id of the pin channel.
 * @param[in] gpio_Base The base address of the gpio controller.
 *
 * @return The result of this function.
 * @details - return FIREWALL_E_OK : Get the specified gpio base address success.
 *          - return FIREWALL_E_GPIO_CHANNEL_ID : The id of the pin channel is unvalid.
 */
bool sdrv_firewall_gpio_get_base_addr(uint16_t *channel_id, uint32_t *gpio_Base)
{
    bool ret_val = true;

    /* #10 Check the parameters. */
    if (FIREWALL_GPIO_CHANNEL_MAXNUM <= *channel_id)
    {
        ret_val = false;
    }
    else
    {
        /* #20 Get the base address of the gpio controller. */
        if (FIREWALL_GPIO_SF_MAXNUM > *channel_id)
        {
            *gpio_Base = FIREWALL_APB_GPIO_SF_BASE;
        }
#ifndef CONFIG_E3L
        else
        {
            *channel_id -= FIREWALL_GPIO_SF_MAXNUM;
            *gpio_Base = FIREWALL_APB_GPIO_AP_BASE;
        }
#endif
    }

    return ret_val;
}

/* End of file */