SemiDrive SSDK Appication Program Interface PTG3.0
Data Fields
mmc_config_data

#include <sdrv_mmc_sdhci.h>

Data Fields

uint8_t slot
 
addr_t sdhc_base
 
uint32_t irq
 
uint16_t bus_width
 
uint32_t max_clk_rate
 
uint32_t voltage
 
uint8_t ddr50_support
 
uint8_t hs200_support
 
uint8_t hs400_support
 
uint8_t use_io_switch
 
uint8_t hw_reset_support
 
uint8_t uhs_support
 
void * clk
 

Field Documentation

◆ bus_width

uint16_t bus_width

Bus width used

◆ clk

void* clk

Clock config data

◆ ddr50_support

uint8_t ddr50_support

SDHC ddr50 mode supported or not

◆ hs200_support

uint8_t hs200_support

SDHC HS200 mode supported or not

◆ hs400_support

uint8_t hs400_support

SDHC HS400 mode supported or not

◆ hw_reset_support

uint8_t hw_reset_support

SDHC hardware reset supported or not

◆ irq

uint32_t irq

irq num

◆ max_clk_rate

uint32_t max_clk_rate

Max clock rate supported

◆ scr_ctrl

void* scr_ctrl

◆ scr_signal

void* scr_signal

◆ sdhc_base

addr_t sdhc_base

Base address for the sdhc

◆ slot

uint8_t slot

Sdcc slot used

◆ uhs_support

uint8_t uhs_support

SDHC hardware supported uhs mode

◆ use_io_switch

uint8_t use_io_switch

IO pad switch flag for shared sdc controller

◆ voltage

uint32_t voltage

bus voltage


The documentation for this struct was generated from the following file: