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<div id="projectname">SemiDrive SSDK Appication Program Interface<span id="projectnumber"> PTG3.0</span>
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="headertitle"><div class="title">sdrv_i2c_cfg</div></div>
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</div><!--header-->
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<div class="contents">
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<p><code>#include <<a class="el" href="sdrv__i2c_8h_source.html">sdrv_i2c.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:a3fa2827224abd5c95890830f9a512fa7"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#a3fa2827224abd5c95890830f9a512fa7">clk</a></td></tr>
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<tr class="separator:a3fa2827224abd5c95890830f9a512fa7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abc81edd3d3caf9e6c2e0762881da6016"><td class="memItemLeft" align="right" valign="top">paddr_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#abc81edd3d3caf9e6c2e0762881da6016">base</a></td></tr>
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<tr class="separator:abc81edd3d3caf9e6c2e0762881da6016"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a17fdd15a71ced1e05faf127882011db3"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#a17fdd15a71ced1e05faf127882011db3">irq</a></td></tr>
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<tr class="separator:a17fdd15a71ced1e05faf127882011db3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abaabdc509cdaba7df9f56c6c76f3ae19"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#abaabdc509cdaba7df9f56c6c76f3ae19">id</a></td></tr>
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<tr class="memitem:a17199c800bbe25941cd8fa8485d7c3ac"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#a17199c800bbe25941cd8fa8485d7c3ac">inited</a></td></tr>
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<tr class="separator:a17199c800bbe25941cd8fa8485d7c3ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69dd74f766b8ee811f917da89e7086d0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__i2c_8h.html#ae249f73c582dd668ad753e66ad7f6c4d">sdrv_i2cdrv_opmode_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#a69dd74f766b8ee811f917da89e7086d0">opmode</a></td></tr>
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<tr class="separator:a69dd74f766b8ee811f917da89e7086d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a86a3c53c0018a554a9db610a51fcd813"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__i2c_8h.html#ac6ffa127b6a252e337bd64ec07f36dc9">sdrv_i2cdrv_tsmode_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#a86a3c53c0018a554a9db610a51fcd813">tsmode</a></td></tr>
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<tr class="separator:a86a3c53c0018a554a9db610a51fcd813"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a873a442e4d55e3fcbf5509e74c4a2076"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__i2c_8h.html#ada3d5dd12df244e13b359788dc9c5e12">sdrv_i2cdrv_speed_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#a873a442e4d55e3fcbf5509e74c4a2076">speed</a></td></tr>
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<tr class="separator:a873a442e4d55e3fcbf5509e74c4a2076"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a03c8d475164f32ab5d06e9bbec1e27ea"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__i2c_8h.html#ad2b726fb2fc4bc75694ace5936f7b12a">sdrv_i2cdrv_bus_stat_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2c__cfg.html#a03c8d475164f32ab5d06e9bbec1e27ea">bus_stat</a></td></tr>
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<tr class="separator:a03c8d475164f32ab5d06e9bbec1e27ea"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p >@i2c controller config info </p>
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</div><h2 class="groupheader">Field Documentation</h2>
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<a id="abc81edd3d3caf9e6c2e0762881da6016" name="abc81edd3d3caf9e6c2e0762881da6016"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#abc81edd3d3caf9e6c2e0762881da6016">◆ </a></span>base</h2>
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<td class="memname">paddr_t base</td>
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</div><div class="memdoc">
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<p >base address allocate from system </p>
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</div>
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</div>
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<a id="a03c8d475164f32ab5d06e9bbec1e27ea" name="a03c8d475164f32ab5d06e9bbec1e27ea"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a03c8d475164f32ab5d06e9bbec1e27ea">◆ </a></span>bus_stat</h2>
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<td class="memname"><a class="el" href="sdrv__i2c_8h.html#ad2b726fb2fc4bc75694ace5936f7b12a">sdrv_i2cdrv_bus_stat_t</a> bus_stat</td>
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</table>
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</div><div class="memdoc">
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<p >bus stat change trace </p>
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</div>
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</div>
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<a id="a3fa2827224abd5c95890830f9a512fa7" name="a3fa2827224abd5c95890830f9a512fa7"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a3fa2827224abd5c95890830f9a512fa7">◆ </a></span>clk</h2>
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<td class="memname">uint32_t clk</td>
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</table>
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</div><div class="memdoc">
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<p >sclk allocate from system </p>
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</div>
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</div>
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<a id="abaabdc509cdaba7df9f56c6c76f3ae19" name="abaabdc509cdaba7df9f56c6c76f3ae19"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#abaabdc509cdaba7df9f56c6c76f3ae19">◆ </a></span>id</h2>
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<td class="memname">uint32_t id</td>
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</table>
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</div><div class="memdoc">
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<p >id allocate from system </p>
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<a id="a17199c800bbe25941cd8fa8485d7c3ac" name="a17199c800bbe25941cd8fa8485d7c3ac"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a17199c800bbe25941cd8fa8485d7c3ac">◆ </a></span>inited</h2>
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<td class="memname">uint32_t inited</td>
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</div><div class="memdoc">
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<p >ctrl already init or not by customer </p>
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<a id="a17fdd15a71ced1e05faf127882011db3" name="a17fdd15a71ced1e05faf127882011db3"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a17fdd15a71ced1e05faf127882011db3">◆ </a></span>irq</h2>
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<td class="memname">uint32_t irq</td>
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</table>
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</div><div class="memdoc">
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<p >irq allocate from system </p>
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</div>
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<a id="a69dd74f766b8ee811f917da89e7086d0" name="a69dd74f766b8ee811f917da89e7086d0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a69dd74f766b8ee811f917da89e7086d0">◆ </a></span>opmode</h2>
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<td class="memname"><a class="el" href="sdrv__i2c_8h.html#ae249f73c582dd668ad753e66ad7f6c4d">sdrv_i2cdrv_opmode_t</a> opmode</td>
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</table>
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</div><div class="memdoc">
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<p >master or slave operation mode set </p>
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</div>
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</div>
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<a id="a873a442e4d55e3fcbf5509e74c4a2076" name="a873a442e4d55e3fcbf5509e74c4a2076"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a873a442e4d55e3fcbf5509e74c4a2076">◆ </a></span>speed</h2>
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<td class="memname"><a class="el" href="sdrv__i2c_8h.html#ada3d5dd12df244e13b359788dc9c5e12">sdrv_i2cdrv_speed_t</a> speed</td>
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</div><div class="memdoc">
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<p >speed(100k/400k/1M/3.4M/5M) mode set <br />
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</p>
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<a id="a86a3c53c0018a554a9db610a51fcd813" name="a86a3c53c0018a554a9db610a51fcd813"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a86a3c53c0018a554a9db610a51fcd813">◆ </a></span>tsmode</h2>
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<td class="memname"><a class="el" href="sdrv__i2c_8h.html#ac6ffa127b6a252e337bd64ec07f36dc9">sdrv_i2cdrv_tsmode_t</a> tsmode</td>
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</div><div class="memdoc">
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<p >interrupt or polling transfer mode set </p>
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</div>
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</div>
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<hr/>The documentation for this struct was generated from the following file:<ul>
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<li>Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/<a class="el" href="sdrv__i2c_8h_source.html">sdrv_i2c.h</a></li>
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</ul>
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Generated by <a href="https://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.9.4
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