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551 lines
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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_ee023d43c33bfccc31aa50a48a76892b.html">include</a></li> </ul>
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<div class="headertitle"><div class="title">sdrv_spi.h</div></div>
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<a href="sdrv__spi_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno"> 1</span> </div>
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<div class="line"><a id="l00009" name="l00009"></a><span class="lineno"> 9</span><span class="preprocessor">#ifndef SDRV_SPI_H</span></div>
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<div class="line"><a id="l00010" name="l00010"></a><span class="lineno"> 10</span><span class="preprocessor">#define SDRV_SPI_H</span></div>
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<div class="line"><a id="l00011" name="l00011"></a><span class="lineno"> 11</span> </div>
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<div class="line"><a id="l00012" name="l00012"></a><span class="lineno"> 12</span><span class="preprocessor">#ifdef __cplusplus</span></div>
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<div class="line"><a id="l00013" name="l00013"></a><span class="lineno"> 13</span><span class="keyword">extern</span> <span class="stringliteral">"C"</span> {</div>
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<div class="line"><a id="l00014" name="l00014"></a><span class="lineno"> 14</span><span class="preprocessor">#endif</span></div>
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<div class="line"><a id="l00015" name="l00015"></a><span class="lineno"> 15</span> </div>
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<div class="line"><a id="l00016" name="l00016"></a><span class="lineno"> 16</span><span class="preprocessor">#include <<a class="code" href="sdrv__ckgen_8h.html">sdrv_ckgen.h</a>></span></div>
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<div class="line"><a id="l00017" name="l00017"></a><span class="lineno"> 17</span><span class="preprocessor">#include <stdbool.h></span></div>
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<div class="line"><a id="l00018" name="l00018"></a><span class="lineno"> 18</span><span class="preprocessor">#include <stdint.h></span></div>
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<div class="line"><a id="l00019" name="l00019"></a><span class="lineno"> 19</span> </div>
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<div class="line"><a id="l00020" name="l00020"></a><span class="lineno"> 20</span><span class="preprocessor">#include "reg.h"</span></div>
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<div class="line"><a id="l00021" name="l00021"></a><span class="lineno"> 21</span><span class="preprocessor">#include "<a class="code" href="sdrv__dma_8h.html">sdrv_dma.h</a>"</span></div>
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<div class="line"><a id="l00022" name="l00022"></a><span class="lineno"> 22</span><span class="preprocessor">#include "spi_reg.h"</span></div>
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<div class="line"><a id="l00023" name="l00023"></a><span class="lineno"> 23</span> </div>
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<div class="line"><a id="l00024" name="l00024"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a802bcff3f2804926df7745b79a0f5d90"> 24</a></span><span class="preprocessor">#define SPI_PIPE_LINE_SIZE_8B 3U</span></div>
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<div class="line"><a id="l00025" name="l00025"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#acd7c046c9f2648053efe2985b5d925f4"> 25</a></span><span class="preprocessor">#define SPI_PIPE_LINE_SIZE_4B 4U</span></div>
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<div class="line"><a id="l00026" name="l00026"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#afa17bab318c6a7512972c1b64a2b18af"> 26</a></span><span class="preprocessor">#define SPI_PIPE_LINE_SIZE_2B 5U</span></div>
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<div class="line"><a id="l00027" name="l00027"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#af0d1e7d8ede43a406fb579e42f26aefb"> 27</a></span><span class="preprocessor">#define SPI_PIPE_LINE_SIZE_OB 2U</span></div>
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<div class="line"><a id="l00028" name="l00028"></a><span class="lineno"> 28</span><span class="comment">// 2 mst_idle 3 mst_start 7 mst_data_wait</span></div>
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<div class="line"><a id="l00029" name="l00029"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a3974daf80ad452fb69ceb9c9967759e7"> 29</a></span><span class="preprocessor">#define SPI_FSM_WAIT_DATA_STA 7U</span></div>
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<div class="line"><a id="l00030" name="l00030"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a5e5c23d0f58ab7e57447c43edd977786"> 30</a></span><span class="preprocessor">#define SPI_FSM_M_STR_STA 3U</span></div>
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<div class="line"><a id="l00031" name="l00031"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a28a822f29caab463bf26f12ea0d4055b"> 31</a></span><span class="preprocessor">#define SPI_FSM_IDLE_STA 2U</span></div>
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<div class="line"><a id="l00032" name="l00032"></a><span class="lineno"> 32</span> </div>
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<div class="line"><a id="l00036" name="l00036"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8ae83e6e93ec3fbacc9189a2212b22dc86"> 36</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8">spi_cpol</a> { <a class="code hl_enumvalue" href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8a4798f253437a781dfe5bac4fc50b282a">SCK_IDLE_LOW</a>, <a class="code hl_enumvalue" href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8ae83e6e93ec3fbacc9189a2212b22dc86">SCK_IDLE_HIGH</a> };</div>
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<div class="line"><a id="l00037" name="l00037"></a><span class="lineno"> 37</span> </div>
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<div class="line"><a id="l00041" name="l00041"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65"> 41</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65">spi_cpha</a> {</div>
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<div class="line"><a id="l00042" name="l00042"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65a8ce0855eff8bb34bf9bff87b6e6ff62d"> 42</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65a8ce0855eff8bb34bf9bff87b6e6ff62d">DATA_CPT_ON_FIRST_SCK_EDGE</a>,</div>
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<div class="line"><a id="l00043" name="l00043"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65abae896865f9b933d6d1d0fcde07995ad"> 43</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65abae896865f9b933d6d1d0fcde07995ad">DATA_CPT_ON_SECOND_SCK_EDGE</a>,</div>
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<div class="line"><a id="l00044" name="l00044"></a><span class="lineno"> 44</span>};</div>
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<div class="line"><a id="l00045" name="l00045"></a><span class="lineno"> 45</span> </div>
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<div class="line"><a id="l00049" name="l00049"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9a77105b2f98fec68a5a75c86a058534b5"> 49</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9">spi_cs_polarity</a> { <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9af9fd1d20aaa46974b85c22f8b224906a">CS_ACTIVE_LOW</a>, <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9a77105b2f98fec68a5a75c86a058534b5">CS_ACTIVE_HIGH</a> };</div>
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<div class="line"><a id="l00050" name="l00050"></a><span class="lineno"> 50</span> </div>
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<div class="line"><a id="l00054" name="l00054"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a3a97d5f36f5f4119204400994c9c7dcd"> 54</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63">spi_cs_select</a> { <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a3a97d5f36f5f4119204400994c9c7dcd">CS_SEL_SS0</a> = 0, <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a3ff078afdd80ff69dea6fb90f517cffe">CS_SEL_SS1</a>, <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a10a22689551e5b91b417ff49c21e83fa">CS_SEL_SS2</a>, <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a09c515c068def175e6bd5be3114ab2b5">CS_SEL_SS3</a> };</div>
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<div class="line"><a id="l00055" name="l00055"></a><span class="lineno"> 55</span> </div>
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<div class="line"><a id="l00059" name="l00059"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2"> 59</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2">spi_state</a> {</div>
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<div class="line"><a id="l00060" name="l00060"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a8d22ab8335993c85e237f9d8c625138b"> 60</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a8d22ab8335993c85e237f9d8c625138b">SPI_STATE_UNINIT</a> = 0x0,</div>
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<div class="line"><a id="l00061" name="l00061"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a21aa93a1cb39865cc54f483b69a21e32"> 61</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a21aa93a1cb39865cc54f483b69a21e32">SPI_STATE_INITED</a> = 0x1,</div>
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<div class="line"><a id="l00062" name="l00062"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612"> 62</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612">SPI_STATE_BUSY_TX</a> = 0x02,</div>
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<div class="line"><a id="l00063" name="l00063"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9"> 63</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9">SPI_STATE_BUSY_RX</a> = 0x04,</div>
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<div class="line"><a id="l00064" name="l00064"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a533e5d9f204ee8cd75dd5a538d6ff529"> 64</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a533e5d9f204ee8cd75dd5a538d6ff529">SPI_STATE_IRQ_ACT</a> = 0x08,</div>
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<div class="line"><a id="l00065" name="l00065"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3"> 65</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3">SPI_STATE_DMA_TX</a> = 0x10,</div>
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<div class="line"><a id="l00066" name="l00066"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4"> 66</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4">SPI_STATE_DMA_RX</a> = 0x20,</div>
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<div class="line"><a id="l00067" name="l00067"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17"> 67</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17">SPI_STATE_IRQ_TX</a> = 0x40,</div>
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<div class="line"><a id="l00068" name="l00068"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d"> 68</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d">SPI_STATE_IRQ_RX</a> = 0x80,</div>
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<div class="line"><a id="l00069" name="l00069"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ad73d6e03e9c7501ab1970944700757fe"> 69</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ad73d6e03e9c7501ab1970944700757fe">SPI_STATE_IS_SLAVE</a> = 0x100,</div>
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<div class="line"><a id="l00070" name="l00070"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aef19188483bc3cef0dd026926afe2864"> 70</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aef19188483bc3cef0dd026926afe2864">SPI_STATE_CS_ACTIVEED</a> = 0x200,</div>
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<div class="line"><a id="l00071" name="l00071"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a6fdd3c8af7c56233ee52eb6504128284"> 71</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a6fdd3c8af7c56233ee52eb6504128284">SPI_STATE_IS_UNS_EN</a> = 0x400,</div>
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<div class="line"><a id="l00072" name="l00072"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a52a6ca5c5b2eebd9437577dab940fa10"> 72</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a52a6ca5c5b2eebd9437577dab940fa10">SPI_STATE_IS_RO_END</a> = 0x800,</div>
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<div class="line"><a id="l00073" name="l00073"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a76c1b18d72df762e65e3e2bb94903812"> 73</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a76c1b18d72df762e65e3e2bb94903812">SPI_STATE_DMA_TX_RD</a> = 0x1000,</div>
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<div class="line"><a id="l00074" name="l00074"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a81d595a6751561c4ad7ea27efddd8425"> 74</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a81d595a6751561c4ad7ea27efddd8425">SPI_STATE_DMA_RX_RD</a> = 0x2000,</div>
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<div class="line"><a id="l00075" name="l00075"></a><span class="lineno"> 75</span>};</div>
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<div class="line"><a id="l00076" name="l00076"></a><span class="lineno"> 76</span> </div>
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<div class="line"><a id="l00080" name="l00080"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992"> 80</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992">fifo_state</a> {</div>
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<div class="line"><a id="l00081" name="l00081"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992af900525e55908f1dce579bc4ae0d8f6c"> 81</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992af900525e55908f1dce579bc4ae0d8f6c">SPI_RX_FIFO_READ</a> = (0x01 << 0),</div>
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<div class="line"><a id="l00082" name="l00082"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a986363eea4b58740ded6ed9648619f3d"> 82</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a986363eea4b58740ded6ed9648619f3d">SPI_TX_FIFO_WRITE</a> = (0x01 << 1),</div>
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<div class="line"><a id="l00083" name="l00083"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a7207f2f552aeff34a7bcb9b7403fd230"> 83</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a7207f2f552aeff34a7bcb9b7403fd230">SPI_TX_FIFO_UDR</a> = (0x01 << 2),</div>
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<div class="line"><a id="l00084" name="l00084"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992ab1e5a03a5c94c3481777120ecc205f3f"> 84</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992ab1e5a03a5c94c3481777120ecc205f3f">SPI_RX_FIFO_OVR</a> = (0x01 << 3),</div>
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<div class="line"><a id="l00085" name="l00085"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a5499035c9f82a80f50beac7d38e47490"> 85</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a5499035c9f82a80f50beac7d38e47490">SPI_TX_DMA_ERR</a> = (0x01 << 4),</div>
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<div class="line"><a id="l00086" name="l00086"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a71ed4c726800f4d80ddd9de1882a9aa1"> 86</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a71ed4c726800f4d80ddd9de1882a9aa1">SPI_RX_DMA_ERR</a> = (0x01 << 5),</div>
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<div class="line"><a id="l00087" name="l00087"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992adf6899b51412eaac3451a1a4c3c1bddb"> 87</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992adf6899b51412eaac3451a1a4c3c1bddb">SPI_TX_ONLY_DONE</a> = (0x01 << 6),</div>
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<div class="line"><a id="l00088" name="l00088"></a><span class="lineno"> 88</span>};</div>
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<div class="line"><a id="l00089" name="l00089"></a><span class="lineno"> 89</span> </div>
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<div class="line"><a id="l00093" name="l00093"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579"> 93</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579">irq_type</a> {</div>
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<div class="line"><a id="l00094" name="l00094"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a71da78e64c103e0aca751f529d032ff0"> 94</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a71da78e64c103e0aca751f529d032ff0">SPI_TRASPORT_FINISH</a> = 0x01 << 0,</div>
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<div class="line"><a id="l00095" name="l00095"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a1d85271a6ae60d4f4791143f8d33c015"> 95</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a1d85271a6ae60d4f4791143f8d33c015">SPI_RX_READ_REQ</a> = 0x01 << 1,</div>
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<div class="line"><a id="l00096" name="l00096"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579acc5fb717fcf172ebaef7b1df9c4ed7cc"> 96</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579acc5fb717fcf172ebaef7b1df9c4ed7cc">SPI_TX_WRITE_REQ</a> = 0x01 << 2,</div>
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<div class="line"><a id="l00097" name="l00097"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a991dd1bc79f63e864f61d13e6401064d"> 97</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a991dd1bc79f63e864f61d13e6401064d">SPI_CS_INVLD_REQ</a> = 0x01 << 3,</div>
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<div class="line"><a id="l00098" name="l00098"></a><span class="lineno"> 98</span>};</div>
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<div class="line"><a id="l00099" name="l00099"></a><span class="lineno"> 99</span> </div>
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<div class="line"><a id="l00103" name="l00103"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4a"> 103</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4a">spi_bus_state</a> { <a class="code hl_enumvalue" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4aa3b368c531eb77a6e4baaacdeba1c733c">SPI_IDLE</a> = 0, <a class="code hl_enumvalue" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4aa77af10511cd7c60df95c66e904a13643">SPI_BUSY</a> };</div>
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<div class="line"><a id="l00104" name="l00104"></a><span class="lineno"> 104</span> </div>
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<div class="line"><a id="l00108" name="l00108"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871"> 108</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871">spi_ops_type</a> {</div>
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<div class="line"><a id="l00109" name="l00109"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871aae04f0d32e6c569d9741adbc02cbc9ae"> 109</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871aae04f0d32e6c569d9741adbc02cbc9ae">OP_MODE_SYNC</a> = 0,</div>
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<div class="line"><a id="l00110" name="l00110"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871a28c81e4590d645052a36f77ff08cd824"> 110</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871a28c81e4590d645052a36f77ff08cd824">OP_MODE_IRQ</a>,</div>
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<div class="line"><a id="l00111" name="l00111"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871ab21821808ecda763084d72510cc11859"> 111</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871ab21821808ecda763084d72510cc11859">OP_MODE_DMA</a>,</div>
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<div class="line"><a id="l00112" name="l00112"></a><span class="lineno"> 112</span>};</div>
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<div class="line"><a id="l00113" name="l00113"></a><span class="lineno"> 113</span> </div>
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<div class="line"><a id="l00117" name="l00117"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187"> 117</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
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<div class="line"><a id="l00118" name="l00118"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187a436ec2bf6cc84a3264aa50aee42303bf"> 118</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187a436ec2bf6cc84a3264aa50aee42303bf">SPI_TRANS_DONE</a> = 0,</div>
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<div class="line"><a id="l00119" name="l00119"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187a8845a938c5b584e72f0e79c60204cf39"> 119</a></span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187a8845a938c5b584e72f0e79c60204cf39">SPI_TRANS_FAIL</a>,</div>
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<div class="line"><a id="l00120" name="l00120"></a><span class="lineno"> 120</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187adc1a6d72de187f49cb0d876455719b81">SPI_TRANS_PASS</a></div>
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<div class="line"><a id="l00121" name="l00121"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187adc1a6d72de187f49cb0d876455719b81"> 121</a></span>} <a class="code hl_enumeration" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187">spi_event_type</a>;</div>
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<div class="line"><a id="l00122" name="l00122"></a><span class="lineno"> 122</span> </div>
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<div class="line"><a id="l00126" name="l00126"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953e"> 126</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953e">data_dir</a> { <a class="code hl_enumvalue" href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953ea7fbd0493407a88ec23c8e571c0447f87">SPI_RX_DIR</a> = 0x01, <a class="code hl_enumvalue" href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953ea2317986d65fff20968785c40b25a4c9b">SPI_TX_DIR</a> = 0x02 };</div>
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<div class="line"><a id="l00127" name="l00127"></a><span class="lineno"> 127</span> </div>
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<div class="line"><a id="l00131" name="l00131"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#afe67f453cd960a973f1fd40630a9367f"> 131</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="sdrv__spi_8h.html#afe67f453cd960a973f1fd40630a9367f">spi_callback_t</a>)(<span class="keywordtype">void</span> *spi, <a class="code hl_enumeration" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187">spi_event_type</a> Event);</div>
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<div class="line"><a id="l00132" name="l00132"></a><span class="lineno"> 132</span> </div>
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<div class="line"><a id="l00136" name="l00136"></a><span class="lineno"><a class="line" href="structspi__device__config.html"> 136</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structspi__device__config.html">spi_device_config</a> {</div>
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<div class="line"><a id="l00137" name="l00137"></a><span class="lineno"> 137</span> <span class="comment">/* sclk frea in hz */</span></div>
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<div class="line"><a id="l00138" name="l00138"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a177799396ff679549d62c159146cc8ba"> 138</a></span> uint32_t <a class="code hl_variable" href="structspi__device__config.html#a177799396ff679549d62c159146cc8ba">sclk_freq</a>;</div>
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<div class="line"><a id="l00139" name="l00139"></a><span class="lineno"> 139</span> <span class="comment">/* Idle level */</span></div>
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<div class="line"><a id="l00140" name="l00140"></a><span class="lineno"><a class="line" href="structspi__device__config.html#acb82e172f3b682a2e762be4fdcb1a074"> 140</a></span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8">spi_cpol</a> <a class="code hl_variable" href="structspi__device__config.html#acb82e172f3b682a2e762be4fdcb1a074">cpol</a>;</div>
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<div class="line"><a id="l00141" name="l00141"></a><span class="lineno"> 141</span> <span class="comment">/* Sampling phase */</span></div>
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<div class="line"><a id="l00142" name="l00142"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a3b0c85068b0a7bfbc1f117fc2b2b27f5"> 142</a></span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65">spi_cpha</a> <a class="code hl_variable" href="structspi__device__config.html#a3b0c85068b0a7bfbc1f117fc2b2b27f5">cpha</a>;</div>
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<div class="line"><a id="l00143" name="l00143"></a><span class="lineno"> 143</span> <span class="comment">/* cs active polarity */</span></div>
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<div class="line"><a id="l00144" name="l00144"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a7cbe4cb16f871db3a2fbb9a524ee6f25"> 144</a></span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9">spi_cs_polarity</a> <a class="code hl_variable" href="structspi__device__config.html#a7cbe4cb16f871db3a2fbb9a524ee6f25">cs_pol</a>;</div>
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<div class="line"><a id="l00145" name="l00145"></a><span class="lineno"> 145</span> <span class="comment">/* ss0-ss3 or GPIO_xx */</span></div>
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<div class="line"><a id="l00146" name="l00146"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a2a142ee8181d56c1aa46cacee35c4ae5"> 146</a></span> uint8_t <a class="code hl_variable" href="structspi__device__config.html#a2a142ee8181d56c1aa46cacee35c4ae5">cs_sel</a>;</div>
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<div class="line"><a id="l00147" name="l00147"></a><span class="lineno"> 147</span> <span class="comment">/* deivce raw data width 4-32*/</span></div>
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<div class="line"><a id="l00148" name="l00148"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a09a2a45f731b02946ff6d3cd15c1a476"> 148</a></span> uint8_t <a class="code hl_variable" href="structspi__device__config.html#a09a2a45f731b02946ff6d3cd15c1a476">width</a>;</div>
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<div class="line"><a id="l00149" name="l00149"></a><span class="lineno"> 149</span> <span class="comment">/* minimum interval between two transmissions in n*sclk */</span></div>
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<div class="line"><a id="l00150" name="l00150"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a2731fb9320ca2d21ab1baec574322049"> 150</a></span> uint8_t <a class="code hl_variable" href="structspi__device__config.html#a2731fb9320ca2d21ab1baec574322049">fream_delay</a>;</div>
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<div class="line"><a id="l00151" name="l00151"></a><span class="lineno"> 151</span> <span class="comment">/* cs setup time in n*sclk */</span></div>
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<div class="line"><a id="l00152" name="l00152"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a935815878c660623344f4878d3e20dec"> 152</a></span> uint8_t <a class="code hl_variable" href="structspi__device__config.html#a935815878c660623344f4878d3e20dec">clk2cs_delay</a>;</div>
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<div class="line"><a id="l00153" name="l00153"></a><span class="lineno"> 153</span> <span class="comment">/* cs hold time in n*sclk */</span></div>
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<div class="line"><a id="l00154" name="l00154"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a0916d8e175dafd7ab00bf740c54db24c"> 154</a></span> uint8_t <a class="code hl_variable" href="structspi__device__config.html#a0916d8e175dafd7ab00bf740c54db24c">clk2cs_end_delay</a>;</div>
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<div class="line"><a id="l00155" name="l00155"></a><span class="lineno"> 155</span> <span class="comment">/* lsb or msb */</span></div>
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<div class="line"><a id="l00156" name="l00156"></a><span class="lineno"><a class="line" href="structspi__device__config.html#ab40d0d4e95eeefdb23b2b23d880708f9"> 156</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__device__config.html#ab40d0d4e95eeefdb23b2b23d880708f9">is_lsb_mode</a>;</div>
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<div class="line"><a id="l00157" name="l00157"></a><span class="lineno"> 157</span> <span class="comment">/* Control the cs signal through IO or peripherals */</span></div>
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<div class="line"><a id="l00158" name="l00158"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a6e05c22595ffcc0a3117da49d0ffb8e5"> 158</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__device__config.html#a6e05c22595ffcc0a3117da49d0ffb8e5">is_soft_cs</a>;</div>
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<div class="line"><a id="l00159" name="l00159"></a><span class="lineno"> 159</span> <span class="comment">/* enable miso sampling delay half sclk on master mode */</span></div>
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<div class="line"><a id="l00160" name="l00160"></a><span class="lineno"><a class="line" href="structspi__device__config.html#a4e17f397cf5b59ea89e3d0e59d864fa3"> 160</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__device__config.html#a4e17f397cf5b59ea89e3d0e59d864fa3">is_tx_delay</a>;</div>
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<div class="line"><a id="l00161" name="l00161"></a><span class="lineno"> 161</span>};</div>
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<div class="line"><a id="l00162" name="l00162"></a><span class="lineno"> 162</span> </div>
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<div class="line"><a id="l00166" name="l00166"></a><span class="lineno"><a class="line" href="structspi__common__config.html"> 166</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structspi__common__config.html">spi_common_config</a> {</div>
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<div class="line"><a id="l00167" name="l00167"></a><span class="lineno"> 167</span> <span class="comment">/* motor rola mode or ti mode */</span></div>
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<div class="line"><a id="l00168" name="l00168"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a2bb4595339d531c08fb228e6be32cabd"> 168</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__common__config.html#a2bb4595339d531c08fb228e6be32cabd">is_spi_mode</a>;</div>
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<div class="line"><a id="l00169" name="l00169"></a><span class="lineno"> 169</span> <span class="comment">/* half mode */</span></div>
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<div class="line"><a id="l00170" name="l00170"></a><span class="lineno"><a class="line" href="structspi__common__config.html#ac6b6012b0142f6c864c45086a70ffb03"> 170</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__common__config.html#ac6b6012b0142f6c864c45086a70ffb03">is_half_mode</a>;</div>
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<div class="line"><a id="l00171" name="l00171"></a><span class="lineno"> 171</span> <span class="comment">/* master or slave mode */</span></div>
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<div class="line"><a id="l00172" name="l00172"></a><span class="lineno"><a class="line" href="structspi__common__config.html#ac4938b746ebb19d35675324c1dd3cb85"> 172</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__common__config.html#ac4938b746ebb19d35675324c1dd3cb85">is_master</a>;</div>
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<div class="line"><a id="l00173" name="l00173"></a><span class="lineno"> 173</span> <span class="comment">/* polling mode */</span></div>
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<div class="line"><a id="l00174" name="l00174"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a9c86a82e9458805493b98f7d1e9b3dc3"> 174</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__common__config.html#a9c86a82e9458805493b98f7d1e9b3dc3">is_polling_mode</a>;</div>
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<div class="line"><a id="l00175" name="l00175"></a><span class="lineno"> 175</span><span class="preprocessor">#if CONFIG_SPI_ENABLE_DMA</span></div>
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<div class="line"><a id="l00176" name="l00176"></a><span class="lineno"> 176</span> <span class="comment">/* rx dma channel id */</span></div>
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<div class="line"><a id="l00177" name="l00177"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a0254136707993378f527c16a54c630fe"> 177</a></span> <a class="code hl_enumeration" href="sdrv__dma_8h.html#a2fce8b449dfda53bb26afae8dea00c9f">sdrv_dma_channel_id_e</a> <a class="code hl_variable" href="structspi__common__config.html#a0254136707993378f527c16a54c630fe">rx_ch_id</a>;</div>
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<div class="line"><a id="l00178" name="l00178"></a><span class="lineno"> 178</span> <span class="comment">/* tx dma channel id */</span></div>
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<div class="line"><a id="l00179" name="l00179"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a695d5200cc71c136733ac6597a53fce2"> 179</a></span> <a class="code hl_enumeration" href="sdrv__dma_8h.html#a2fce8b449dfda53bb26afae8dea00c9f">sdrv_dma_channel_id_e</a> <a class="code hl_variable" href="structspi__common__config.html#a695d5200cc71c136733ac6597a53fce2">tx_ch_id</a>;</div>
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<div class="line"><a id="l00180" name="l00180"></a><span class="lineno"> 180</span> <span class="comment">/* dma handler */</span></div>
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<div class="line"><a id="l00181" name="l00181"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a5d74b7e9ac864649d4d9c2728d8f6cf4"> 181</a></span> <a class="code hl_struct" href="structsdrv__dma.html">sdrv_dma_t</a> *<a class="code hl_variable" href="structspi__common__config.html#a5d74b7e9ac864649d4d9c2728d8f6cf4">dma_ins</a>;</div>
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<div class="line"><a id="l00182" name="l00182"></a><span class="lineno"> 182</span><span class="preprocessor">#endif</span></div>
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<div class="line"><a id="l00183" name="l00183"></a><span class="lineno"> 183</span> <span class="comment">/* reg base */</span></div>
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<div class="line"><a id="l00184" name="l00184"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a0523cedff47e2441fc198b7770ec5d3f"> 184</a></span> uint32_t <a class="code hl_variable" href="structspi__common__config.html#a0523cedff47e2441fc198b7770ec5d3f">base</a>;</div>
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<div class="line"><a id="l00185" name="l00185"></a><span class="lineno"> 185</span> <span class="comment">/* irq num */</span></div>
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<div class="line"><a id="l00186" name="l00186"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a17fdd15a71ced1e05faf127882011db3"> 186</a></span> uint32_t <a class="code hl_variable" href="structspi__common__config.html#a17fdd15a71ced1e05faf127882011db3">irq</a>;</div>
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<div class="line"><a id="l00187" name="l00187"></a><span class="lineno"> 187</span> <span class="comment">/* root clk node */</span></div>
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<div class="line"><a id="l00188" name="l00188"></a><span class="lineno"><a class="line" href="structspi__common__config.html#a7d095fd897a859b9aab28c2652d511f1"> 188</a></span> <span class="keyword">const</span> <a class="code hl_struct" href="structsdrv__ckgen__slice__node.html">sdrv_ckgen_slice_node_t</a> *<a class="code hl_variable" href="structspi__common__config.html#a7d095fd897a859b9aab28c2652d511f1">clk</a>;</div>
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<div class="line"><a id="l00189" name="l00189"></a><span class="lineno"> 189</span>};</div>
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<div class="line"><a id="l00190" name="l00190"></a><span class="lineno"> 190</span> </div>
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<div class="line"><a id="l00194" name="l00194"></a><span class="lineno"><a class="line" href="unionspi__data__ptr.html"> 194</a></span><span class="keyword">union </span><a class="code hl_union" href="unionspi__data__ptr.html">spi_data_ptr</a> {</div>
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<div class="line"><a id="l00195" name="l00195"></a><span class="lineno"> 195</span> <span class="comment">/* data */</span></div>
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<div class="line"><a id="l00196" name="l00196"></a><span class="lineno"><a class="line" href="unionspi__data__ptr.html#a97ad06b300d95ba1d023dcb1e825335f"> 196</a></span> uint32_t <a class="code hl_variable" href="unionspi__data__ptr.html#a97ad06b300d95ba1d023dcb1e825335f">val</a>;</div>
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<div class="line"><a id="l00197" name="l00197"></a><span class="lineno"><a class="line" href="unionspi__data__ptr.html#a2e5d0e850c1284852bb2cb15ae49b9e9"> 197</a></span> uint8_t *<a class="code hl_variable" href="unionspi__data__ptr.html#a2e5d0e850c1284852bb2cb15ae49b9e9">u8_ptr</a>;</div>
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<div class="line"><a id="l00198" name="l00198"></a><span class="lineno"><a class="line" href="unionspi__data__ptr.html#a1669af8a07d107017643a6f1a86723f5"> 198</a></span> uint16_t *<a class="code hl_variable" href="unionspi__data__ptr.html#a1669af8a07d107017643a6f1a86723f5">u16_ptr</a>;</div>
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<div class="line"><a id="l00199" name="l00199"></a><span class="lineno"><a class="line" href="unionspi__data__ptr.html#ac913a0aef13e475ab44ad095e019ac0e"> 199</a></span> uint32_t *<a class="code hl_variable" href="unionspi__data__ptr.html#ac913a0aef13e475ab44ad095e019ac0e">u32_ptr</a>;</div>
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<div class="line"><a id="l00200" name="l00200"></a><span class="lineno"> 200</span>};</div>
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<div class="line"><a id="l00201" name="l00201"></a><span class="lineno"> 201</span> </div>
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<div class="line"><a id="l00205" name="l00205"></a><span class="lineno"><a class="line" href="structspi__dma__context.html"> 205</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structspi__dma__context.html">spi_dma_context</a> {</div>
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<div class="line"><a id="l00206" name="l00206"></a><span class="lineno"><a class="line" href="structspi__dma__context.html#aaa25437f8d47d9c71c7abc994f70dd4a"> 206</a></span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953e">data_dir</a> <a class="code hl_variable" href="structspi__dma__context.html#aaa25437f8d47d9c71c7abc994f70dd4a">dir</a>;</div>
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<div class="line"><a id="l00207" name="l00207"></a><span class="lineno"><a class="line" href="structspi__dma__context.html#a2a6994ba0e51d3c3ae9a2801719411e7"> 207</a></span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structspi__dma__context.html#a2a6994ba0e51d3c3ae9a2801719411e7">bus</a>;</div>
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<div class="line"><a id="l00208" name="l00208"></a><span class="lineno"><a class="line" href="structspi__dma__context.html#a9e0e1b229ce9ec2b4c88452b2d5106a5"> 208</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structspi__dma__context.html#a9e0e1b229ce9ec2b4c88452b2d5106a5">is_need_handle</a>;</div>
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<div class="line"><a id="l00209" name="l00209"></a><span class="lineno"> 209</span>};</div>
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<div class="line"><a id="l00210" name="l00210"></a><span class="lineno"> 210</span> </div>
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<div class="line"><a id="l00214" name="l00214"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html"> 214</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structspi__transmit__cb.html">spi_transmit_cb</a> {</div>
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<div class="line"><a id="l00215" name="l00215"></a><span class="lineno"> 215</span> <span class="comment">/* transmit_sche mode need this*/</span></div>
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<div class="line"><a id="l00216" name="l00216"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#a96bbf959016e4411c9e6b9812a8be60a"> 216</a></span> uint32_t <a class="code hl_variable" href="structspi__transmit__cb.html#a96bbf959016e4411c9e6b9812a8be60a">len</a>;</div>
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<div class="line"><a id="l00217" name="l00217"></a><span class="lineno"> 217</span> <span class="comment">/* tansmit data width type */</span></div>
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<div class="line"><a id="l00218" name="l00218"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#ae42fa22efce1eaf9bf8d0f3587cafee5"> 218</a></span> uint8_t <a class="code hl_variable" href="structspi__transmit__cb.html#ae42fa22efce1eaf9bf8d0f3587cafee5">width_type</a>;</div>
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<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"> 219</span> <span class="comment">/* prxdata */</span></div>
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<div class="line"><a id="l00220" name="l00220"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#aa431416c0df9d7b349c13b075c4aca24"> 220</a></span> <span class="keyword">union </span><a class="code hl_union" href="unionspi__data__ptr.html">spi_data_ptr</a> <a class="code hl_variable" href="structspi__transmit__cb.html#aa431416c0df9d7b349c13b075c4aca24">prxdata</a>;</div>
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<div class="line"><a id="l00221" name="l00221"></a><span class="lineno"> 221</span> <span class="comment">/* ptxdata */</span></div>
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<div class="line"><a id="l00222" name="l00222"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#aa28593304c9a3e7243f71aa17b27bde4"> 222</a></span> <span class="keyword">union </span><a class="code hl_union" href="unionspi__data__ptr.html">spi_data_ptr</a> <a class="code hl_variable" href="structspi__transmit__cb.html#aa28593304c9a3e7243f71aa17b27bde4">ptxdata</a>;</div>
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<div class="line"><a id="l00223" name="l00223"></a><span class="lineno"> 223</span> <span class="comment">/* prxdata */</span></div>
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<div class="line"><a id="l00224" name="l00224"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#a5358b36971f812a541ab223f38df1608"> 224</a></span> uint32_t <a class="code hl_variable" href="structspi__transmit__cb.html#a5358b36971f812a541ab223f38df1608">rx_cur</a>;</div>
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<div class="line"><a id="l00225" name="l00225"></a><span class="lineno"> 225</span> <span class="comment">/* ptxdata */</span></div>
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<div class="line"><a id="l00226" name="l00226"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#abda11f22948993b24fa68674aedc37f6"> 226</a></span> uint32_t <a class="code hl_variable" href="structspi__transmit__cb.html#abda11f22948993b24fa68674aedc37f6">tx_cur</a>;</div>
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<div class="line"><a id="l00227" name="l00227"></a><span class="lineno"> 227</span> <span class="comment">/* remain of this item */</span></div>
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<div class="line"><a id="l00228" name="l00228"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#a4db87a147629691fb2751bc7eb9620ea"> 228</a></span> uint32_t <a class="code hl_variable" href="structspi__transmit__cb.html#a4db87a147629691fb2751bc7eb9620ea">cur_remian</a>;</div>
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<div class="line"><a id="l00229" name="l00229"></a><span class="lineno"> 229</span> <span class="comment">/* once except of this item */</span></div>
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<div class="line"><a id="l00230" name="l00230"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#a3a57b605ce99ad96fc8ffb167ab8d387"> 230</a></span> uint32_t <a class="code hl_variable" href="structspi__transmit__cb.html#a3a57b605ce99ad96fc8ffb167ab8d387">expect_len</a>;</div>
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<div class="line"><a id="l00231" name="l00231"></a><span class="lineno"> 231</span> <span class="comment">/* vector transmit need */</span></div>
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<div class="line"><a id="l00232" name="l00232"></a><span class="lineno"><a class="line" href="structspi__transmit__cb.html#aa97b553932cb7b328fec41876f606e73"> 232</a></span> <span class="keyword">struct </span><a class="code hl_struct" href="structspi__transmit__cb.html">spi_transmit_cb</a> *<a class="code hl_variable" href="structspi__transmit__cb.html#aa97b553932cb7b328fec41876f606e73">next</a>;</div>
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<div class="line"><a id="l00233" name="l00233"></a><span class="lineno"> 233</span>};</div>
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<div class="line"><a id="l00234" name="l00234"></a><span class="lineno"> 234</span> </div>
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<div class="line"><a id="l00238" name="l00238"></a><span class="lineno"><a class="line" href="structsdrv__spi.html"> 238</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> {</div>
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<div class="line"><a id="l00239" name="l00239"></a><span class="lineno"> 239</span> <span class="comment">/* get frame static config */</span></div>
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<div class="line"><a id="l00240" name="l00240"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a0523cedff47e2441fc198b7770ec5d3f"> 240</a></span> uint32_t <a class="code hl_variable" href="structsdrv__spi.html#a0523cedff47e2441fc198b7770ec5d3f">base</a>;</div>
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<div class="line"><a id="l00241" name="l00241"></a><span class="lineno"> 241</span> <span class="comment">/* get frame static config */</span></div>
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<div class="line"><a id="l00242" name="l00242"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a17fdd15a71ced1e05faf127882011db3"> 242</a></span> uint32_t <a class="code hl_variable" href="structsdrv__spi.html#a17fdd15a71ced1e05faf127882011db3">irq</a>;</div>
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<div class="line"><a id="l00243" name="l00243"></a><span class="lineno"> 243</span> <span class="comment">/* Max baudrate when divide by 0 */</span></div>
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<div class="line"><a id="l00244" name="l00244"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a538737c70da7629c9e33fcd72010f67c"> 244</a></span> uint32_t <a class="code hl_variable" href="structsdrv__spi.html#a538737c70da7629c9e33fcd72010f67c">max_baudrate</a>;</div>
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<div class="line"><a id="l00245" name="l00245"></a><span class="lineno"> 245</span> <span class="comment">/* Max baudrate when divide by 256 */</span></div>
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<div class="line"><a id="l00246" name="l00246"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#aad40741e5211139797d770c0aaf8a669"> 246</a></span> uint32_t <a class="code hl_variable" href="structsdrv__spi.html#aad40741e5211139797d770c0aaf8a669">min_baudrate</a>;</div>
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<div class="line"><a id="l00247" name="l00247"></a><span class="lineno"> 247</span> <span class="comment">/* spi preinstance config */</span></div>
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<div class="line"><a id="l00248" name="l00248"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a602a880a7b51cbeefe350958b82f676c"> 248</a></span> <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structspi__common__config.html">spi_common_config</a> *<a class="code hl_variable" href="structsdrv__spi.html#a602a880a7b51cbeefe350958b82f676c">com_config</a>;</div>
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<div class="line"><a id="l00249" name="l00249"></a><span class="lineno"> 249</span> <span class="comment">/* default Config or slave mode cfg */</span></div>
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<div class="line"><a id="l00250" name="l00250"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a908d969013f38a70ca9fe4adc442e8ed"> 250</a></span> <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structspi__device__config.html">spi_device_config</a> *<a class="code hl_variable" href="structsdrv__spi.html#a908d969013f38a70ca9fe4adc442e8ed">dev_config</a>;</div>
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<div class="line"><a id="l00251" name="l00251"></a><span class="lineno"> 251</span> <span class="comment">/* */</span></div>
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<div class="line"><a id="l00252" name="l00252"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a04c04296732305246669644bf6adb151"> 252</a></span> <a class="code hl_typedef" href="sdrv__spi_8h.html#afe67f453cd960a973f1fd40630a9367f">spi_callback_t</a> <a class="code hl_variable" href="structsdrv__spi.html#a04c04296732305246669644bf6adb151">callback</a>;</div>
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<div class="line"><a id="l00253" name="l00253"></a><span class="lineno"> 253</span> <span class="comment">/* */</span></div>
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<div class="line"><a id="l00254" name="l00254"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a7e0c991c8d6ad1897098b2c0507eb5fe"> 254</a></span> <span class="keyword">struct </span><a class="code hl_struct" href="structspi__transmit__cb.html">spi_transmit_cb</a> <a class="code hl_variable" href="structsdrv__spi.html#a7e0c991c8d6ad1897098b2c0507eb5fe">transmit_sche</a>;</div>
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<div class="line"><a id="l00255" name="l00255"></a><span class="lineno"> 255</span> <span class="comment">/* status */</span></div>
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<div class="line"><a id="l00256" name="l00256"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a1b0c7bd4d79798ef4e0ce23894c9aeb2"> 256</a></span> uint32_t <a class="code hl_variable" href="structsdrv__spi.html#a1b0c7bd4d79798ef4e0ce23894c9aeb2">state</a>;</div>
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<div class="line"><a id="l00257" name="l00257"></a><span class="lineno"> 257</span> <span class="comment">/* cur cmd */</span></div>
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<div class="line"><a id="l00258" name="l00258"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a036e9fe736ae99af089b2264f6dc61aa"> 258</a></span> uint32_t <a class="code hl_variable" href="structsdrv__spi.html#a036e9fe736ae99af089b2264f6dc61aa">cur_cmd</a>;</div>
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<div class="line"><a id="l00259" name="l00259"></a><span class="lineno"> 259</span><span class="preprocessor">#if CONFIG_SPI_ENABLE_DMA</span></div>
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<div class="line"><a id="l00260" name="l00260"></a><span class="lineno"> 260</span> <span class="comment">/* dma rx channel */</span></div>
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<div class="line"><a id="l00261" name="l00261"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a7d73684dd52931cd4c0dc0049a3f294a"> 261</a></span> <a class="code hl_struct" href="structsdrv__dma__channel__t.html">sdrv_dma_channel_t</a> <a class="code hl_variable" href="structsdrv__spi.html#a7d73684dd52931cd4c0dc0049a3f294a">rx_dma_chan</a>;</div>
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<div class="line"><a id="l00262" name="l00262"></a><span class="lineno"> 262</span> <span class="comment">/* dma rx channel */</span></div>
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<div class="line"><a id="l00263" name="l00263"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a654a1398e0747a65d41b65354c5353ad"> 263</a></span> <span class="keyword">struct </span><a class="code hl_struct" href="structspi__dma__context.html">spi_dma_context</a> <a class="code hl_variable" href="structsdrv__spi.html#a654a1398e0747a65d41b65354c5353ad">rx_context</a>;</div>
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<div class="line"><a id="l00264" name="l00264"></a><span class="lineno"> 264</span> <span class="comment">/* dma rx channel */</span></div>
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<div class="line"><a id="l00265" name="l00265"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a1f802a8e5a2f41d839ef3a0561c26b3c"> 265</a></span> <a class="code hl_struct" href="structsdrv__dma__channel__t.html">sdrv_dma_channel_t</a> <a class="code hl_variable" href="structsdrv__spi.html#a1f802a8e5a2f41d839ef3a0561c26b3c">tx_dma_chan</a>;</div>
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<div class="line"><a id="l00266" name="l00266"></a><span class="lineno"> 266</span> <span class="comment">/* dma rx channel */</span></div>
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<div class="line"><a id="l00267" name="l00267"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#a6447a78c537c288805bc527d463a7b3b"> 267</a></span> <span class="keyword">struct </span><a class="code hl_struct" href="structspi__dma__context.html">spi_dma_context</a> <a class="code hl_variable" href="structsdrv__spi.html#a6447a78c537c288805bc527d463a7b3b">tx_context</a>;</div>
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<div class="line"><a id="l00268" name="l00268"></a><span class="lineno"> 268</span> <span class="comment">/* dma error */</span></div>
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<div class="line"><a id="l00269" name="l00269"></a><span class="lineno"><a class="line" href="structsdrv__spi.html#ac122534f66a119bdd914666d5c32269a"> 269</a></span> uint32_t <a class="code hl_variable" href="structsdrv__spi.html#ac122534f66a119bdd914666d5c32269a">dma_err</a>;</div>
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<div class="line"><a id="l00270" name="l00270"></a><span class="lineno"> 270</span><span class="preprocessor">#endif</span></div>
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<div class="line"><a id="l00271" name="l00271"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a2105e872f7305ed97dcb5791a32052cc"> 271</a></span>} <a class="code hl_typedef" href="sdrv__spi_8h.html#a2105e872f7305ed97dcb5791a32052cc">sdrv_spi_t</a>;</div>
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<div class="line"><a id="l00272" name="l00272"></a><span class="lineno"> 272</span> </div>
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<div class="line"><a id="l00273" name="l00273"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a2207d4d5f78e290c424cfa7076bc27ca"> 273</a></span><span class="preprocessor">#define SPI_POL_VEL_ILLEGAL (~0xFu)</span></div>
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<div class="line"><a id="l00274" name="l00274"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a62f0d4c189afde302238c98a8f8c334e"> 274</a></span><span class="preprocessor">#define SPI_START_DELAY_MAX 0xFFu</span></div>
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<div class="line"><a id="l00275" name="l00275"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a6c750988a9f08a725b6d0037a7272075"> 275</a></span><span class="preprocessor">#define SPI_END_DELAY_MAX 0xFFu</span></div>
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<div class="line"><a id="l00276" name="l00276"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a091e520f3a30102cc0656d19851729f4"> 276</a></span><span class="preprocessor">#define SPI_FRAME_DELAY_MAX 0xFFu</span></div>
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<div class="line"><a id="l00277" name="l00277"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#abb0e2c03490825f72dd9623465f46771"> 277</a></span><span class="preprocessor">#define SPI_CLK_PRESSCALE_MAX 0xFFu</span></div>
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<div class="line"><a id="l00278" name="l00278"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#adca0d84b2ff4f78bb1e13fe9439c70b1"> 278</a></span><span class="preprocessor">#define SPI_FIFO_LEN 16u</span></div>
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<div class="line"><a id="l00279" name="l00279"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#ad0145ea5277545fbf67f2a845417190d"> 279</a></span><span class="preprocessor">#define SPI_FRAME_SIZE_MAX 1024U</span></div>
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<div class="line"><a id="l00280" name="l00280"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a50d87fa69230646a7373977a9bc5a9ec"> 280</a></span><span class="preprocessor">#define SPI_SLAVE_IRQ_NICE_ADJUST (-1) </span><span class="comment">/* slave irq nice val */</span><span class="preprocessor"></span></div>
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<div class="line"><a id="l00281" name="l00281"></a><span class="lineno"> 281</span> </div>
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<div class="line"><a id="l00285" name="l00285"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a9eea492119f5ecdd2cd31fc9299b0342"> 285</a></span><span class="preprocessor">#define SPI_DATA_WIDTH_MIN 4U</span></div>
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<div class="line"><a id="l00286" name="l00286"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a5bccdf471d844d0fa838d62b6d32b0d5"> 286</a></span><span class="preprocessor">#define SPI_DATA_WIDTH_BYTE 8U</span></div>
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<div class="line"><a id="l00287" name="l00287"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#ae333aef72b757c59e44911f4b9fa8ac7"> 287</a></span><span class="preprocessor">#define SPI_DATA_WIDTH_HALF_WORD 16U</span></div>
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<div class="line"><a id="l00288" name="l00288"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a843b650eed266c4654448858233449b3"> 288</a></span><span class="preprocessor">#define SPI_DATA_WIDTH_WORD 32U</span></div>
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<div class="line"><a id="l00289" name="l00289"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#ad9474f23ef13fafe9358d565e1d7fd09"> 289</a></span><span class="preprocessor">#define SPI_DATA_WIDTH_MAX SPI_DATA_WIDTH_WORD</span></div>
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<div class="line"><a id="l00290" name="l00290"></a><span class="lineno"> 290</span> </div>
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<div class="line"><a id="l00291" name="l00291"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#ab774a36bf63ced3298c0729a47a17c71"> 291</a></span><span class="preprocessor">#define SPI_INTERNAL_DIV_SHIFT (1u)</span></div>
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<div class="line"><a id="l00292" name="l00292"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a8bf7dfcf71b712a3e785de65bdbda5ba"> 292</a></span><span class="preprocessor">#define SPI_CLK_PRESSCALE_MAX_SHIFT (8u)</span></div>
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<div class="line"><a id="l00293" name="l00293"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#acdcbb0b84130ad701c7e009485f8aec1"> 293</a></span><span class="preprocessor">#define SPI_TIMMING_CFG(f, s, e) \</span></div>
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<div class="line"><a id="l00294" name="l00294"></a><span class="lineno"> 294</span><span class="preprocessor"> (FV_SPI_TIM_CTRL_START_DLY(s) | FV_SPI_TIM_CTRL_END_DLY(e) | \</span></div>
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<div class="line"><a id="l00295" name="l00295"></a><span class="lineno"> 295</span><span class="preprocessor"> FV_SPI_TIM_CTRL_FRM_DLY(f))</span></div>
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<div class="line"><a id="l00296" name="l00296"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#adefa172e704d98dff7803b2eefaad9b3"> 296</a></span><span class="preprocessor">#define BUS_BUSY_MASK (SPI_STATE_BUSY_TX | SPI_STATE_BUSY_RX)</span></div>
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<div class="line"><a id="l00297" name="l00297"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#adb57838c33c2acf6bc530c6899268f3f"> 297</a></span><span class="preprocessor">#define BUS_BUSY_DMA_MASK (SPI_STATE_DMA_TX | SPI_STATE_DMA_RX)</span></div>
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<div class="line"><a id="l00298" name="l00298"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a07294df104272c3d8ae9657eb44188ed"> 298</a></span><span class="preprocessor">#define BUS_BUSY_IRQ_MASK (SPI_STATE_IRQ_TX | SPI_STATE_IRQ_RX)</span></div>
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<div class="line"><a id="l00299" name="l00299"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a1b84532d6e4effffca834da46cd776ce"> 299</a></span><span class="preprocessor">#define BUS_FIFO_STATE_MASK (SPI_RX_FIFO_READ | SPI_TX_FIFO_WRITE)</span></div>
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<div class="line"><a id="l00300" name="l00300"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a156275a204e0532865172fa23f0c5f38"> 300</a></span><span class="preprocessor">#define BUS_BUSY_ASYNC_MASK (BUS_BUSY_DMA_MASK | BUS_BUSY_IRQ_MASK)</span></div>
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<div class="line"><a id="l00301" name="l00301"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a72fc44bb3d8fcc7ae6f497532a381a28"> 301</a></span><span class="preprocessor">#define BUS_BUSY_STATUS_MASK (BUS_BUSY_MASK | BUS_BUSY_ASYNC_MASK)</span></div>
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<div class="line"><a id="l00302" name="l00302"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a2c6964297753588fc32324ec17d19600"> 302</a></span><span class="preprocessor">#define BUS_FIFO_STATE_ERR_MASK \</span></div>
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<div class="line"><a id="l00303" name="l00303"></a><span class="lineno"> 303</span><span class="preprocessor"> (SPI_TX_FIFO_UDR | SPI_RX_FIFO_OVR | SPI_TX_DMA_ERR | SPI_RX_DMA_ERR)</span></div>
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<div class="line"><a id="l00304" name="l00304"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#afd1cccf679b3e9d32c05bbe4c1c89d6b"> 304</a></span><span class="preprocessor">#define BUS_FIFO_EMPTYE_TIMEOUT(f_delay, s_delay, e_delay, baudrate) \</span></div>
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<div class="line"><a id="l00305" name="l00305"></a><span class="lineno"> 305</span><span class="preprocessor"> (((f_delay) + (s_delay) + (e_delay) + SPI_DATA_WIDTH_MAX) * 1000000 / \</span></div>
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<div class="line"><a id="l00306" name="l00306"></a><span class="lineno"> 306</span><span class="preprocessor"> (baudrate))</span></div>
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<div class="line"><a id="l00307" name="l00307"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#abc7dc96b22f1ccc677239bf71a38c659"> 307</a></span><span class="preprocessor">#define BUS_STATE_TX_MASK \</span></div>
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<div class="line"><a id="l00308" name="l00308"></a><span class="lineno"> 308</span><span class="preprocessor"> (SPI_STATE_DMA_TX | SPI_STATE_BUSY_TX | SPI_STATE_IRQ_TX)</span></div>
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<div class="line"><a id="l00309" name="l00309"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4e60b9a482ed5470d526604aef69e81d"> 309</a></span><span class="preprocessor">#define BUS_STATE_RX_MASK \</span></div>
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<div class="line"><a id="l00310" name="l00310"></a><span class="lineno"> 310</span><span class="preprocessor"> (SPI_STATE_DMA_RX | SPI_STATE_BUSY_RX | SPI_STATE_IRQ_RX)</span></div>
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<div class="line"><a id="l00311" name="l00311"></a><span class="lineno"> 311</span> </div>
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<div class="line"><a id="l00312" name="l00312"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a07df3436919eaea1ff7263ff7407cd18"> 312</a></span><span class="preprocessor">#define SPI_SATE_EXT_FLAGS \</span></div>
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<div class="line"><a id="l00313" name="l00313"></a><span class="lineno"> 313</span><span class="preprocessor"> (SPI_STATE_IS_UNS_EN | SPI_STATE_IS_RO_END | SPI_STATE_CS_ACTIVEED)</span></div>
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<div class="line"><a id="l00314" name="l00314"></a><span class="lineno"> 314</span> </div>
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<div class="line"><a id="l00315" name="l00315"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#aa43ed3ebaa7c9eb1d52534c22a0bc9f7"> 315</a></span><span class="preprocessor">#define SPI_GET_WIDTH_SHIFT(width_type) \</span></div>
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<div class="line"><a id="l00316" name="l00316"></a><span class="lineno"> 316</span><span class="preprocessor"> (((width_type) == SPI_DATA_WIDTH_WORD \</span></div>
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<div class="line"><a id="l00317" name="l00317"></a><span class="lineno"> 317</span><span class="preprocessor"> ? 2 \</span></div>
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<div class="line"><a id="l00318" name="l00318"></a><span class="lineno"> 318</span><span class="preprocessor"> : ((width_type) / SPI_DATA_WIDTH_BYTE) - 1))</span></div>
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<div class="line"><a id="l00319" name="l00319"></a><span class="lineno"> 319</span> </div>
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<div class="line"><a id="l00320" name="l00320"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#af65410eacccada2e28bb6ce602b5b8df"> 320</a></span><span class="preprocessor">#define SPI_GET_WIDTH_TYPE(width) \</span></div>
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<div class="line"><a id="l00321" name="l00321"></a><span class="lineno"> 321</span><span class="preprocessor"> (((width) > 16U) \</span></div>
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<div class="line"><a id="l00322" name="l00322"></a><span class="lineno"> 322</span><span class="preprocessor"> ? (SPI_DATA_WIDTH_WORD) \</span></div>
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<div class="line"><a id="l00323" name="l00323"></a><span class="lineno"> 323</span><span class="preprocessor"> : ((width) > 8U ? SPI_DATA_WIDTH_HALF_WORD : SPI_DATA_WIDTH_BYTE))</span></div>
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<div class="line"><a id="l00324" name="l00324"></a><span class="lineno"> 324</span> </div>
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<div class="line"><a id="l00325" name="l00325"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#af0587c429434e1005892b01645e48fa8"> 325</a></span><span class="preprocessor">#define SPI_IS_VALID_LEN(bytes, width) \</span></div>
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<div class="line"><a id="l00326" name="l00326"></a><span class="lineno"> 326</span><span class="preprocessor"> (!((bytes) & ((0x1 << SPI_GET_WIDTH_SHIFT(SPI_GET_WIDTH_TYPE(width))) - 1)))</span></div>
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<div class="line"><a id="l00327" name="l00327"></a><span class="lineno"> 327</span> </div>
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<div class="line"><a id="l00328" name="l00328"></a><span class="lineno"> 328</span><span class="comment">/* (16 * 32 + 9 * delay * 1000000)/baudrate == us */</span></div>
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<div class="line"><a id="l00329" name="l00329"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a90c27baa681bc18d46344992d71ab57e"> 329</a></span><span class="preprocessor">#define SPI_READ_FIFO_TIMEOUT_MAX(f_delay, s_delay, e_delay, baudrate) \</span></div>
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<div class="line"><a id="l00330" name="l00330"></a><span class="lineno"> 330</span><span class="preprocessor"> ((((f_delay) + (s_delay) + (e_delay)) * 9 + \</span></div>
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<div class="line"><a id="l00331" name="l00331"></a><span class="lineno"> 331</span><span class="preprocessor"> SPI_DATA_WIDTH_MAX * SPI_FIFO_LEN) * \</span></div>
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<div class="line"><a id="l00332" name="l00332"></a><span class="lineno"> 332</span><span class="preprocessor"> 1000000 / (baudrate))</span></div>
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<div class="line"><a id="l00336" name="l00336"></a><span class="lineno"> 336</span><span class="keyword">enum</span> {</div>
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<div class="line"><a id="l00337" name="l00337"></a><span class="lineno"> 337</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa1a6e55376adccdb541a14a34879efc7">SDRV_SPI_STATUS_MODE_ERROR</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00338" name="l00338"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa1a6e55376adccdb541a14a34879efc7"> 338</a></span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>, 1), <span class="comment">/* Spi configuration mode usage mismatch. */</span></div>
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<div class="line"><a id="l00339" name="l00339"></a><span class="lineno"> 339</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa59f6a5c6be6684a888f7ca860f00165">SDRV_SPI_STATUS_GCMD_NO_SUPPORT</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00340" name="l00340"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa59f6a5c6be6684a888f7ca860f00165"> 340</a></span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>, 2), <span class="comment">/* Spi IP version is not supported. */</span></div>
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<div class="line"><a id="l00341" name="l00341"></a><span class="lineno"> 341</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa77df799302d1fdeb0693ef917249635">SDRV_SPI_STATUS_GCMD_TIMEOUT_WRITE</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00342" name="l00342"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa77df799302d1fdeb0693ef917249635"> 342</a></span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>, 3), <span class="comment">/* Spi first Write CMD wait timeout. */</span></div>
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<div class="line"><a id="l00343" name="l00343"></a><span class="lineno"> 343</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4af8424634fe742b405a4323306a067b06">SDRV_SPI_STATUS_GCMD_TIMEOUT_FINISH</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00344" name="l00344"></a><span class="lineno"> 344</span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>,</div>
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<div class="line"><a id="l00345" name="l00345"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4af8424634fe742b405a4323306a067b06"> 345</a></span> 4), <span class="comment">/* Spi first write CMD last transfer ended wait timeout. */</span></div>
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<div class="line"><a id="l00346" name="l00346"></a><span class="lineno"> 346</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a8d5cc2f802332a058f478b7143f771aa">SDRV_SPI_STATUS_SOFT_CS_TIMEOUT</a> =</div>
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<div class="line"><a id="l00347" name="l00347"></a><span class="lineno"> 347</span> <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(<a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>,</div>
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<div class="line"><a id="l00348" name="l00348"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a8d5cc2f802332a058f478b7143f771aa"> 348</a></span> 5), <span class="comment">/* Spi CLK idle level switching wait timeout. */</span></div>
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<div class="line"><a id="l00349" name="l00349"></a><span class="lineno"> 349</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a67a7c92e4eb92388143aef1b24e4546b">SDRV_SPI_STATUS_UCMD_TIMEOUT_WRITE</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00350" name="l00350"></a><span class="lineno"> 350</span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>,</div>
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<div class="line"><a id="l00351" name="l00351"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a67a7c92e4eb92388143aef1b24e4546b"> 351</a></span> 6), <span class="comment">/* Spi Write CMD wait timeout(Not the first time). */</span></div>
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<div class="line"><a id="l00352" name="l00352"></a><span class="lineno"> 352</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a9b67accd93ca91efffcb81f388781dd9">SDRV_SPI_STATUS_UCMD_TIMEOUT_FINISH</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00353" name="l00353"></a><span class="lineno"> 353</span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>,</div>
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<div class="line"><a id="l00354" name="l00354"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a9b67accd93ca91efffcb81f388781dd9"> 354</a></span> 7), <span class="comment">/* Spi last transfer ended wait timeout.(Not the first time) */</span></div>
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<div class="line"><a id="l00355" name="l00355"></a><span class="lineno"> 355</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a37048d20e259383297bb4ece42199eab">SDRV_SPI_STATUS_SYNC_TIMEOUT</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00356" name="l00356"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a37048d20e259383297bb4ece42199eab"> 356</a></span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>, 8), <span class="comment">/* Spi Synchronous transfer timeout. */</span></div>
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<div class="line"><a id="l00357" name="l00357"></a><span class="lineno"> 357</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a90797ba3abbf5391e4bde9b39fd9f981">SDRV_SPI_STATUS_SOFT_CS_WAIT_TIMEOUT</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00358" name="l00358"></a><span class="lineno"> 358</span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>,</div>
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<div class="line"><a id="l00359" name="l00359"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a90797ba3abbf5391e4bde9b39fd9f981"> 359</a></span> 9), <span class="comment">/* Spi Synchronous transfer(Tx only) wait clk ended timeout. */</span></div>
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<div class="line"><a id="l00360" name="l00360"></a><span class="lineno"> 360</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a739a73ea6ebdfb9f82ff5bf547a4e85e">SDRV_SPI_STATUS_FAIL_DMA_SETUP</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00361" name="l00361"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a739a73ea6ebdfb9f82ff5bf547a4e85e"> 361</a></span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>, 10), <span class="comment">/* Spi dma configuration failed. */</span></div>
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<div class="line"><a id="l00362" name="l00362"></a><span class="lineno"> 362</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4ad1112caa8dc4c762639f8c931c5b2143">SDRV_SPI_STATUS_FAIL_IRQ_SETUP</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00363" name="l00363"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4ad1112caa8dc4c762639f8c931c5b2143"> 363</a></span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>, 11), <span class="comment">/* Spi irq configuration failed. */</span></div>
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<div class="line"><a id="l00364" name="l00364"></a><span class="lineno"> 364</span> <a class="code hl_enumvalue" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa7ef6aeac205ea1b0186918b24f26911">SDRV_SPI_STATUS_PARAM_ILLEGAL</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(</div>
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<div class="line"><a id="l00365" name="l00365"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa7ef6aeac205ea1b0186918b24f26911"> 365</a></span> <a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a>, 12), <span class="comment">/* Spi user params error.*/</span></div>
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<div class="line"><a id="l00366" name="l00366"></a><span class="lineno"> 366</span>};</div>
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<div class="line"><a id="l00376" name="l00376"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#afa70f0e34044c249166c92f65c971fce"> 376</a></span><span class="keywordtype">int</span> <a class="code hl_function" href="sdrv__spi_8h.html#afa70f0e34044c249166c92f65c971fce">sdrv_spi_init</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *spi, <span class="keyword">struct</span> <a class="code hl_struct" href="structspi__common__config.html">spi_common_config</a> *cfg);</div>
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<div class="line"><a id="l00377" name="l00377"></a><span class="lineno"> 377</span> </div>
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<div class="line"><a id="l00385" name="l00385"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#abc65dae99842f3d08074995c06ca98de"> 385</a></span><span class="keywordtype">int</span> <a class="code hl_function" href="sdrv__spi_8h.html#abc65dae99842f3d08074995c06ca98de">sdrv_spi_deinit</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *<a class="code hl_variable" href="structspi__dma__context.html#a2a6994ba0e51d3c3ae9a2801719411e7">bus</a>);</div>
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<div class="line"><a id="l00386" name="l00386"></a><span class="lineno"> 386</span> </div>
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<div class="line"><a id="l00400" name="l00400"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a802d973e6c496a7f86cbcebeeaa89e59"> 400</a></span><span class="keywordtype">int</span> <a class="code hl_function" href="sdrv__spi_8h.html#a802d973e6c496a7f86cbcebeeaa89e59">sdrv_spi_config_device</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *spi,</div>
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<div class="line"><a id="l00401" name="l00401"></a><span class="lineno"> 401</span> <span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structspi__device__config.html">spi_device_config</a> *cfg);</div>
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<div class="line"><a id="l00402" name="l00402"></a><span class="lineno"> 402</span> </div>
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<div class="line"><a id="l00417" name="l00417"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#adda87204e6df34bf9dcd7f50952c6454"> 417</a></span><span class="keywordtype">int</span> <a class="code hl_function" href="sdrv__spi_8h.html#adda87204e6df34bf9dcd7f50952c6454">sdrv_spi_sync_transmit</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *spi, <span class="keywordtype">void</span> *tx_buf, <span class="keywordtype">void</span> *rx_buf,</div>
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<div class="line"><a id="l00418" name="l00418"></a><span class="lineno"> 418</span> uint32_t bytes, uint32_t timeout);</div>
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<div class="line"><a id="l00419" name="l00419"></a><span class="lineno"> 419</span> </div>
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<div class="line"><a id="l00426" name="l00426"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a5aecb616522472bf8460d4d3a0ebccb2"> 426</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__spi_8h.html#a5aecb616522472bf8460d4d3a0ebccb2">sdrv_spi_attach_async_callback</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *spi, <a class="code hl_typedef" href="sdrv__spi_8h.html#afe67f453cd960a973f1fd40630a9367f">spi_callback_t</a> cb);</div>
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<div class="line"><a id="l00427" name="l00427"></a><span class="lineno"> 427</span> </div>
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<div class="line"><a id="l00442" name="l00442"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#afdf21b72da31582b5bcadfa581e58403"> 442</a></span><span class="keywordtype">int</span> <a class="code hl_function" href="sdrv__spi_8h.html#afdf21b72da31582b5bcadfa581e58403">sdrv_spi_async_transmit</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *spi, <span class="keywordtype">void</span> *tx_buf, <span class="keywordtype">void</span> *rx_buf,</div>
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<div class="line"><a id="l00443" name="l00443"></a><span class="lineno"> 443</span> uint32_t bytes, <span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871">spi_ops_type</a> type);</div>
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<div class="line"><a id="l00444" name="l00444"></a><span class="lineno"> 444</span> </div>
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<div class="line"><a id="l00451" name="l00451"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#ac902a346291157329878ead1a7a2cd81"> 451</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4a">spi_bus_state</a> <a class="code hl_function" href="sdrv__spi_8h.html#ac902a346291157329878ead1a7a2cd81">sdrv_spi_get_status</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *spi);</div>
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<div class="line"><a id="l00452" name="l00452"></a><span class="lineno"> 452</span> </div>
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<div class="line"><a id="l00459" name="l00459"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a4b800d23a5875a60060e447bb729472a"> 459</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__spi_8h.html#a4b800d23a5875a60060e447bb729472a">sdrv_spi_polling</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *<a class="code hl_variable" href="structspi__dma__context.html#a2a6994ba0e51d3c3ae9a2801719411e7">bus</a>);</div>
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<div class="line"><a id="l00460" name="l00460"></a><span class="lineno"> 460</span> </div>
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<div class="line"><a id="l00467" name="l00467"></a><span class="lineno"><a class="line" href="sdrv__spi_8h.html#a3b97c5b629eead84d1e3ba7a1647290d"> 467</a></span>uint32_t <a class="code hl_function" href="sdrv__spi_8h.html#a3b97c5b629eead84d1e3ba7a1647290d">sdrv_spi_slave_get_transmit_len</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsdrv__spi.html">sdrv_spi</a> *<a class="code hl_variable" href="structspi__dma__context.html#a2a6994ba0e51d3c3ae9a2801719411e7">bus</a>);</div>
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<div class="line"><a id="l00468" name="l00468"></a><span class="lineno"> 468</span> </div>
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<div class="line"><a id="l00469" name="l00469"></a><span class="lineno"> 469</span><span class="preprocessor">#ifdef __cplusplus</span></div>
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<div class="line"><a id="l00470" name="l00470"></a><span class="lineno"> 470</span>}</div>
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<div class="line"><a id="l00471" name="l00471"></a><span class="lineno"> 471</span><span class="preprocessor">#endif</span></div>
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<div class="line"><a id="l00472" name="l00472"></a><span class="lineno"> 472</span> </div>
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<div class="line"><a id="l00473" name="l00473"></a><span class="lineno"> 473</span><span class="preprocessor">#endif</span></div>
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<div class="ttc" id="asdrv__ckgen_8h_html"><div class="ttname"><a href="sdrv__ckgen_8h.html">sdrv_ckgen.h</a></div><div class="ttdoc">SemiDrive clock generator driver header file.</div></div>
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<div class="ttc" id="asdrv__common_8h_html_a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c"><div class="ttname"><a href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6a5958b511fedf5b9db3251ffe7680975c">SDRV_STATUS_GROUP_SPI</a></div><div class="ttdeci">@ SDRV_STATUS_GROUP_SPI</div><div class="ttdef"><b>Definition:</b> sdrv_common.h:37</div></div>
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<div class="ttc" id="asdrv__common_8h_html_aef8aef2653fac9cb1b5fbe2a5976314c"><div class="ttname"><a href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a></div><div class="ttdeci">#define SDRV_ERROR_STATUS(group, code)</div><div class="ttdoc">Construct a status code value from a group and code number. All the error statuses are negetive numbe...</div><div class="ttdef"><b>Definition:</b> sdrv_common.h:17</div></div>
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<div class="ttc" id="asdrv__dma_8h_html"><div class="ttname"><a href="sdrv__dma_8h.html">sdrv_dma.h</a></div><div class="ttdoc">SemiDrive DMA driver header file.</div></div>
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<div class="ttc" id="asdrv__dma_8h_html_a2fce8b449dfda53bb26afae8dea00c9f"><div class="ttname"><a href="sdrv__dma_8h.html#a2fce8b449dfda53bb26afae8dea00c9f">sdrv_dma_channel_id_e</a></div><div class="ttdeci">sdrv_dma_channel_id_e</div><div class="ttdoc">DMA Channel ID.</div><div class="ttdef"><b>Definition:</b> sdrv_dma.h:47</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a026256af80b7598708770027a7b574f9"><div class="ttname"><a href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9">spi_cs_polarity</a></div><div class="ttdeci">spi_cs_polarity</div><div class="ttdoc">Spi cs mode.</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:49</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a026256af80b7598708770027a7b574f9a77105b2f98fec68a5a75c86a058534b5"><div class="ttname"><a href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9a77105b2f98fec68a5a75c86a058534b5">CS_ACTIVE_HIGH</a></div><div class="ttdeci">@ CS_ACTIVE_HIGH</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:49</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a026256af80b7598708770027a7b574f9af9fd1d20aaa46974b85c22f8b224906a"><div class="ttname"><a href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9af9fd1d20aaa46974b85c22f8b224906a">CS_ACTIVE_LOW</a></div><div class="ttdeci">@ CS_ACTIVE_LOW</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:49</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a2105e872f7305ed97dcb5791a32052cc"><div class="ttname"><a href="sdrv__spi_8h.html#a2105e872f7305ed97dcb5791a32052cc">sdrv_spi_t</a></div><div class="ttdeci">struct sdrv_spi sdrv_spi_t</div><div class="ttdoc">Spi bus module handler type .</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a3b84711f4729b8ef456ee80707f6b579"><div class="ttname"><a href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579">irq_type</a></div><div class="ttdeci">irq_type</div><div class="ttdoc">Spi irq type .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:93</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a3b84711f4729b8ef456ee80707f6b579a1d85271a6ae60d4f4791143f8d33c015"><div class="ttname"><a href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a1d85271a6ae60d4f4791143f8d33c015">SPI_RX_READ_REQ</a></div><div class="ttdeci">@ SPI_RX_READ_REQ</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:95</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a3b84711f4729b8ef456ee80707f6b579a71da78e64c103e0aca751f529d032ff0"><div class="ttname"><a href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a71da78e64c103e0aca751f529d032ff0">SPI_TRASPORT_FINISH</a></div><div class="ttdeci">@ SPI_TRASPORT_FINISH</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:94</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a3b84711f4729b8ef456ee80707f6b579a991dd1bc79f63e864f61d13e6401064d"><div class="ttname"><a href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579a991dd1bc79f63e864f61d13e6401064d">SPI_CS_INVLD_REQ</a></div><div class="ttdeci">@ SPI_CS_INVLD_REQ</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:97</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a3b84711f4729b8ef456ee80707f6b579acc5fb717fcf172ebaef7b1df9c4ed7cc"><div class="ttname"><a href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579acc5fb717fcf172ebaef7b1df9c4ed7cc">SPI_TX_WRITE_REQ</a></div><div class="ttdeci">@ SPI_TX_WRITE_REQ</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:96</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a3b97c5b629eead84d1e3ba7a1647290d"><div class="ttname"><a href="sdrv__spi_8h.html#a3b97c5b629eead84d1e3ba7a1647290d">sdrv_spi_slave_get_transmit_len</a></div><div class="ttdeci">uint32_t sdrv_spi_slave_get_transmit_len(struct sdrv_spi *bus)</div><div class="ttdoc">Get slave transmit cnt.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4a6a5bf67f1ffa420defb950d8000187"><div class="ttname"><a href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187">spi_event_type</a></div><div class="ttdeci">spi_event_type</div><div class="ttdoc">Spi async transmit callback type .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:117</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4a6a5bf67f1ffa420defb950d8000187a436ec2bf6cc84a3264aa50aee42303bf"><div class="ttname"><a href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187a436ec2bf6cc84a3264aa50aee42303bf">SPI_TRANS_DONE</a></div><div class="ttdeci">@ SPI_TRANS_DONE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:118</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4a6a5bf67f1ffa420defb950d8000187a8845a938c5b584e72f0e79c60204cf39"><div class="ttname"><a href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187a8845a938c5b584e72f0e79c60204cf39">SPI_TRANS_FAIL</a></div><div class="ttdeci">@ SPI_TRANS_FAIL</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:119</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4a6a5bf67f1ffa420defb950d8000187adc1a6d72de187f49cb0d876455719b81"><div class="ttname"><a href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187adc1a6d72de187f49cb0d876455719b81">SPI_TRANS_PASS</a></div><div class="ttdeci">@ SPI_TRANS_PASS</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:120</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4b800d23a5875a60060e447bb729472a"><div class="ttname"><a href="sdrv__spi_8h.html#a4b800d23a5875a60060e447bb729472a">sdrv_spi_polling</a></div><div class="ttdeci">void sdrv_spi_polling(struct sdrv_spi *bus)</div><div class="ttdoc">Get SPI bus polling.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4a37048d20e259383297bb4ece42199eab"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a37048d20e259383297bb4ece42199eab">SDRV_SPI_STATUS_SYNC_TIMEOUT</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_SYNC_TIMEOUT</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:355</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4a67a7c92e4eb92388143aef1b24e4546b"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a67a7c92e4eb92388143aef1b24e4546b">SDRV_SPI_STATUS_UCMD_TIMEOUT_WRITE</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_UCMD_TIMEOUT_WRITE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:349</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4a739a73ea6ebdfb9f82ff5bf547a4e85e"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a739a73ea6ebdfb9f82ff5bf547a4e85e">SDRV_SPI_STATUS_FAIL_DMA_SETUP</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_FAIL_DMA_SETUP</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:360</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4a8d5cc2f802332a058f478b7143f771aa"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a8d5cc2f802332a058f478b7143f771aa">SDRV_SPI_STATUS_SOFT_CS_TIMEOUT</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_SOFT_CS_TIMEOUT</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:346</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4a90797ba3abbf5391e4bde9b39fd9f981"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a90797ba3abbf5391e4bde9b39fd9f981">SDRV_SPI_STATUS_SOFT_CS_WAIT_TIMEOUT</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_SOFT_CS_WAIT_TIMEOUT</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:357</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4a9b67accd93ca91efffcb81f388781dd9"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4a9b67accd93ca91efffcb81f388781dd9">SDRV_SPI_STATUS_UCMD_TIMEOUT_FINISH</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_UCMD_TIMEOUT_FINISH</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:352</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4aa1a6e55376adccdb541a14a34879efc7"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa1a6e55376adccdb541a14a34879efc7">SDRV_SPI_STATUS_MODE_ERROR</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_MODE_ERROR</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:337</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4aa59f6a5c6be6684a888f7ca860f00165"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa59f6a5c6be6684a888f7ca860f00165">SDRV_SPI_STATUS_GCMD_NO_SUPPORT</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_GCMD_NO_SUPPORT</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:339</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4aa77df799302d1fdeb0693ef917249635"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa77df799302d1fdeb0693ef917249635">SDRV_SPI_STATUS_GCMD_TIMEOUT_WRITE</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_GCMD_TIMEOUT_WRITE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:341</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4aa7ef6aeac205ea1b0186918b24f26911"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4aa7ef6aeac205ea1b0186918b24f26911">SDRV_SPI_STATUS_PARAM_ILLEGAL</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_PARAM_ILLEGAL</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:364</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4ad1112caa8dc4c762639f8c931c5b2143"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4ad1112caa8dc4c762639f8c931c5b2143">SDRV_SPI_STATUS_FAIL_IRQ_SETUP</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_FAIL_IRQ_SETUP</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:362</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4caf8d8f829279fba122163d961608a4af8424634fe742b405a4323306a067b06"><div class="ttname"><a href="sdrv__spi_8h.html#a4caf8d8f829279fba122163d961608a4af8424634fe742b405a4323306a067b06">SDRV_SPI_STATUS_GCMD_TIMEOUT_FINISH</a></div><div class="ttdeci">@ SDRV_SPI_STATUS_GCMD_TIMEOUT_FINISH</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:343</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2">spi_state</a></div><div class="ttdeci">spi_state</div><div class="ttdoc">Spi Bus state flags.</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:59</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a21aa93a1cb39865cc54f483b69a21e32"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a21aa93a1cb39865cc54f483b69a21e32">SPI_STATE_INITED</a></div><div class="ttdeci">@ SPI_STATE_INITED</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:61</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a52a6ca5c5b2eebd9437577dab940fa10"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a52a6ca5c5b2eebd9437577dab940fa10">SPI_STATE_IS_RO_END</a></div><div class="ttdeci">@ SPI_STATE_IS_RO_END</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:72</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a533e5d9f204ee8cd75dd5a538d6ff529"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a533e5d9f204ee8cd75dd5a538d6ff529">SPI_STATE_IRQ_ACT</a></div><div class="ttdeci">@ SPI_STATE_IRQ_ACT</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:64</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4">SPI_STATE_DMA_RX</a></div><div class="ttdeci">@ SPI_STATE_DMA_RX</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:66</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9">SPI_STATE_BUSY_RX</a></div><div class="ttdeci">@ SPI_STATE_BUSY_RX</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:63</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a6fdd3c8af7c56233ee52eb6504128284"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a6fdd3c8af7c56233ee52eb6504128284">SPI_STATE_IS_UNS_EN</a></div><div class="ttdeci">@ SPI_STATE_IS_UNS_EN</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:71</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a76c1b18d72df762e65e3e2bb94903812"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a76c1b18d72df762e65e3e2bb94903812">SPI_STATE_DMA_TX_RD</a></div><div class="ttdeci">@ SPI_STATE_DMA_TX_RD</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:73</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a81d595a6751561c4ad7ea27efddd8425"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a81d595a6751561c4ad7ea27efddd8425">SPI_STATE_DMA_RX_RD</a></div><div class="ttdeci">@ SPI_STATE_DMA_RX_RD</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:74</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2a8d22ab8335993c85e237f9d8c625138b"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a8d22ab8335993c85e237f9d8c625138b">SPI_STATE_UNINIT</a></div><div class="ttdeci">@ SPI_STATE_UNINIT</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:60</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3">SPI_STATE_DMA_TX</a></div><div class="ttdeci">@ SPI_STATE_DMA_TX</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:65</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d">SPI_STATE_IRQ_RX</a></div><div class="ttdeci">@ SPI_STATE_IRQ_RX</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:68</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2ad73d6e03e9c7501ab1970944700757fe"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ad73d6e03e9c7501ab1970944700757fe">SPI_STATE_IS_SLAVE</a></div><div class="ttdeci">@ SPI_STATE_IS_SLAVE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:69</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17">SPI_STATE_IRQ_TX</a></div><div class="ttdeci">@ SPI_STATE_IRQ_TX</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:67</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2aef19188483bc3cef0dd026926afe2864"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aef19188483bc3cef0dd026926afe2864">SPI_STATE_CS_ACTIVEED</a></div><div class="ttdeci">@ SPI_STATE_CS_ACTIVEED</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:70</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612"><div class="ttname"><a href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612">SPI_STATE_BUSY_TX</a></div><div class="ttdeci">@ SPI_STATE_BUSY_TX</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:62</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a5aecb616522472bf8460d4d3a0ebccb2"><div class="ttname"><a href="sdrv__spi_8h.html#a5aecb616522472bf8460d4d3a0ebccb2">sdrv_spi_attach_async_callback</a></div><div class="ttdeci">void sdrv_spi_attach_async_callback(struct sdrv_spi *spi, spi_callback_t cb)</div><div class="ttdoc">Setup the async callback handler.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a643e09edea30b0fa5e6dcc8797e62a63"><div class="ttname"><a href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63">spi_cs_select</a></div><div class="ttdeci">spi_cs_select</div><div class="ttdoc">Spi hardware cs select .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:54</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a643e09edea30b0fa5e6dcc8797e62a63a09c515c068def175e6bd5be3114ab2b5"><div class="ttname"><a href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a09c515c068def175e6bd5be3114ab2b5">CS_SEL_SS3</a></div><div class="ttdeci">@ CS_SEL_SS3</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:54</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a643e09edea30b0fa5e6dcc8797e62a63a10a22689551e5b91b417ff49c21e83fa"><div class="ttname"><a href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a10a22689551e5b91b417ff49c21e83fa">CS_SEL_SS2</a></div><div class="ttdeci">@ CS_SEL_SS2</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:54</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a643e09edea30b0fa5e6dcc8797e62a63a3a97d5f36f5f4119204400994c9c7dcd"><div class="ttname"><a href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a3a97d5f36f5f4119204400994c9c7dcd">CS_SEL_SS0</a></div><div class="ttdeci">@ CS_SEL_SS0</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:54</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a643e09edea30b0fa5e6dcc8797e62a63a3ff078afdd80ff69dea6fb90f517cffe"><div class="ttname"><a href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63a3ff078afdd80ff69dea6fb90f517cffe">CS_SEL_SS1</a></div><div class="ttdeci">@ CS_SEL_SS1</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:54</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a6e4d9dc6f78fda72ab158f29bc252f65"><div class="ttname"><a href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65">spi_cpha</a></div><div class="ttdeci">spi_cpha</div><div class="ttdoc">Spi sclk phase mode.</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:41</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a6e4d9dc6f78fda72ab158f29bc252f65a8ce0855eff8bb34bf9bff87b6e6ff62d"><div class="ttname"><a href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65a8ce0855eff8bb34bf9bff87b6e6ff62d">DATA_CPT_ON_FIRST_SCK_EDGE</a></div><div class="ttdeci">@ DATA_CPT_ON_FIRST_SCK_EDGE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:42</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a6e4d9dc6f78fda72ab158f29bc252f65abae896865f9b933d6d1d0fcde07995ad"><div class="ttname"><a href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65abae896865f9b933d6d1d0fcde07995ad">DATA_CPT_ON_SECOND_SCK_EDGE</a></div><div class="ttdeci">@ DATA_CPT_ON_SECOND_SCK_EDGE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:43</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a802d973e6c496a7f86cbcebeeaa89e59"><div class="ttname"><a href="sdrv__spi_8h.html#a802d973e6c496a7f86cbcebeeaa89e59">sdrv_spi_config_device</a></div><div class="ttdeci">int sdrv_spi_config_device(struct sdrv_spi *spi, const struct spi_device_config *cfg)</div><div class="ttdoc">SPI device configuration.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992">fifo_state</a></div><div class="ttdeci">fifo_state</div><div class="ttdoc">Spi fifo state flags.</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:80</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992a5499035c9f82a80f50beac7d38e47490"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a5499035c9f82a80f50beac7d38e47490">SPI_TX_DMA_ERR</a></div><div class="ttdeci">@ SPI_TX_DMA_ERR</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:85</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992a71ed4c726800f4d80ddd9de1882a9aa1"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a71ed4c726800f4d80ddd9de1882a9aa1">SPI_RX_DMA_ERR</a></div><div class="ttdeci">@ SPI_RX_DMA_ERR</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:86</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992a7207f2f552aeff34a7bcb9b7403fd230"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a7207f2f552aeff34a7bcb9b7403fd230">SPI_TX_FIFO_UDR</a></div><div class="ttdeci">@ SPI_TX_FIFO_UDR</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:83</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992a986363eea4b58740ded6ed9648619f3d"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a986363eea4b58740ded6ed9648619f3d">SPI_TX_FIFO_WRITE</a></div><div class="ttdeci">@ SPI_TX_FIFO_WRITE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:82</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992ab1e5a03a5c94c3481777120ecc205f3f"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992ab1e5a03a5c94c3481777120ecc205f3f">SPI_RX_FIFO_OVR</a></div><div class="ttdeci">@ SPI_RX_FIFO_OVR</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:84</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992adf6899b51412eaac3451a1a4c3c1bddb"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992adf6899b51412eaac3451a1a4c3c1bddb">SPI_TX_ONLY_DONE</a></div><div class="ttdeci">@ SPI_TX_ONLY_DONE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:87</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_a94efc98242444def1e6b31c77abcc992af900525e55908f1dce579bc4ae0d8f6c"><div class="ttname"><a href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992af900525e55908f1dce579bc4ae0d8f6c">SPI_RX_FIFO_READ</a></div><div class="ttdeci">@ SPI_RX_FIFO_READ</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:81</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_aaaef1244e0a05abda3f6d56d6831953e"><div class="ttname"><a href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953e">data_dir</a></div><div class="ttdeci">data_dir</div><div class="ttdoc">Spi transmit data direction type .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:126</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_aaaef1244e0a05abda3f6d56d6831953ea2317986d65fff20968785c40b25a4c9b"><div class="ttname"><a href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953ea2317986d65fff20968785c40b25a4c9b">SPI_TX_DIR</a></div><div class="ttdeci">@ SPI_TX_DIR</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:126</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_aaaef1244e0a05abda3f6d56d6831953ea7fbd0493407a88ec23c8e571c0447f87"><div class="ttname"><a href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953ea7fbd0493407a88ec23c8e571c0447f87">SPI_RX_DIR</a></div><div class="ttdeci">@ SPI_RX_DIR</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:126</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_abc65dae99842f3d08074995c06ca98de"><div class="ttname"><a href="sdrv__spi_8h.html#abc65dae99842f3d08074995c06ca98de">sdrv_spi_deinit</a></div><div class="ttdeci">int sdrv_spi_deinit(struct sdrv_spi *bus)</div><div class="ttdoc">Deinitialize the SPI device.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_abd4f021695236b6c75b26f924a405871"><div class="ttname"><a href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871">spi_ops_type</a></div><div class="ttdeci">spi_ops_type</div><div class="ttdoc">Spi transmit mode .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:108</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_abd4f021695236b6c75b26f924a405871a28c81e4590d645052a36f77ff08cd824"><div class="ttname"><a href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871a28c81e4590d645052a36f77ff08cd824">OP_MODE_IRQ</a></div><div class="ttdeci">@ OP_MODE_IRQ</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:110</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_abd4f021695236b6c75b26f924a405871aae04f0d32e6c569d9741adbc02cbc9ae"><div class="ttname"><a href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871aae04f0d32e6c569d9741adbc02cbc9ae">OP_MODE_SYNC</a></div><div class="ttdeci">@ OP_MODE_SYNC</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:109</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_abd4f021695236b6c75b26f924a405871ab21821808ecda763084d72510cc11859"><div class="ttname"><a href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871ab21821808ecda763084d72510cc11859">OP_MODE_DMA</a></div><div class="ttdeci">@ OP_MODE_DMA</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:111</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_ac55e1067f98be1b5f14a41765304aef8"><div class="ttname"><a href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8">spi_cpol</a></div><div class="ttdeci">spi_cpol</div><div class="ttdoc">Spi sclk idle mode.</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:36</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_ac55e1067f98be1b5f14a41765304aef8a4798f253437a781dfe5bac4fc50b282a"><div class="ttname"><a href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8a4798f253437a781dfe5bac4fc50b282a">SCK_IDLE_LOW</a></div><div class="ttdeci">@ SCK_IDLE_LOW</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:36</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_ac55e1067f98be1b5f14a41765304aef8ae83e6e93ec3fbacc9189a2212b22dc86"><div class="ttname"><a href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8ae83e6e93ec3fbacc9189a2212b22dc86">SCK_IDLE_HIGH</a></div><div class="ttdeci">@ SCK_IDLE_HIGH</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:36</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_ac902a346291157329878ead1a7a2cd81"><div class="ttname"><a href="sdrv__spi_8h.html#ac902a346291157329878ead1a7a2cd81">sdrv_spi_get_status</a></div><div class="ttdeci">enum spi_bus_state sdrv_spi_get_status(struct sdrv_spi *spi)</div><div class="ttdoc">Get SPI bus state.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_adda87204e6df34bf9dcd7f50952c6454"><div class="ttname"><a href="sdrv__spi_8h.html#adda87204e6df34bf9dcd7f50952c6454">sdrv_spi_sync_transmit</a></div><div class="ttdeci">int sdrv_spi_sync_transmit(struct sdrv_spi *spi, void *tx_buf, void *rx_buf, uint32_t bytes, uint32_t timeout)</div><div class="ttdoc">SPI sync transmit.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_adf7c33c6af2ba76c98bd4e6273a54b4a"><div class="ttname"><a href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4a">spi_bus_state</a></div><div class="ttdeci">spi_bus_state</div><div class="ttdoc">Spi bus idle/busy state .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:103</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_adf7c33c6af2ba76c98bd4e6273a54b4aa3b368c531eb77a6e4baaacdeba1c733c"><div class="ttname"><a href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4aa3b368c531eb77a6e4baaacdeba1c733c">SPI_IDLE</a></div><div class="ttdeci">@ SPI_IDLE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:103</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_adf7c33c6af2ba76c98bd4e6273a54b4aa77af10511cd7c60df95c66e904a13643"><div class="ttname"><a href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4aa77af10511cd7c60df95c66e904a13643">SPI_BUSY</a></div><div class="ttdeci">@ SPI_BUSY</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:103</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_afa70f0e34044c249166c92f65c971fce"><div class="ttname"><a href="sdrv__spi_8h.html#afa70f0e34044c249166c92f65c971fce">sdrv_spi_init</a></div><div class="ttdeci">int sdrv_spi_init(struct sdrv_spi *spi, struct spi_common_config *cfg)</div><div class="ttdoc">Initialize the SPI module.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_afdf21b72da31582b5bcadfa581e58403"><div class="ttname"><a href="sdrv__spi_8h.html#afdf21b72da31582b5bcadfa581e58403">sdrv_spi_async_transmit</a></div><div class="ttdeci">int sdrv_spi_async_transmit(struct sdrv_spi *spi, void *tx_buf, void *rx_buf, uint32_t bytes, enum spi_ops_type type)</div><div class="ttdoc">SPI async transmit in IRQ or DMA mode.</div></div>
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<div class="ttc" id="asdrv__spi_8h_html_afe67f453cd960a973f1fd40630a9367f"><div class="ttname"><a href="sdrv__spi_8h.html#afe67f453cd960a973f1fd40630a9367f">spi_callback_t</a></div><div class="ttdeci">void(* spi_callback_t)(void *spi, spi_event_type Event)</div><div class="ttdoc">Spi async transmit callback type .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:131</div></div>
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<div class="ttc" id="astructsdrv__ckgen__slice__node_html"><div class="ttname"><a href="structsdrv__ckgen__slice__node.html">sdrv_ckgen_slice_node</a></div><div class="ttdoc">Abstract clock slice node for driver operate.</div><div class="ttdef"><b>Definition:</b> sdrv_ckgen.h:184</div></div>
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<div class="ttc" id="astructsdrv__dma__channel__t_html"><div class="ttname"><a href="structsdrv__dma__channel__t.html">sdrv_dma_channel_t</a></div><div class="ttdoc">DMA channel structure.</div><div class="ttdef"><b>Definition:</b> sdrv_dma.h:554</div></div>
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<div class="ttc" id="astructsdrv__dma_html"><div class="ttname"><a href="structsdrv__dma.html">sdrv_dma</a></div><div class="ttdoc">DMA controller structure.</div><div class="ttdef"><b>Definition:</b> sdrv_dma.h:472</div></div>
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<div class="ttc" id="astructsdrv__spi_html"><div class="ttname"><a href="structsdrv__spi.html">sdrv_spi</a></div><div class="ttdoc">Spi bus module handler type .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:238</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a036e9fe736ae99af089b2264f6dc61aa"><div class="ttname"><a href="structsdrv__spi.html#a036e9fe736ae99af089b2264f6dc61aa">sdrv_spi::cur_cmd</a></div><div class="ttdeci">uint32_t cur_cmd</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:258</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a04c04296732305246669644bf6adb151"><div class="ttname"><a href="structsdrv__spi.html#a04c04296732305246669644bf6adb151">sdrv_spi::callback</a></div><div class="ttdeci">spi_callback_t callback</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:252</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a0523cedff47e2441fc198b7770ec5d3f"><div class="ttname"><a href="structsdrv__spi.html#a0523cedff47e2441fc198b7770ec5d3f">sdrv_spi::base</a></div><div class="ttdeci">uint32_t base</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:240</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a17fdd15a71ced1e05faf127882011db3"><div class="ttname"><a href="structsdrv__spi.html#a17fdd15a71ced1e05faf127882011db3">sdrv_spi::irq</a></div><div class="ttdeci">uint32_t irq</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:242</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a1b0c7bd4d79798ef4e0ce23894c9aeb2"><div class="ttname"><a href="structsdrv__spi.html#a1b0c7bd4d79798ef4e0ce23894c9aeb2">sdrv_spi::state</a></div><div class="ttdeci">uint32_t state</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:256</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a1f802a8e5a2f41d839ef3a0561c26b3c"><div class="ttname"><a href="structsdrv__spi.html#a1f802a8e5a2f41d839ef3a0561c26b3c">sdrv_spi::tx_dma_chan</a></div><div class="ttdeci">sdrv_dma_channel_t tx_dma_chan</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:265</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a538737c70da7629c9e33fcd72010f67c"><div class="ttname"><a href="structsdrv__spi.html#a538737c70da7629c9e33fcd72010f67c">sdrv_spi::max_baudrate</a></div><div class="ttdeci">uint32_t max_baudrate</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:244</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a602a880a7b51cbeefe350958b82f676c"><div class="ttname"><a href="structsdrv__spi.html#a602a880a7b51cbeefe350958b82f676c">sdrv_spi::com_config</a></div><div class="ttdeci">const struct spi_common_config * com_config</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:248</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a6447a78c537c288805bc527d463a7b3b"><div class="ttname"><a href="structsdrv__spi.html#a6447a78c537c288805bc527d463a7b3b">sdrv_spi::tx_context</a></div><div class="ttdeci">struct spi_dma_context tx_context</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:267</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a654a1398e0747a65d41b65354c5353ad"><div class="ttname"><a href="structsdrv__spi.html#a654a1398e0747a65d41b65354c5353ad">sdrv_spi::rx_context</a></div><div class="ttdeci">struct spi_dma_context rx_context</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:263</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a7d73684dd52931cd4c0dc0049a3f294a"><div class="ttname"><a href="structsdrv__spi.html#a7d73684dd52931cd4c0dc0049a3f294a">sdrv_spi::rx_dma_chan</a></div><div class="ttdeci">sdrv_dma_channel_t rx_dma_chan</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:261</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a7e0c991c8d6ad1897098b2c0507eb5fe"><div class="ttname"><a href="structsdrv__spi.html#a7e0c991c8d6ad1897098b2c0507eb5fe">sdrv_spi::transmit_sche</a></div><div class="ttdeci">struct spi_transmit_cb transmit_sche</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:254</div></div>
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<div class="ttc" id="astructsdrv__spi_html_a908d969013f38a70ca9fe4adc442e8ed"><div class="ttname"><a href="structsdrv__spi.html#a908d969013f38a70ca9fe4adc442e8ed">sdrv_spi::dev_config</a></div><div class="ttdeci">const struct spi_device_config * dev_config</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:250</div></div>
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<div class="ttc" id="astructsdrv__spi_html_aad40741e5211139797d770c0aaf8a669"><div class="ttname"><a href="structsdrv__spi.html#aad40741e5211139797d770c0aaf8a669">sdrv_spi::min_baudrate</a></div><div class="ttdeci">uint32_t min_baudrate</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:246</div></div>
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<div class="ttc" id="astructsdrv__spi_html_ac122534f66a119bdd914666d5c32269a"><div class="ttname"><a href="structsdrv__spi.html#ac122534f66a119bdd914666d5c32269a">sdrv_spi::dma_err</a></div><div class="ttdeci">uint32_t dma_err</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:269</div></div>
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<div class="ttc" id="astructspi__common__config_html"><div class="ttname"><a href="structspi__common__config.html">spi_common_config</a></div><div class="ttdoc">Spi controller configuration .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:166</div></div>
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<div class="ttc" id="astructspi__common__config_html_a0254136707993378f527c16a54c630fe"><div class="ttname"><a href="structspi__common__config.html#a0254136707993378f527c16a54c630fe">spi_common_config::rx_ch_id</a></div><div class="ttdeci">sdrv_dma_channel_id_e rx_ch_id</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:177</div></div>
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<div class="ttc" id="astructspi__common__config_html_a0523cedff47e2441fc198b7770ec5d3f"><div class="ttname"><a href="structspi__common__config.html#a0523cedff47e2441fc198b7770ec5d3f">spi_common_config::base</a></div><div class="ttdeci">uint32_t base</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:184</div></div>
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<div class="ttc" id="astructspi__common__config_html_a17fdd15a71ced1e05faf127882011db3"><div class="ttname"><a href="structspi__common__config.html#a17fdd15a71ced1e05faf127882011db3">spi_common_config::irq</a></div><div class="ttdeci">uint32_t irq</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:186</div></div>
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<div class="ttc" id="astructspi__common__config_html_a2bb4595339d531c08fb228e6be32cabd"><div class="ttname"><a href="structspi__common__config.html#a2bb4595339d531c08fb228e6be32cabd">spi_common_config::is_spi_mode</a></div><div class="ttdeci">bool is_spi_mode</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:168</div></div>
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<div class="ttc" id="astructspi__common__config_html_a5d74b7e9ac864649d4d9c2728d8f6cf4"><div class="ttname"><a href="structspi__common__config.html#a5d74b7e9ac864649d4d9c2728d8f6cf4">spi_common_config::dma_ins</a></div><div class="ttdeci">sdrv_dma_t * dma_ins</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:181</div></div>
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<div class="ttc" id="astructspi__common__config_html_a695d5200cc71c136733ac6597a53fce2"><div class="ttname"><a href="structspi__common__config.html#a695d5200cc71c136733ac6597a53fce2">spi_common_config::tx_ch_id</a></div><div class="ttdeci">sdrv_dma_channel_id_e tx_ch_id</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:179</div></div>
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<div class="ttc" id="astructspi__common__config_html_a7d095fd897a859b9aab28c2652d511f1"><div class="ttname"><a href="structspi__common__config.html#a7d095fd897a859b9aab28c2652d511f1">spi_common_config::clk</a></div><div class="ttdeci">const sdrv_ckgen_slice_node_t * clk</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:188</div></div>
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<div class="ttc" id="astructspi__common__config_html_a9c86a82e9458805493b98f7d1e9b3dc3"><div class="ttname"><a href="structspi__common__config.html#a9c86a82e9458805493b98f7d1e9b3dc3">spi_common_config::is_polling_mode</a></div><div class="ttdeci">bool is_polling_mode</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:174</div></div>
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<div class="ttc" id="astructspi__common__config_html_ac4938b746ebb19d35675324c1dd3cb85"><div class="ttname"><a href="structspi__common__config.html#ac4938b746ebb19d35675324c1dd3cb85">spi_common_config::is_master</a></div><div class="ttdeci">bool is_master</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:172</div></div>
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<div class="ttc" id="astructspi__common__config_html_ac6b6012b0142f6c864c45086a70ffb03"><div class="ttname"><a href="structspi__common__config.html#ac6b6012b0142f6c864c45086a70ffb03">spi_common_config::is_half_mode</a></div><div class="ttdeci">bool is_half_mode</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:170</div></div>
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<div class="ttc" id="astructspi__device__config_html"><div class="ttname"><a href="structspi__device__config.html">spi_device_config</a></div><div class="ttdoc">SPI device configuration.</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:136</div></div>
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<div class="ttc" id="astructspi__device__config_html_a0916d8e175dafd7ab00bf740c54db24c"><div class="ttname"><a href="structspi__device__config.html#a0916d8e175dafd7ab00bf740c54db24c">spi_device_config::clk2cs_end_delay</a></div><div class="ttdeci">uint8_t clk2cs_end_delay</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:154</div></div>
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<div class="ttc" id="astructspi__device__config_html_a09a2a45f731b02946ff6d3cd15c1a476"><div class="ttname"><a href="structspi__device__config.html#a09a2a45f731b02946ff6d3cd15c1a476">spi_device_config::width</a></div><div class="ttdeci">uint8_t width</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:148</div></div>
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<div class="ttc" id="astructspi__device__config_html_a177799396ff679549d62c159146cc8ba"><div class="ttname"><a href="structspi__device__config.html#a177799396ff679549d62c159146cc8ba">spi_device_config::sclk_freq</a></div><div class="ttdeci">uint32_t sclk_freq</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:138</div></div>
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<div class="ttc" id="astructspi__device__config_html_a2731fb9320ca2d21ab1baec574322049"><div class="ttname"><a href="structspi__device__config.html#a2731fb9320ca2d21ab1baec574322049">spi_device_config::fream_delay</a></div><div class="ttdeci">uint8_t fream_delay</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:150</div></div>
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<div class="ttc" id="astructspi__device__config_html_a2a142ee8181d56c1aa46cacee35c4ae5"><div class="ttname"><a href="structspi__device__config.html#a2a142ee8181d56c1aa46cacee35c4ae5">spi_device_config::cs_sel</a></div><div class="ttdeci">uint8_t cs_sel</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:146</div></div>
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<div class="ttc" id="astructspi__device__config_html_a3b0c85068b0a7bfbc1f117fc2b2b27f5"><div class="ttname"><a href="structspi__device__config.html#a3b0c85068b0a7bfbc1f117fc2b2b27f5">spi_device_config::cpha</a></div><div class="ttdeci">enum spi_cpha cpha</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:142</div></div>
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<div class="ttc" id="astructspi__device__config_html_a4e17f397cf5b59ea89e3d0e59d864fa3"><div class="ttname"><a href="structspi__device__config.html#a4e17f397cf5b59ea89e3d0e59d864fa3">spi_device_config::is_tx_delay</a></div><div class="ttdeci">bool is_tx_delay</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:160</div></div>
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<div class="ttc" id="astructspi__device__config_html_a6e05c22595ffcc0a3117da49d0ffb8e5"><div class="ttname"><a href="structspi__device__config.html#a6e05c22595ffcc0a3117da49d0ffb8e5">spi_device_config::is_soft_cs</a></div><div class="ttdeci">bool is_soft_cs</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:158</div></div>
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<div class="ttc" id="astructspi__device__config_html_a7cbe4cb16f871db3a2fbb9a524ee6f25"><div class="ttname"><a href="structspi__device__config.html#a7cbe4cb16f871db3a2fbb9a524ee6f25">spi_device_config::cs_pol</a></div><div class="ttdeci">enum spi_cs_polarity cs_pol</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:144</div></div>
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<div class="ttc" id="astructspi__device__config_html_a935815878c660623344f4878d3e20dec"><div class="ttname"><a href="structspi__device__config.html#a935815878c660623344f4878d3e20dec">spi_device_config::clk2cs_delay</a></div><div class="ttdeci">uint8_t clk2cs_delay</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:152</div></div>
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<div class="ttc" id="astructspi__device__config_html_ab40d0d4e95eeefdb23b2b23d880708f9"><div class="ttname"><a href="structspi__device__config.html#ab40d0d4e95eeefdb23b2b23d880708f9">spi_device_config::is_lsb_mode</a></div><div class="ttdeci">bool is_lsb_mode</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:156</div></div>
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<div class="ttc" id="astructspi__device__config_html_acb82e172f3b682a2e762be4fdcb1a074"><div class="ttname"><a href="structspi__device__config.html#acb82e172f3b682a2e762be4fdcb1a074">spi_device_config::cpol</a></div><div class="ttdeci">enum spi_cpol cpol</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:140</div></div>
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<div class="ttc" id="astructspi__dma__context_html"><div class="ttname"><a href="structspi__dma__context.html">spi_dma_context</a></div><div class="ttdoc">Spi dma context type .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:205</div></div>
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<div class="ttc" id="astructspi__dma__context_html_a2a6994ba0e51d3c3ae9a2801719411e7"><div class="ttname"><a href="structspi__dma__context.html#a2a6994ba0e51d3c3ae9a2801719411e7">spi_dma_context::bus</a></div><div class="ttdeci">void * bus</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:207</div></div>
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<div class="ttc" id="astructspi__dma__context_html_a9e0e1b229ce9ec2b4c88452b2d5106a5"><div class="ttname"><a href="structspi__dma__context.html#a9e0e1b229ce9ec2b4c88452b2d5106a5">spi_dma_context::is_need_handle</a></div><div class="ttdeci">bool is_need_handle</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:208</div></div>
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<div class="ttc" id="astructspi__dma__context_html_aaa25437f8d47d9c71c7abc994f70dd4a"><div class="ttname"><a href="structspi__dma__context.html#aaa25437f8d47d9c71c7abc994f70dd4a">spi_dma_context::dir</a></div><div class="ttdeci">enum data_dir dir</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:206</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html"><div class="ttname"><a href="structspi__transmit__cb.html">spi_transmit_cb</a></div><div class="ttdoc">Spi transmit context type .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:214</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_a3a57b605ce99ad96fc8ffb167ab8d387"><div class="ttname"><a href="structspi__transmit__cb.html#a3a57b605ce99ad96fc8ffb167ab8d387">spi_transmit_cb::expect_len</a></div><div class="ttdeci">uint32_t expect_len</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:230</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_a4db87a147629691fb2751bc7eb9620ea"><div class="ttname"><a href="structspi__transmit__cb.html#a4db87a147629691fb2751bc7eb9620ea">spi_transmit_cb::cur_remian</a></div><div class="ttdeci">uint32_t cur_remian</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:228</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_a5358b36971f812a541ab223f38df1608"><div class="ttname"><a href="structspi__transmit__cb.html#a5358b36971f812a541ab223f38df1608">spi_transmit_cb::rx_cur</a></div><div class="ttdeci">uint32_t rx_cur</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:224</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_a96bbf959016e4411c9e6b9812a8be60a"><div class="ttname"><a href="structspi__transmit__cb.html#a96bbf959016e4411c9e6b9812a8be60a">spi_transmit_cb::len</a></div><div class="ttdeci">uint32_t len</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:216</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_aa28593304c9a3e7243f71aa17b27bde4"><div class="ttname"><a href="structspi__transmit__cb.html#aa28593304c9a3e7243f71aa17b27bde4">spi_transmit_cb::ptxdata</a></div><div class="ttdeci">union spi_data_ptr ptxdata</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:222</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_aa431416c0df9d7b349c13b075c4aca24"><div class="ttname"><a href="structspi__transmit__cb.html#aa431416c0df9d7b349c13b075c4aca24">spi_transmit_cb::prxdata</a></div><div class="ttdeci">union spi_data_ptr prxdata</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:220</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_aa97b553932cb7b328fec41876f606e73"><div class="ttname"><a href="structspi__transmit__cb.html#aa97b553932cb7b328fec41876f606e73">spi_transmit_cb::next</a></div><div class="ttdeci">struct spi_transmit_cb * next</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:232</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_abda11f22948993b24fa68674aedc37f6"><div class="ttname"><a href="structspi__transmit__cb.html#abda11f22948993b24fa68674aedc37f6">spi_transmit_cb::tx_cur</a></div><div class="ttdeci">uint32_t tx_cur</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:226</div></div>
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<div class="ttc" id="astructspi__transmit__cb_html_ae42fa22efce1eaf9bf8d0f3587cafee5"><div class="ttname"><a href="structspi__transmit__cb.html#ae42fa22efce1eaf9bf8d0f3587cafee5">spi_transmit_cb::width_type</a></div><div class="ttdeci">uint8_t width_type</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:218</div></div>
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<div class="ttc" id="aunionspi__data__ptr_html"><div class="ttname"><a href="unionspi__data__ptr.html">spi_data_ptr</a></div><div class="ttdoc">Spi transmition data ptr .</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:194</div></div>
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<div class="ttc" id="aunionspi__data__ptr_html_a1669af8a07d107017643a6f1a86723f5"><div class="ttname"><a href="unionspi__data__ptr.html#a1669af8a07d107017643a6f1a86723f5">spi_data_ptr::u16_ptr</a></div><div class="ttdeci">uint16_t * u16_ptr</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:198</div></div>
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<div class="ttc" id="aunionspi__data__ptr_html_a2e5d0e850c1284852bb2cb15ae49b9e9"><div class="ttname"><a href="unionspi__data__ptr.html#a2e5d0e850c1284852bb2cb15ae49b9e9">spi_data_ptr::u8_ptr</a></div><div class="ttdeci">uint8_t * u8_ptr</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:197</div></div>
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<div class="ttc" id="aunionspi__data__ptr_html_a97ad06b300d95ba1d023dcb1e825335f"><div class="ttname"><a href="unionspi__data__ptr.html#a97ad06b300d95ba1d023dcb1e825335f">spi_data_ptr::val</a></div><div class="ttdeci">uint32_t val</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:196</div></div>
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<div class="ttc" id="aunionspi__data__ptr_html_ac913a0aef13e475ab44ad095e019ac0e"><div class="ttname"><a href="unionspi__data__ptr.html#ac913a0aef13e475ab44ad095e019ac0e">spi_data_ptr::u32_ptr</a></div><div class="ttdeci">uint32_t * u32_ptr</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:199</div></div>
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