151 lines
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151 lines
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<div id="projectname">SemiDrive SSDK Appication Program Interface<span id="projectnumber"> PTG3.0</span>
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<h3><a id="index_m" name="index_m"></a>- m -</h3><ul>
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<li>m_din : <a class="el" href="structske__hp__reg.html#a859eb343dc0633c1404e4ba052d4d305">ske_hp_reg</a></li>
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<li>m_din_cr : <a class="el" href="structske__hp__reg.html#adc872804178b91b92e17a71c4abd4068">ske_hp_reg</a></li>
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<li>m_dout : <a class="el" href="structske__hp__reg.html#aaed1cc369f7631e9b0142e7ae1a9eace">ske_hp_reg</a></li>
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<li>m_v_addr : <a class="el" href="structhvkt__param.html#a4f9c5e39944e4c431dabea651fd2bc78">hvkt_param</a></li>
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<li>mac_addr : <a class="el" href="structdwc__eth__config__t.html#a178d1c28de2a804c227b01ee8c59f864">dwc_eth_config_t</a></li>
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<li>mac_cfg : <a class="el" href="structsdrv__firewall__cfg__t.html#a1649427389f6da1a6c3f3e87a86fa084">sdrv_firewall_cfg_t</a></li>
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<li>mac_len : <a class="el" href="structcmd__generate_m_a_c__t.html#ab31651a41e6501a3ae2de0125e27dbe4">cmd_generateMAC_t</a>, <a class="el" href="structcmd__verify_m_a_c__t.html#ab31651a41e6501a3ae2de0125e27dbe4">cmd_verifyMAC_t</a></li>
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<li>mac_ptr : <a class="el" href="structcmd__generate_m_a_c__t.html#af792e396616ff130de508f4394766eca">cmd_generateMAC_t</a>, <a class="el" href="structcmd__verify_m_a_c__t.html#af792e396616ff130de508f4394766eca">cmd_verifyMAC_t</a></li>
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<li>mad_crc : <a class="el" href="structsdrv__dma__linklist__descriptor__t.html#a3ba66637bea2187fb35d3b4d9e7b7e1c">sdrv_dma_linklist_descriptor_t</a></li>
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<li>mad_crc_mode : <a class="el" href="structsdrv__dma__channel__config__t.html#a80b5b84d741bf4afaaf514eef28d25ad">sdrv_dma_channel_config_t</a></li>
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<li>mainfunction_polling : <a class="el" href="structsdrv__lin__config.html#acf8ab9fcfc0cb7240c2628e2b912259e">sdrv_lin_config</a></li>
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<li>map : <a class="el" href="structspi__nor__erase__cmd.html#a60898246af89d6e084c9b66a8c0e2ed2">spi_nor_erase_cmd</a></li>
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<li>map_format : <a class="el" href="structdisplay__timing.html#ad85d02c6892415a696ba61d63ad865ee">display_timing</a></li>
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<li>mask : <a class="el" href="structdwc__eth__config__t.html#ada50f0e7b89816d02459e3e520b018bf">dwc_eth_config_t</a></li>
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<li>mask_en : <a class="el" href="structsdrv__acmp__csel__cfg.html#a46b3de1e0215e6c8be1ee00fa0542ec8">sdrv_acmp_csel_cfg</a></li>
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<li>mastPriKey_ptr : <a class="el" href="structcmd__sm9__enc__generate__master__key__t.html#a84ac7ec03a559c56f7a93b03ba69d114">cmd_sm9_enc_generate_master_key_t</a>, <a class="el" href="structcmd__sm9__enc__generate__user__prikey__t.html#a84ac7ec03a559c56f7a93b03ba69d114">cmd_sm9_enc_generate_user_prikey_t</a>, <a class="el" href="structcmd__sm9__sign__generate__master__key__t.html#a84ac7ec03a559c56f7a93b03ba69d114">cmd_sm9_sign_generate_master_key_t</a>, <a class="el" href="structcmd__sm9__sign__generate__user__prikey__t.html#a84ac7ec03a559c56f7a93b03ba69d114">cmd_sm9_sign_generate_user_prikey_t</a></li>
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<li>mastPubKey_ptr : <a class="el" href="structcmd__sm9__enc__generate__master__key__t.html#adeedca634f86361db842c91a83bb8df1">cmd_sm9_enc_generate_master_key_t</a>, <a class="el" href="structcmd__sm9__encrypt__t.html#adeedca634f86361db842c91a83bb8df1">cmd_sm9_encrypt_t</a>, <a class="el" href="structcmd__sm9__exckey__generate__user__tmpkey__t.html#adeedca634f86361db842c91a83bb8df1">cmd_sm9_exckey_generate_user_tmpkey_t</a>, <a class="el" href="structcmd__sm9__generatesignature__t.html#adeedca634f86361db842c91a83bb8df1">cmd_sm9_generatesignature_t</a>, <a class="el" href="structcmd__sm9__sign__generate__master__key__t.html#adeedca634f86361db842c91a83bb8df1">cmd_sm9_sign_generate_master_key_t</a>, <a class="el" href="structcmd__sm9__verifysignature__t.html#adeedca634f86361db842c91a83bb8df1">cmd_sm9_verifysignature_t</a>, <a class="el" href="structcmd__sm9__wrapkey__t.html#adeedca634f86361db842c91a83bb8df1">cmd_sm9_wrapkey_t</a></li>
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<li>match_num : <a class="el" href="structsdrv__lin__config.html#af86c1ef8a75366b784e9f8624f070c13">sdrv_lin_config</a>, <a class="el" href="structsdrv__uart__config.html#af86c1ef8a75366b784e9f8624f070c13">sdrv_uart_config</a></li>
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<li>matchTimeout : <a class="el" href="structflexcan__pn__config__t.html#a9e5f29e15faff2ef0a1a2cd60ec171bd">flexcan_pn_config_t</a></li>
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<li>max_baudrate : <a class="el" href="structsdrv__spi.html#a538737c70da7629c9e33fcd72010f67c">sdrv_spi</a></li>
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<li>max_blk_len : <a class="el" href="structhost__caps.html#a9f329ecfb3b689f44a9fbbfff6d57aba">host_caps</a></li>
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<li>max_burst : <a class="el" href="structsdrv__pdm__dma__data.html#ab7bc69e6cfc5be32a01864dfef5895f9">sdrv_pdm_dma_data</a></li>
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<li>max_clk_rate : <a class="el" href="structmmc__config__data.html#acd3969fc3e7c60ef9290cfa9b2e1f74f">mmc_config_data</a>, <a class="el" href="structsdhci__host.html#acd3969fc3e7c60ef9290cfa9b2e1f74f">sdhci_host</a></li>
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<li>max_window_for_off : <a class="el" href="structsdrv__pmu__level__filter.html#a9598d4b7c99b8d64e94c9a406464381e">sdrv_pmu_level_filter</a></li>
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<li>max_window_for_off_en : <a class="el" href="structsdrv__pmu__level__filter__enable.html#aa66cd02da096c20809267cc41ceffcfd">sdrv_pmu_level_filter_enable</a></li>
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<li>max_window_for_on : <a class="el" href="structsdrv__pmu__level__filter.html#abfbcf40913ab99e858f5863ba71edf05">sdrv_pmu_level_filter</a></li>
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<li>max_window_for_on_en : <a class="el" href="structsdrv__pmu__level__filter__enable.html#a66241aefc08d3e4ff27544c646f9aae2">sdrv_pmu_level_filter_enable</a></li>
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<li>maxburst : <a class="el" href="structsdrv__i2s__dma__data.html#ab6fd402b4f5e294112c4ebfcc177eb34">sdrv_i2s_dma_data</a></li>
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<li>maxMbNum : <a class="el" href="structflexcan__config__t.html#aaada4541e434f55fc2e4c072c77bb7ea">flexcan_config_t</a></li>
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<li>mb_bitmap : <a class="el" href="structsdrv__mbox__dev.html#a005ccaaf47bdbadb5126765fc0c12961">sdrv_mbox_dev</a></li>
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<li>mb_mask : <a class="el" href="structsdrv__mbox__chan.html#a3f5873a2c41d214660b987bc54932e4f">sdrv_mbox_chan</a></li>
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<li>mb_used_mask : <a class="el" href="struct__flexcan__handle.html#a8d9a96466ba5884d6b8017e34afe6987">_flexcan_handle</a></li>
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<li>mbIdx : <a class="el" href="struct__flexcan__mb__transfer.html#acc8869dbbe7255ac7f14930f5054d0ac">_flexcan_mb_transfer</a></li>
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<li>mbState : <a class="el" href="struct__flexcan__handle.html#aa4b6a66e543dc577854ff2b62cf83cbd">_flexcan_handle</a></li>
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<li>mclk_dir : <a class="el" href="structsdrv__i2s__config.html#a810fc557b971b62867452443f155c48f">sdrv_i2s_config</a></li>
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<li>mclk_sel : <a class="el" href="structsdrv__i2s__config.html#a6305346b2d01ec9f60bdf093df5eea72">sdrv_i2s_config</a></li>
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<li>MCR0 : <a class="el" href="structsdrv__uart__regs.html#a373a6476599f65022b455e0e777e1185">sdrv_uart_regs</a></li>
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<li>MCR2 : <a class="el" href="structsdrv__uart__regs.html#af485fc5be4c1263b6a035586d03c3846">sdrv_uart_regs</a></li>
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<li>MCR3 : <a class="el" href="structsdrv__uart__regs.html#aa0364dc00f01cb8b37126ab7bf173f49">sdrv_uart_regs</a></li>
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<li>MCR4 : <a class="el" href="structsdrv__uart__regs.html#a43cfdc704b88c3b4e36396798b512883">sdrv_uart_regs</a></li>
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<li>mctrl : <a class="el" href="structsdrv__i2c.html#ab1557ad99c8e12878fadffc0051c9ab9">sdrv_i2c</a></li>
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<li>mem_base : <a class="el" href="structsdrv__mbox__config.html#a357f53415517cf54335a8ed1425fe549">sdrv_mbox_config</a>, <a class="el" href="structsdrv__mbox__dev.html#a357f53415517cf54335a8ed1425fe549">sdrv_mbox_dev</a></li>
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<li>mem_type : <a class="el" href="structspi__nor.html#a1312f6e7d28ff84aabd80952688c3065">spi_nor</a>, <a class="el" href="structspi__nor__config.html#a1312f6e7d28ff84aabd80952688c3065">spi_nor_config</a></li>
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<li>memport_num : <a class="el" href="structsdrv__firewall__cfg__t.html#afd413ce1f72c85894a5a73c7770c620e">sdrv_firewall_cfg_t</a></li>
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<li>mid : <a class="el" href="structmmc__cid.html#acd4f5afe5c7c65cbd1d03f161199ef7d">mmc_cid</a></li>
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<li>min_baudrate : <a class="el" href="structsdrv__spi.html#aad40741e5211139797d770c0aaf8a669">sdrv_spi</a></li>
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<li>min_window_for_off : <a class="el" href="structsdrv__pmu__level__filter.html#a27be5eb332a63ecb1604abef77fbdbc8">sdrv_pmu_level_filter</a></li>
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<li>min_window_for_on : <a class="el" href="structsdrv__pmu__level__filter.html#ae79e09e03292d654b4533b0767424deb">sdrv_pmu_level_filter</a></li>
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<li>misr : <a class="el" href="structske__hp__reg.html#a036b1854fdc5551ade744e07fec36cae">ske_hp_reg</a></li>
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<li>mmc_ending_trans : <a class="el" href="structsdhci__ops.html#ad5847eb2e2143af8f35d3bea21b23e54">sdhci_ops</a></li>
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<li>mnt_cont : <a class="el" href="structsdrv__adc.html#a58bb05451acc6704e96dd3bce5c57cc3">sdrv_adc</a></li>
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<li>mnt_cont_cfg : <a class="el" href="structsdrv__adc.html#ac561b0fc6c903d291607ad5aad00cce4">sdrv_adc</a></li>
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<li>mnt_single : <a class="el" href="structsdrv__adc.html#a426d140a6ce57d5dddb3cd70f06a54d5">sdrv_adc</a></li>
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<li>mnt_thrd_cont : <a class="el" href="structsdrv__adc.html#a705ff64c7f08ec953f0a512256aa5ac5">sdrv_adc</a></li>
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<li>mnt_thrd_single : <a class="el" href="structsdrv__adc.html#a665ee01cc26f8f334c65ef1e320cc243">sdrv_adc</a></li>
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<li>mode : <a class="el" href="structasw__app__dc.html#a1ea5d0cb93f22f7d0fdf804bd68c3326">asw_app_dc</a>, <a class="el" href="structcmd__aead__decrypt__gcm__t.html#a37e90f5e3bd99fac2021fb3a326607d4">cmd_aead_decrypt_gcm_t</a>, <a class="el" href="structcmd__aead__encrypt__gcm__t.html#a37e90f5e3bd99fac2021fb3a326607d4">cmd_aead_encrypt_gcm_t</a>, <a class="el" href="structcmd__generate_m_a_c__t.html#a37e90f5e3bd99fac2021fb3a326607d4">cmd_generateMAC_t</a>, <a class="el" href="structcmd__hash__t.html#a37e90f5e3bd99fac2021fb3a326607d4">cmd_hash_t</a>, <a class="el" href="structcmd__ske__decrypt__t.html#a37e90f5e3bd99fac2021fb3a326607d4">cmd_ske_decrypt_t</a>, <a class="el" href="structcmd__ske__encrypt__t.html#a37e90f5e3bd99fac2021fb3a326607d4">cmd_ske_encrypt_t</a>, <a class="el" href="structcmd__verify_m_a_c__t.html#a37e90f5e3bd99fac2021fb3a326607d4">cmd_verifyMAC_t</a>, <a class="el" href="structcrc__info.html#a1ea5d0cb93f22f7d0fdf804bd68c3326">crc_info</a>, <a class="el" href="structpd__t.html#a3def87e24012ac600cbf43a6c052da55">pd_t</a>, <a class="el" href="structsdrv__acmp__config.html#a478afc1ace3ad018b642dcea714e8951">sdrv_acmp_config</a>, <a class="el" href="structsdrv__ckgen__gating__config__node.html#abf80d57c44098865b2c6c1d3a1f0baf9">sdrv_ckgen_gating_config_node</a>, <a class="el" href="structsdrv__ckgen__ip__clock__config__node.html#abf80d57c44098865b2c6c1d3a1f0baf9">sdrv_ckgen_ip_clock_config_node</a>, <a class="el" href="structsdrv__etimer__chn.html#aea006422bbd164f661bd19f55393073a">sdrv_etimer_chn</a>, <a class="el" href="structsdrv__lin.html#a51326f731b2add291e9d9066ff90c4f0">sdrv_lin</a>, <a class="el" href="structsdrv__lin__config.html#a51326f731b2add291e9d9066ff90c4f0">sdrv_lin_config</a>, <a class="el" href="structsdrv__xspi__slv__conf.html#a1b39914b1e337a02d6f0e488acc3be3c">sdrv_xspi_slv_conf</a></li>
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<li>mode_req_trans : <a class="el" href="structsdrv__smc__domain__timeout.html#affdf49f07be6ffbbbb9561d57ec4bd6b">sdrv_smc_domain_timeout</a></li>
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<li>mode_select : <a class="el" href="structpin__settings__config.html#ac0d1eed1f0910bd5dd746df6cb30a8ac">pin_settings_config</a></li>
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<li>MODEN : <a class="el" href="union_m_c_r0___type.html#a3a5216f651b69882316d0d6093a6fd72">MCR0_Type</a></li>
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<li>MODRST : <a class="el" href="union_m_c_r0___type.html#af2e5f10fc72c57079026e1ed1119a5f8">MCR0_Type</a></li>
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<li>month : <a class="el" href="structmmc__cid.html#a55a5fa57878363d803833666ddf3c16f">mmc_cid</a></li>
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<li>mpc_cfg : <a class="el" href="structsdrv__firewall__cfg__t.html#a5ab54d0f25b2dfc0de525034b78331ed">sdrv_firewall_cfg_t</a></li>
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<li>mpc_errinfo : <a class="el" href="structsdrv__firewall__err__t.html#a400194616ed5919ca13da452ef137499">sdrv_firewall_err_t</a></li>
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<li>mpc_intr_sta : <a class="el" href="structsdrv__mpc__irqsta__t.html#a669fc2de1f97f3ba367f81d0125a6780">sdrv_mpc_irqsta_t</a></li>
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<li>mpc_memport_id : <a class="el" href="structsdrv__mpc__irqsta__t.html#af82a0cd947f83c93ba627ddc09e84bae">sdrv_mpc_irqsta_t</a></li>
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<li>mrd_cycle : <a class="el" href="structsdram__comm__config.html#a281a3b1477b8d04ec3202dbba5547b06">sdram_comm_config</a></li>
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<li>msg_bitmap : <a class="el" href="structsdrv__mbox__dev.html#aabeb9e1276a9a9640933b2440fbb26f9">sdrv_mbox_dev</a></li>
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<li>msg_id : <a class="el" href="structsdrv__mbox__chan.html#a9b8ca1fe84e25f9c58f6a45a0c6dff90">sdrv_mbox_chan</a></li>
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<li>MSR0 : <a class="el" href="structsdrv__uart__regs.html#aa220b9dd9457761de321028147a9ae16">sdrv_uart_regs</a></li>
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<li>MSR1 : <a class="el" href="structsdrv__uart__regs.html#aa19a0a40d5038730a419caf4994973de">sdrv_uart_regs</a></li>
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<li>mtu : <a class="el" href="structdwc__eth__config__t.html#a3c8ee4e9dd2a5354e83fb30c95598f30">dwc_eth_config_t</a>, <a class="el" href="structsdrv__mbox__dev.html#a3c8ee4e9dd2a5354e83fb30c95598f30">sdrv_mbox_dev</a></li>
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<li>MUTEMODE : <a class="el" href="union_p_s_r0___type.html#a4349e55e027cb2d5c253fb7e97aef94f">PSR0_Type</a></li>
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<li>mux : <a class="el" href="structpin__settings__config.html#a891f1b81c928acfd931c3c7d310b181b">pin_settings_config</a>, <a class="el" href="structsdrv__input__select__t.html#a1bbf5452e9391aa9e0786a521374f5fa">sdrv_input_select_t</a></li>
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<li>mux_id : <a class="el" href="structsdrv__dma__channel__config__t.html#a9e332f53012e98034f6704cfb06a8c25">sdrv_dma_channel_config_t</a></li>
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<li>mux_offset : <a class="el" href="structsdrv__pinctrl.html#ad96f450c6964f9406de36bb7f77f1b59">sdrv_pinctrl</a></li>
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