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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_ee023d43c33bfccc31aa50a48a76892b.html">include</a></li> </ul>
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<div class="headertitle"><div class="title">sdrv_adc.h</div></div>
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<a href="sdrv__adc_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno"> 1</span> </div>
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<div class="line"><a id="l00009" name="l00009"></a><span class="lineno"> 9</span><span class="preprocessor">#ifndef SDRV_ADC_H</span></div>
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<div class="line"><a id="l00010" name="l00010"></a><span class="lineno"> 10</span><span class="preprocessor">#define SDRV_ADC_H</span></div>
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<div class="line"><a id="l00011" name="l00011"></a><span class="lineno"> 11</span> </div>
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<div class="line"><a id="l00012" name="l00012"></a><span class="lineno"> 12</span><span class="preprocessor">#include <stdint.h></span></div>
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<div class="line"><a id="l00013" name="l00013"></a><span class="lineno"> 13</span><span class="preprocessor">#include <stdbool.h></span></div>
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<div class="line"><a id="l00014" name="l00014"></a><span class="lineno"> 14</span><span class="preprocessor">#include <regs_base.h></span></div>
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<div class="line"><a id="l00015" name="l00015"></a><span class="lineno"> 15</span> </div>
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<div class="line"><a id="l00016" name="l00016"></a><span class="lineno"> 16</span> </div>
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<div class="line"><a id="l00017" name="l00017"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ace45a0552320f5c4d9dfa2a84c6837d7"> 17</a></span><span class="preprocessor">#define SDRV_ADC_POLL_TMO (1000 * 1000u)</span></div>
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<div class="line"><a id="l00018" name="l00018"></a><span class="lineno"> 18</span> </div>
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<div class="line"><a id="l00019" name="l00019"></a><span class="lineno"> 19</span> </div>
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<div class="line"><a id="l00020" name="l00020"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae0da9d2c88caff37ea24a5926bd2b6c3"> 20</a></span><span class="preprocessor">#define sdrv_adc1 ((sdrv_adc_t *)APB_ADC1_BASE)</span></div>
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<div class="line"><a id="l00021" name="l00021"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab43b9fa14806280bb927b437d493b6c2"> 21</a></span><span class="preprocessor">#define sdrv_adc2 ((sdrv_adc_t *)APB_ADC2_BASE)</span></div>
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<div class="line"><a id="l00022" name="l00022"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa580870daa55365480ad11cc8c06656d"> 22</a></span><span class="preprocessor">#define sdrv_adc3 ((sdrv_adc_t *)APB_ADC3_BASE)</span></div>
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<div class="line"><a id="l00023" name="l00023"></a><span class="lineno"> 23</span> </div>
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<div class="line"><a id="l00024" name="l00024"></a><span class="lineno"> 24</span> </div>
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<div class="line"><a id="l00025" name="l00025"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a46f9c35cfa8f56e2127c065fb85341a8"> 25</a></span><span class="preprocessor">#define SDRV_ADC_RC_CNT (4u)</span></div>
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<div class="line"><a id="l00026" name="l00026"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a51d445309bdc467688c8356851e56796"> 26</a></span><span class="preprocessor">#define SDRV_ADC_RC_ENTRY_CNT (16u)</span></div>
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<div class="line"><a id="l00027" name="l00027"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a737982e84051c80ea05427f0ebfeb78c"> 27</a></span><span class="preprocessor">#define SDRV_ADC_RCHT_ENTRY_CNT (32u)</span></div>
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<div class="line"><a id="l00028" name="l00028"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aee4a329d2436077ee9d00f01ede4bc5c"> 28</a></span><span class="preprocessor">#define SDRV_ADC_CID_PART_CNT (8u)</span></div>
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<div class="line"><a id="l00029" name="l00029"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4953bee4734838559dc9a78ff142c085"> 29</a></span><span class="preprocessor">#define SDRV_ADC_ANA_PARAM_CNT (16u)</span></div>
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<div class="line"><a id="l00030" name="l00030"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7ccedb5cdf48c8eaf62761599e1e0a94"> 30</a></span><span class="preprocessor">#define SDRV_ADC_MNT_SINGLE_CNT (8u)</span></div>
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<div class="line"><a id="l00031" name="l00031"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa471811023c116f054071db1ec707b45"> 31</a></span><span class="preprocessor">#define SDRV_ADC_SUB_FIFO_CNT (4u)</span></div>
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<div class="line"><a id="l00032" name="l00032"></a><span class="lineno"> 32</span> </div>
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<div class="line"><a id="l00033" name="l00033"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a88586af56bcda364a5396a116f4457af"> 33</a></span><span class="preprocessor">#define ADC_CH_POLAR_POS 1u</span></div>
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<div class="line"><a id="l00034" name="l00034"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa76cddcf85547f25a94144887eaf83b4"> 34</a></span><span class="preprocessor">#define ADC_CH_POLAR_NEG 0u</span></div>
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<div class="line"><a id="l00035" name="l00035"></a><span class="lineno"> 35</span> </div>
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<div class="line"><a id="l00036" name="l00036"></a><span class="lineno"> 36</span><span class="comment">/* Construct Channel for Single Mode */</span></div>
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<div class="line"><a id="l00037" name="l00037"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab3e540151a53d7ff70a762b04b831343"> 37</a></span><span class="preprocessor">#define ADC_CH_SEL_TAISHAN(ch, polar, mux) \</span></div>
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<div class="line"><a id="l00038" name="l00038"></a><span class="lineno"> 38</span><span class="preprocessor"> ((((mux) & 0x7u) << 6) | (((polar) & 0x1u) << 3) | ((ch) & 0x7u))</span></div>
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<div class="line"><a id="l00039" name="l00039"></a><span class="lineno"> 39</span><span class="comment">/* Construct Channel for Differential Mode */</span></div>
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<div class="line"><a id="l00040" name="l00040"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3070b65285e05ab93c183287941849eb"> 40</a></span><span class="preprocessor">#define ADC_DCH_SEL_TAISHAN(ch_p, ch_n, mux) \</span></div>
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<div class="line"><a id="l00041" name="l00041"></a><span class="lineno"> 41</span><span class="preprocessor"> ((((mux) & 0x7u) << 6) | (((ch_p) & 0x7u) << 3) | ((ch_n) & 0x7u))</span></div>
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<div class="line"><a id="l00042" name="l00042"></a><span class="lineno"> 42</span> </div>
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<div class="line"><a id="l00043" name="l00043"></a><span class="lineno"> 43</span> </div>
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<div class="line"><a id="l00044" name="l00044"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9318a7f903bf92e53a101a17aed918c7"> 44</a></span><span class="preprocessor">#define SADC_SOFT_RST_DIG (1u << 0)</span></div>
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<div class="line"><a id="l00045" name="l00045"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#abb19d2e24fea6eb1ebdfb42b658d1a42"> 45</a></span><span class="preprocessor">#define SADC_SOFT_RST_ANA (1u << 1)</span></div>
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<div class="line"><a id="l00046" name="l00046"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab6582315d0adcd474d3ed3030c4fc565"> 46</a></span><span class="preprocessor">#define SADC_SOFT_RST_RC_POS (2)</span></div>
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<div class="line"><a id="l00047" name="l00047"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a218c426d0bd422d6259419aa9ce8492d"> 47</a></span><span class="preprocessor">#define SADC_SOFT_RST_RC0TMR (1u << 2)</span></div>
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<div class="line"><a id="l00048" name="l00048"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a84b076beabdc0b5b1da2bcb25ae6028c"> 48</a></span><span class="preprocessor">#define SADC_SOFT_RST_RC1TMR (1u << 3)</span></div>
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<div class="line"><a id="l00049" name="l00049"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a6a49eb81082fd24fe72f1bc3ebdfb84d"> 49</a></span><span class="preprocessor">#define SADC_SOFT_RST_RC2TMR (1u << 4)</span></div>
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<div class="line"><a id="l00050" name="l00050"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a26e3a588b2af4252d59706014ef8428f"> 50</a></span><span class="preprocessor">#define SADC_SOFT_RST_RC3TMR (1u << 5)</span></div>
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<div class="line"><a id="l00051" name="l00051"></a><span class="lineno"> 51</span> </div>
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<div class="line"><a id="l00052" name="l00052"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae38b5b9ed11a21a7187211cb98ab2aa9"> 52</a></span><span class="preprocessor">#define SADC_INIT_VALUE_POS (0)</span></div>
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<div class="line"><a id="l00053" name="l00053"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7da8abca212711047b072b7b299bab45"> 53</a></span><span class="preprocessor">#define SADC_INIT_VALUE_MSK (0xFFFFFu << SADC_INIT_VALUE_POS)</span></div>
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<div class="line"><a id="l00054" name="l00054"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac6116c038b784e61e2c2d200946ca2c7"> 54</a></span><span class="preprocessor">#define SADC_INIT_START (1u << 20)</span></div>
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<div class="line"><a id="l00055" name="l00055"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a231a621b9722611dde2be5f9648efa60"> 55</a></span><span class="preprocessor">#define SADC_INIT_DONE (1u << 24)</span></div>
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<div class="line"><a id="l00056" name="l00056"></a><span class="lineno"> 56</span> </div>
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<div class="line"><a id="l00057" name="l00057"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ada1b5443d0f2a5310dabf62a2a1ecd78"> 57</a></span><span class="preprocessor">#define SADC_DCOC_TIMES_POS (0)</span></div>
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<div class="line"><a id="l00058" name="l00058"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae2960fbb8df06c752be547472bbba59d"> 58</a></span><span class="preprocessor">#define SADC_DCOC_TIMES_MSK (0x7u << SADC_DCOC_TIMES_POS)</span></div>
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<div class="line"><a id="l00059" name="l00059"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a5c41623b3827dc0bf53c18682d724e73"> 59</a></span><span class="preprocessor">#define SADC_DCOC_START (1u << 3)</span></div>
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<div class="line"><a id="l00060" name="l00060"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac41d411eb40af7822f4c4dca787063ae"> 60</a></span><span class="preprocessor">#define SADC_DCOC_EN (1u << 4)</span></div>
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<div class="line"><a id="l00061" name="l00061"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9b230f3f1fa697367d67c7527db1e6ea"> 61</a></span><span class="preprocessor">#define SADC_DCOC_OVWR (1u << 8)</span></div>
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<div class="line"><a id="l00062" name="l00062"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aefd7ea765583ce7e3ddba791880c7767"> 62</a></span><span class="preprocessor">#define SADC_DCOC_VALUE_POS (16)</span></div>
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<div class="line"><a id="l00063" name="l00063"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a19279e29a6848c9361c3ebb404cec581"> 63</a></span><span class="preprocessor">#define SADC_DCOC_VALUE_MSK (0xFFFu << SADC_DCOC_VALUE_POS)</span></div>
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<div class="line"><a id="l00064" name="l00064"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a90fcd6345e908d1509885cb12dc8da74"> 64</a></span><span class="preprocessor">#define SADC_DCOC_VALUE_SIGN (1u << 28)</span></div>
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<div class="line"><a id="l00065" name="l00065"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a2750455a69e508a0e1082facbb3d27f0"> 65</a></span><span class="preprocessor">#define SADC_DCOC_VALUE_DONE (1u << 31)</span></div>
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<div class="line"><a id="l00066" name="l00066"></a><span class="lineno"> 66</span> </div>
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<div class="line"><a id="l00067" name="l00067"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a6ea174b6b7f193e03c2d51b79a67e37f"> 67</a></span><span class="preprocessor">#define SADC_HTC_DONE_LEN_POS (0)</span></div>
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<div class="line"><a id="l00068" name="l00068"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7a016833bb519f0f049b1bd1ba79e398"> 68</a></span><span class="preprocessor">#define SADC_HTC_DONE_LEN_MSK (0xFu << SADC_HTC_DONE_LEN_POS)</span></div>
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<div class="line"><a id="l00069" name="l00069"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1a2a5b621cdea6e909220eede3e025de"> 69</a></span><span class="preprocessor">#define SADC_HTC_READY_LEN_POS (8)</span></div>
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<div class="line"><a id="l00070" name="l00070"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a02b4ca991afa6c3fcae5e6ff2ee21e61"> 70</a></span><span class="preprocessor">#define SADC_HTC_READY_LEN_MSK (0xFFu << SADC_HTC_READY_LEN_POS)</span></div>
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<div class="line"><a id="l00071" name="l00071"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a28847488102409b3ee859329da8bece9"> 71</a></span><span class="preprocessor">#define SADC_HTC_READY (1u << 31)</span></div>
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<div class="line"><a id="l00072" name="l00072"></a><span class="lineno"> 72</span> </div>
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<div class="line"><a id="l00073" name="l00073"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aecfa29fc192474abf31ecff9e81ad036"> 73</a></span><span class="preprocessor">#define SADC_RCHT_ENTRY_AMSEL_POS (0)</span></div>
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<div class="line"><a id="l00074" name="l00074"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7815f3f983a7b067459f43926abbe21e"> 74</a></span><span class="preprocessor">#define SADC_RCHT_ENTRY_AMSEL_MSK (0x1FFu << SADC_RCHT_ENTRY_AMSEL_POS)</span></div>
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<div class="line"><a id="l00075" name="l00075"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4cb16f178e77c5f95e7a99867ca88c44"> 75</a></span><span class="preprocessor">#define SADC_RCHT_ENTRY_CSEL_POS (12)</span></div>
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<div class="line"><a id="l00076" name="l00076"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa03edb4d8d2b95600e9bb505d15c1869"> 76</a></span><span class="preprocessor">#define SADC_RCHT_ENTRY_CSEL_MSK (0xFu << SADC_RCHT_ENTRY_CSEL_POS)</span></div>
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<div class="line"><a id="l00077" name="l00077"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af70f0be050af4e0a94f84abc453a599b"> 77</a></span><span class="preprocessor">#define SADC_RCHT_ENTRY_RPT_MODE (1u << 16)</span></div>
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<div class="line"><a id="l00078" name="l00078"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa8d674498755f0e5b116e88708d3c150"> 78</a></span><span class="preprocessor">#define SADC_RCHT_ENTRY_RPT_CNT_POS (24)</span></div>
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<div class="line"><a id="l00079" name="l00079"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3d1d21112a62172a8ae07bab44a1f05c"> 79</a></span><span class="preprocessor">#define SADC_RCHT_ENTRY_RPT_CNT_MSK (0x7u << SADC_RCHT_ENTRY_RPT_CNT_POS)</span></div>
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<div class="line"><a id="l00080" name="l00080"></a><span class="lineno"> 80</span> </div>
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<div class="line"><a id="l00081" name="l00081"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a2a7355d90c50c987d1c50be5568524e9"> 81</a></span><span class="preprocessor">#define SADC_RC_TIMER_COMPARE_POS (0)</span></div>
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<div class="line"><a id="l00082" name="l00082"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3a68a5e5d9f83c2d361f013e598acad5"> 82</a></span><span class="preprocessor">#define SADC_RC_TIMER_COMPARE_MSK (0xFFFFu << SADC_RC_TIMER_COMPARE_POS)</span></div>
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<div class="line"><a id="l00083" name="l00083"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3d7559b2eed436fbc4e18121a91fb241"> 83</a></span><span class="preprocessor">#define SADC_RC_TIMER_TERMINAL_POS (16)</span></div>
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<div class="line"><a id="l00084" name="l00084"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab870c8343136f6f72708e09107720c37"> 84</a></span><span class="preprocessor">#define SADC_RC_TIMER_TERMINAL_MSK (0xFFFFu << SADC_RC_TIMER_TERMINAL_POS)</span></div>
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<div class="line"><a id="l00085" name="l00085"></a><span class="lineno"> 85</span> </div>
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<div class="line"><a id="l00086" name="l00086"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a04a550684ed384f4d856528e03cd1326"> 86</a></span><span class="preprocessor">#define SADC_RC_Q_CUR_POS (0)</span></div>
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<div class="line"><a id="l00087" name="l00087"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#accc636f17acf91be7bdfaa87e8eaffa2"> 87</a></span><span class="preprocessor">#define SADC_RC_Q_CUR_MSK (0xFu << SADC_RC_Q_CUR_POS)</span></div>
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<div class="line"><a id="l00088" name="l00088"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a5035d111a1fa8cc1dbfd860fea939377"> 88</a></span><span class="preprocessor">#define SADC_RC_Q_START_POS (4)</span></div>
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<div class="line"><a id="l00089" name="l00089"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af2c8e8a5551a194dbadfe1b10cced621"> 89</a></span><span class="preprocessor">#define SADC_RC_Q_START_MSK (0xFu << SADC_RC_Q_START_POS)</span></div>
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<div class="line"><a id="l00090" name="l00090"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ad52034c7cc0e84fd9f6930cfe93aec96"> 90</a></span><span class="preprocessor">#define SADC_RC_Q_END_POS (8)</span></div>
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<div class="line"><a id="l00091" name="l00091"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1990a161f6a89c5e9e8783c061b5f821"> 91</a></span><span class="preprocessor">#define SADC_RC_Q_END_MSK (0xFu << SADC_RC_Q_END_POS)</span></div>
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<div class="line"><a id="l00092" name="l00092"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4b30b439c9ac9ef60eade2ac465fe641"> 92</a></span><span class="preprocessor">#define SADC_RC_TRG_START (1u << 12)</span></div>
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<div class="line"><a id="l00093" name="l00093"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a22a20dcc4c17c15808c3f245114c04fe"> 93</a></span><span class="preprocessor">#define SADC_RC_TMR_SLAVE (1u << 13)</span></div>
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<div class="line"><a id="l00094" name="l00094"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#abe8a8fe65162013e7710af4550f717a8"> 94</a></span><span class="preprocessor">#define SADC_RC_TRG_MODE_SW (1u << 14)</span></div>
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<div class="line"><a id="l00095" name="l00095"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa50e4f9fdb0df349e9db64ffa11baf78"> 95</a></span><span class="preprocessor">#define SADC_RC_SOFT_TRG (1u << 15)</span></div>
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<div class="line"><a id="l00096" name="l00096"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a229dc9ad88993a801b990afb6dd63da4"> 96</a></span><span class="preprocessor">#define SADC_RC_OVWR_CUR_EN (1u << 16)</span></div>
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<div class="line"><a id="l00097" name="l00097"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a74f0c82986209181b5c5faac58737c49"> 97</a></span><span class="preprocessor">#define SADC_RC_TRG_EN (1u << 17)</span></div>
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<div class="line"><a id="l00098" name="l00098"></a><span class="lineno"> 98</span> </div>
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<div class="line"><a id="l00099" name="l00099"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a30c00cd7941101a3f87d41e47d0a4c01"> 99</a></span><span class="preprocessor">#define SADC_INT_STAT_END_COV_RC3 (1u << 0)</span></div>
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<div class="line"><a id="l00100" name="l00100"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aabd8339fa945ff60c0ca4ed5eb959873"> 100</a></span><span class="preprocessor">#define SADC_INT_STAT_END_COV_RC2 (1u << 1)</span></div>
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<div class="line"><a id="l00101" name="l00101"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a63585ba15376c8de0fcf647baae69fed"> 101</a></span><span class="preprocessor">#define SADC_INT_STAT_END_COV_RC1 (1u << 2)</span></div>
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<div class="line"><a id="l00102" name="l00102"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a2c8213564a2268685c26826197fa117d"> 102</a></span><span class="preprocessor">#define SADC_INT_STAT_END_COV_RC0 (1u << 3)</span></div>
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<div class="line"><a id="l00103" name="l00103"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7623289515170c2e7859edc5dbb393c6"> 103</a></span><span class="preprocessor">#define SADC_INT_STAT_END_COV_RCHT (1u << 4)</span></div>
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<div class="line"><a id="l00104" name="l00104"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a6eec88dc6322bf80727a8a528aa93e44"> 104</a></span><span class="preprocessor">#define SADC_INT_STAT_SUB_FIFO0 (1u << 8)</span></div>
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<div class="line"><a id="l00105" name="l00105"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#acc17c6cb2e8013408b2fdd0fcb5603e8"> 105</a></span><span class="preprocessor">#define SADC_INT_STAT_SUB_FIFO1 (1u << 9)</span></div>
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<div class="line"><a id="l00106" name="l00106"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ad5618b0a9ed686c8db99ab61a3e5a4fd"> 106</a></span><span class="preprocessor">#define SADC_INT_STAT_SUB_FIFO2 (1u << 10)</span></div>
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<div class="line"><a id="l00107" name="l00107"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a8fb8105712050d41a29ffde943bfac49"> 107</a></span><span class="preprocessor">#define SADC_INT_STAT_SUB_FIFO3 (1u << 11)</span></div>
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<div class="line"><a id="l00108" name="l00108"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9bbe9e62353111aa7114e594620fc6f8"> 108</a></span><span class="preprocessor">#define SADC_INT_STAT_TS_OVF (1u << 12)</span></div>
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<div class="line"><a id="l00109" name="l00109"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af619636b5e209e273acd9b2a34de3dd6"> 109</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE0 (1u << 16)</span></div>
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<div class="line"><a id="l00110" name="l00110"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a17a8c4e386a43ad29991b47dbe950eb2"> 110</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE1 (1u << 17)</span></div>
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<div class="line"><a id="l00111" name="l00111"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab9197aa718d17e8833b973ad3dbfb559"> 111</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE2 (1u << 18)</span></div>
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<div class="line"><a id="l00112" name="l00112"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a554ee22c92dec9eba4ea253d43426470"> 112</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE3 (1u << 19)</span></div>
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<div class="line"><a id="l00113" name="l00113"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a70431e1641a808987ba0129f1485c2a2"> 113</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE4 (1u << 20)</span></div>
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<div class="line"><a id="l00114" name="l00114"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a83bb440da521ccd085f12ad8f25c5bbe"> 114</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE5 (1u << 21)</span></div>
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<div class="line"><a id="l00115" name="l00115"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a68a0690dfc3356397efc6c7417d10725"> 115</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE6 (1u << 22)</span></div>
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<div class="line"><a id="l00116" name="l00116"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7d442a3e239153430d48ca6e3f251870"> 116</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_SINGLE7 (1u << 23)</span></div>
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<div class="line"><a id="l00117" name="l00117"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7886796e77ce1970eb1f1c2601703ac3"> 117</a></span><span class="preprocessor">#define SADC_INT_STAT_MNT_CONT (1u << 24)</span></div>
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<div class="line"><a id="l00118" name="l00118"></a><span class="lineno"> 118</span> </div>
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<div class="line"><a id="l00119" name="l00119"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3a7034832c1a76a716f4685a8c1d34f4"> 119</a></span><span class="preprocessor">#define SADC_RC_ENTRY_AMSEL_POS (0)</span></div>
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<div class="line"><a id="l00120" name="l00120"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a08c2d480d6c30fa4f550f60973a4312a"> 120</a></span><span class="preprocessor">#define SADC_RC_ENTRY_AMSEL_MSK (0x1FFu << SADC_RC_ENTRY_AMSEL_POS)</span></div>
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<div class="line"><a id="l00121" name="l00121"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a29f589d12ac4bf1af269d3ebba71a268"> 121</a></span><span class="preprocessor">#define SADC_RC_ENTRY_CSEL_POS (12)</span></div>
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<div class="line"><a id="l00122" name="l00122"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a2f39643926de83fbe77f95be6342a4a9"> 122</a></span><span class="preprocessor">#define SADC_RC_ENTRY_CSEL_MSK (0xFu << SADC_RC_ENTRY_CSEL_POS)</span></div>
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<div class="line"><a id="l00123" name="l00123"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4d176b92fd55e821ebcf45c186ed2d2e"> 123</a></span><span class="preprocessor">#define SADC_RC_ENTRY_RPT_MODE (1u << 16)</span></div>
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<div class="line"><a id="l00124" name="l00124"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a06e38152c91d901eddd925a7dd7fe141"> 124</a></span><span class="preprocessor">#define SADC_RC_ENTRY_RPT_CNT_POS (24)</span></div>
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<div class="line"><a id="l00125" name="l00125"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a38a5e1ffb2333a0504719fd8b4f33640"> 125</a></span><span class="preprocessor">#define SADC_RC_ENTRY_RPT_CNT_MSK (0xFu << SADC_RC_ENTRY_RPT_CNT_POS)</span></div>
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<div class="line"><a id="l00126" name="l00126"></a><span class="lineno"> 126</span> </div>
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<div class="line"><a id="l00127" name="l00127"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a30e945f610916df1129e17b7bcab0948"> 127</a></span><span class="preprocessor">#define SADC_SCH_CID_MSK (0x7u)</span></div>
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<div class="line"><a id="l00128" name="l00128"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a27c36ea574b5c3e01f57b62ff41bbc27"> 128</a></span><span class="preprocessor">#define SADC_SCH_CID_WIDTH_BIT (4)</span></div>
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<div class="line"><a id="l00129" name="l00129"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a95e22a2c0061203aca4dbdb8c482d4d3"> 129</a></span><span class="preprocessor">#define SADC_SCH_CID_CNT_PER_REG (32 / SADC_SCH_CID_WIDTH_BIT)</span></div>
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<div class="line"><a id="l00130" name="l00130"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa4df941755b071ef44f447c0c8ef8931"> 130</a></span><span class="preprocessor">#define SADC_SCH_CID_CNT (SDRV_ADC_CID_PART_CNT * SADC_SCH_CID_CNT_PER_REG)</span></div>
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<div class="line"><a id="l00131" name="l00131"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af67fd138ce195046cda3de61e2cd9d01"> 131</a></span><span class="preprocessor">#define SADC_SCH_CID_MV_NEXT (7u)</span></div>
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<div class="line"><a id="l00132" name="l00132"></a><span class="lineno"> 132</span> </div>
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<div class="line"><a id="l00133" name="l00133"></a><span class="lineno"> 133</span> </div>
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<div class="line"><a id="l00134" name="l00134"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a32fbcc74103f00bca793516b19e96cdf"> 134</a></span><span class="preprocessor">#define SADC_SCH_CFG_SLOT_ITVL_POS (0)</span></div>
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<div class="line"><a id="l00135" name="l00135"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ad9d380c33ab0f9a97c5d0b9e7f76cae7"> 135</a></span><span class="preprocessor">#define SADC_SCH_CFG_SLOT_ITVL_MSK (0xFFu << SADC_SCH_CFG_SLOT_ITVL_POS)</span></div>
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<div class="line"><a id="l00136" name="l00136"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a2a0cc30a423c0d29b38bc964325871c3"> 136</a></span><span class="preprocessor">#define SADC_SCH_CFG_SLOT_CONST (1u << 8)</span></div>
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<div class="line"><a id="l00137" name="l00137"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac35868e630e0a28fd8b658d31f4ef1b1"> 137</a></span><span class="preprocessor">#define SADC_SCH_CFG_MODE_MASTER (1u << 9)</span></div>
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<div class="line"><a id="l00138" name="l00138"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a261dea8f23bb2d172e63591ad6b3b875"> 138</a></span><span class="preprocessor">#define SADC_SCH_CFG_MODE_SYNC (1u << 10)</span></div>
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<div class="line"><a id="l00139" name="l00139"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a8f07e837ad637ff74485b4538f211c69"> 139</a></span><span class="preprocessor">#define SADC_SCH_CFG_ROT_EN (1u << 11)</span></div>
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<div class="line"><a id="l00140" name="l00140"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa740b111ce727f2faf88f9ecb113b94d"> 140</a></span><span class="preprocessor">#define SADC_SCH_CFG_ASYNC_STALL (1u << 12)</span></div>
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<div class="line"><a id="l00141" name="l00141"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aee4a6d0e7f07747ca2638eb7c766d016"> 141</a></span><span class="preprocessor">#define SADC_SCH_CFG_SLV_DLY_POS (16)</span></div>
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<div class="line"><a id="l00142" name="l00142"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa55ebea3c967578c4b772ffb8f68f143"> 142</a></span><span class="preprocessor">#define SADC_SCH_CFG_SLV_DLY_MSK (0xFFu << SADC_SCH_CFG_SLV_DLY_POS)</span></div>
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<div class="line"><a id="l00143" name="l00143"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4466db19344de8342b115146ac23301e"> 143</a></span><span class="preprocessor">#define SADC_SCH_CFG_SLOT_HALT (1u << 24)</span></div>
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<div class="line"><a id="l00144" name="l00144"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a92422abb86601bedfc22725f3e7650ab"> 144</a></span><span class="preprocessor">#define SADC_SCH_CFG_SLOT_RST (1u << 25)</span></div>
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<div class="line"><a id="l00145" name="l00145"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac8bb6d0db795dcc7c6f41aa4898b2298"> 145</a></span><span class="preprocessor">#define SADC_SCH_CFG_RST_DONE (1u << 28)</span></div>
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<div class="line"><a id="l00146" name="l00146"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aac2322b202d58a5e7c66cdc9a7b1e316"> 146</a></span><span class="preprocessor">#define SADC_SCH_CFG_TS_VLD (1u << 30)</span></div>
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<div class="line"><a id="l00147" name="l00147"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aba009b2957e7e17971b33977f88d26e8"> 147</a></span><span class="preprocessor">#define SADC_SCH_CFG_TS_RST (1u << 31)</span></div>
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<div class="line"><a id="l00148" name="l00148"></a><span class="lineno"> 148</span> </div>
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<div class="line"><a id="l00149" name="l00149"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a11de60632b333f34c5faacdc24a0f6b6"> 149</a></span><span class="preprocessor">#define SADC_CLK_CTRL_DIV_BYPASS (1u << 0)</span></div>
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<div class="line"><a id="l00150" name="l00150"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a11d19fc96f840b0c9302388fff7f1a9e"> 150</a></span><span class="preprocessor">#define SADC_CLK_CTRL_REFH_POS (8)</span></div>
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<div class="line"><a id="l00151" name="l00151"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4b162715f9bfd4f0bd815044f47766c8"> 151</a></span><span class="preprocessor">#define SADC_CLK_CTRL_REFH_MSK (0xFu << SADC_CLK_CTRL_REFH_POS)</span></div>
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<div class="line"><a id="l00152" name="l00152"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ad4a51c479047f5fc68b2dec61044e251"> 152</a></span><span class="preprocessor">#define SADC_CLK_CTRL_REFL_POS (12)</span></div>
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<div class="line"><a id="l00153" name="l00153"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa060ca4a9af110b761fa848bcf93eabb"> 153</a></span><span class="preprocessor">#define SADC_CLK_CTRL_REFL_MSK (0xFu << SADC_CLK_CTRL_REFL_POS)</span></div>
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<div class="line"><a id="l00154" name="l00154"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a2520684788ac9bcf3c2f7f43c438b698"> 154</a></span><span class="preprocessor">#define SDRV_ADC_CLK_DIV_MAX 32 </span><span class="comment">/* max clock division ratio */</span><span class="preprocessor"></span></div>
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<div class="line"><a id="l00155" name="l00155"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af009d128c40f44d5f9bd68d8372e802c"> 155</a></span><span class="preprocessor">#define SDRV_ADC_CLK_DIV_MIN 5 </span><span class="comment">/* recommended min clock division ratio */</span><span class="preprocessor"></span></div>
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<div class="line"><a id="l00156" name="l00156"></a><span class="lineno"> 156</span> </div>
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<div class="line"><a id="l00157" name="l00157"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a653b2d05f61ebad606ff544ff2973f77"> 157</a></span><span class="preprocessor">#define SADC_ANA_PARAM_SAMCTRL_POS (0)</span></div>
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<div class="line"><a id="l00158" name="l00158"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1f22fc5fc0c651005651e35d9b1a69ea"> 158</a></span><span class="preprocessor">#define SADC_ANA_PARAM_SAMCTRL_MSK (0x7u << SADC_ANA_PARAM_SAMCTRL_POS)</span></div>
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<div class="line"><a id="l00159" name="l00159"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4280293a1bfc55321a9a4ff9ad06f24c"> 159</a></span><span class="preprocessor">#define SADC_ANA_PARAM_REF_SEL (1u << 4)</span></div>
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<div class="line"><a id="l00160" name="l00160"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa097818019eb1cb3ac2f086df8f2ce42"> 160</a></span><span class="preprocessor">#define SADC_ANA_PARAM_DIFF_SEL (1u << 5)</span></div>
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<div class="line"><a id="l00161" name="l00161"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa883a94fb15dd94cf4c864e7e4af15c6"> 161</a></span><span class="preprocessor">#define SADC_ANA_PARAM_CCP_POS (8)</span></div>
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<div class="line"><a id="l00162" name="l00162"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3004f6e0ea51d050124590fc86fe4f17"> 162</a></span><span class="preprocessor">#define SADC_ANA_PARAM_CCP_MSK (0xFu << SADC_ANA_PARAM_CCP_POS)</span></div>
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<div class="line"><a id="l00163" name="l00163"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0b8a30ddd8b17babf00504c26cddf3a3"> 163</a></span><span class="preprocessor">#define SADC_ANA_PARAM_CCN_POS (12)</span></div>
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<div class="line"><a id="l00164" name="l00164"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a262ee63a2eec54b00b26687d90f0c98f"> 164</a></span><span class="preprocessor">#define SADC_ANA_PARAM_CCN_MSK (0xFu << SADC_ANA_PARAM_CCN_POS)</span></div>
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<div class="line"><a id="l00165" name="l00165"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#adf005213de073347480e18c57defd6e9"> 165</a></span><span class="preprocessor">#define SADC_ANA_PARAM_CCT_POS (16)</span></div>
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<div class="line"><a id="l00166" name="l00166"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a49749f81e3c9aae3ea05c3597e86b38d"> 166</a></span><span class="preprocessor">#define SADC_ANA_PARAM_CCT_MSK (0x1Fu << SADC_ANA_PARAM_CCT_POS)</span></div>
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<div class="line"><a id="l00167" name="l00167"></a><span class="lineno"> 167</span> </div>
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<div class="line"><a id="l00168" name="l00168"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aca2c7556b86bae18e76ca48023cfbe4d"> 168</a></span><span class="preprocessor">#define SADC_MNT_THRES_HIGH_POS (0)</span></div>
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<div class="line"><a id="l00169" name="l00169"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9cc15da101e9051dd786ddbc152db09b"> 169</a></span><span class="preprocessor">#define SADC_MNT_THRES_HIGH_MSK (0xFFFu << SADC_MNT_THRES_HIGH_POS)</span></div>
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<div class="line"><a id="l00170" name="l00170"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1a1c43c7f36c212c75ea9e7f29e46100"> 170</a></span><span class="preprocessor">#define SADC_MNT_THRES_LOW_POS (16)</span></div>
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<div class="line"><a id="l00171" name="l00171"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac185949232ecd25ad03dfd186b165cd7"> 171</a></span><span class="preprocessor">#define SADC_MNT_THRES_LOW_MSK (0xFFFu << SADC_MNT_THRES_LOW_POS)</span></div>
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<div class="line"><a id="l00172" name="l00172"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab3349aa189a4e4f287008b182b2cc3a7"> 172</a></span><span class="preprocessor">#define SADC_MNT_THRES_MODE_POS (28)</span></div>
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<div class="line"><a id="l00173" name="l00173"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aef7263c92cb46eb37c5d5bc8a4c32e0d"> 173</a></span><span class="preprocessor">#define SADC_MNT_THRES_MODE_MSK (0x3u << SADC_MNT_THRES_MODE_POS)</span></div>
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<div class="line"><a id="l00174" name="l00174"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a5788e5d2b13fca4ae43d6a8d4cc43a77"> 174</a></span><span class="preprocessor">#define SADC_MNT_THRES_MODE_HIGHER (0x0u << SADC_MNT_THRES_MODE_POS)</span></div>
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<div class="line"><a id="l00175" name="l00175"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a31f9b68ae675dfbaa81d09b6c130bea1"> 175</a></span><span class="preprocessor">#define SADC_MNT_THRES_MODE_LOWER (0x1u << SADC_MNT_THRES_MODE_POS)</span></div>
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<div class="line"><a id="l00176" name="l00176"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac31702f4555aff6eeb227c009bfe5ceb"> 176</a></span><span class="preprocessor">#define SADC_MNT_THRES_MODE_BETWEEN (0x2u << SADC_MNT_THRES_MODE_POS)</span></div>
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<div class="line"><a id="l00177" name="l00177"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4a2ac0b7b3994350e6c2d482e2690449"> 177</a></span><span class="preprocessor">#define SADC_MNT_THRES_MODE_CLOSE (0x3u << SADC_MNT_THRES_MODE_POS)</span></div>
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<div class="line"><a id="l00178" name="l00178"></a><span class="lineno"> 178</span> </div>
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<div class="line"><a id="l00179" name="l00179"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a6aaa32e16fcbf1425c66c79600a9cef4"> 179</a></span><span class="preprocessor">#define SADC_FIFO_CFG_PACK_M_POS (0)</span></div>
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<div class="line"><a id="l00180" name="l00180"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a909abe1eb827cb116a911c97f712de0e"> 180</a></span><span class="preprocessor">#define SADC_FIFO_CFG_PACK_M_MSK (0x3u << SADC_FIFO_CFG_PACK_M_POS)</span></div>
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<div class="line"><a id="l00181" name="l00181"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ada46da21c8a0af6e29fb9cb5650e17cf"> 181</a></span><span class="preprocessor">#define SADC_FIFO_CFG_PACK_M_16 (0u)</span></div>
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<div class="line"><a id="l00182" name="l00182"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac706e80bd998d68498a014a47a809cb1"> 182</a></span><span class="preprocessor">#define SADC_FIFO_CFG_PACK_M_32 (1u)</span></div>
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<div class="line"><a id="l00183" name="l00183"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#afe029c8b7f1c22149f3a3708de96689e"> 183</a></span><span class="preprocessor">#define SADC_FIFO_CFG_PACK_M_64 (2u)</span></div>
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<div class="line"><a id="l00184" name="l00184"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a406813d6d7fde7e79e6bcdc2268d3d81"> 184</a></span><span class="preprocessor">#define SADC_FIFO_CFG_BYPASS (1u << 4)</span></div>
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<div class="line"><a id="l00185" name="l00185"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#acd74ea64551a516e69d9f8d8966c3546"> 185</a></span><span class="preprocessor">#define SADC_FIFO_CFG_PACK16_AMSEL (1u << 8)</span></div>
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<div class="line"><a id="l00186" name="l00186"></a><span class="lineno"> 186</span> </div>
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<div class="line"><a id="l00187" name="l00187"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a82b92d7e5cfd53ece21b72849cdf507c"> 187</a></span><span class="preprocessor">#define SADC_SUB_FIFO_SADDR_POS (0)</span></div>
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<div class="line"><a id="l00188" name="l00188"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a951932a36470e1f99b23afc513c08e66"> 188</a></span><span class="preprocessor">#define SADC_SUB_FIFO_SADDR_MSK (0x7Fu << SADC_SUB_FIFO_SADDR_POS)</span></div>
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<div class="line"><a id="l00189" name="l00189"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a6f071b3386cf07e43a362a786e33dfa6"> 189</a></span><span class="preprocessor">#define SADC_SUB_FIFO_THRES_POS (8)</span></div>
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<div class="line"><a id="l00190" name="l00190"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a691a14ac227e3fd02a812d04f03d2c50"> 190</a></span><span class="preprocessor">#define SADC_SUB_FIFO_THRES_MSK (0x7Fu << SADC_SUB_FIFO_THRES_POS)</span></div>
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<div class="line"><a id="l00191" name="l00191"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a5f40dbbb8606ce270dd0f062c4c3f1fe"> 191</a></span><span class="preprocessor">#define SADC_SUB_FIFO_RC_EN_POS (16)</span></div>
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<div class="line"><a id="l00192" name="l00192"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a483067bf19f1a68fb319e3942733ae15"> 192</a></span><span class="preprocessor">#define SADC_SUB_FIFO_RC_EN_MSK (0x1Fu << SADC_SUB_FIFO_RC_EN_POS)</span></div>
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<div class="line"><a id="l00193" name="l00193"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3d7c90b8123b5c4d6922f484b1779f2b"> 193</a></span><span class="preprocessor">#define SADC_SUB_FIFO_EMPTY (1u << 24)</span></div>
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<div class="line"><a id="l00194" name="l00194"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a348cd99ebb8a1b398e91c62ebbdc00d7"> 194</a></span><span class="preprocessor">#define SADC_SUB_FIFO_FULL (1u << 25)</span></div>
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<div class="line"><a id="l00195" name="l00195"></a><span class="lineno"> 195</span> </div>
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<div class="line"><a id="l00196" name="l00196"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab46242bd17aeff280edbd7a2edcc1a78"> 196</a></span><span class="preprocessor">#define SADC_DMA_MODE_FIFO3 (1u << 0)</span></div>
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<div class="line"><a id="l00197" name="l00197"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a74b6b8f1568fefa2df8875bc8506f91c"> 197</a></span><span class="preprocessor">#define SADC_DMA_MODE_FIFO2 (1u << 1)</span></div>
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<div class="line"><a id="l00198" name="l00198"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a8b83b6b6f56d9da62c507833c8281966"> 198</a></span><span class="preprocessor">#define SADC_DMA_MODE_FIFO1 (1u << 2)</span></div>
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<div class="line"><a id="l00199" name="l00199"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9eb8567dc4032bbea2c2eb6bf32882cf"> 199</a></span><span class="preprocessor">#define SADC_DMA_MODE_FIFO0 (1u << 3)</span></div>
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<div class="line"><a id="l00200" name="l00200"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#abef7785d3f659a9792497e2028324a65"> 200</a></span><span class="preprocessor">#define SADC_DMA_MODE_RCHT (1u << 4)</span></div>
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<div class="line"><a id="l00201" name="l00201"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9794ebefcbb460b4a2bdadef952f4b33"> 201</a></span><span class="preprocessor">#define SADC_DMA_CH0EN_F3RC3 (1u << 8)</span></div>
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<div class="line"><a id="l00202" name="l00202"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9f44c546f6ea1332096d8e98bc2daa34"> 202</a></span><span class="preprocessor">#define SADC_DMA_CH0EN_F2RC2 (1u << 9)</span></div>
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<div class="line"><a id="l00203" name="l00203"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae649f5e4571ee281bebbd39489712e88"> 203</a></span><span class="preprocessor">#define SADC_DMA_CH0EN_F1RC1 (1u << 10)</span></div>
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<div class="line"><a id="l00204" name="l00204"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3b7b0503b07987c2fad047be8c4a28d7"> 204</a></span><span class="preprocessor">#define SADC_DMA_CH0EN_F0RC0 (1u << 11)</span></div>
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<div class="line"><a id="l00205" name="l00205"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab25911e804ab69bcf9c91c4f2715e52e"> 205</a></span><span class="preprocessor">#define SADC_DMA_CH0EN_RCHT (1u << 12)</span></div>
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<div class="line"><a id="l00206" name="l00206"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae94daf581df5958821d54c7b64977550"> 206</a></span><span class="preprocessor">#define SADC_DMA_CH1EN_F3RC3 (1u << 16)</span></div>
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<div class="line"><a id="l00207" name="l00207"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac74430347d58be6fd13c8cef789aec0f"> 207</a></span><span class="preprocessor">#define SADC_DMA_CH1EN_F2RC2 (1u << 17)</span></div>
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<div class="line"><a id="l00208" name="l00208"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a60895ab814a25219cf8222a82b7f9ca7"> 208</a></span><span class="preprocessor">#define SADC_DMA_CH1EN_F1RC1 (1u << 18)</span></div>
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<div class="line"><a id="l00209" name="l00209"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a044a89b358c4277c4f11974af778cee2"> 209</a></span><span class="preprocessor">#define SADC_DMA_CH1EN_F0RC0 (1u << 19)</span></div>
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<div class="line"><a id="l00210" name="l00210"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae33c50d7bf7bc60a50f012c8786db6e3"> 210</a></span><span class="preprocessor">#define SADC_DMA_CH1EN_RCHT (1u << 20)</span></div>
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<div class="line"><a id="l00211" name="l00211"></a><span class="lineno"> 211</span> </div>
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<div class="line"><a id="l00212" name="l00212"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aecf399ee9a21af59447d4e80b6a466f4"> 212</a></span><span class="preprocessor">#define SADC_ANA_REF_PART1_PD (1U << 0)</span></div>
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<div class="line"><a id="l00213" name="l00213"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab167ed2edefa8ad243d1f8b9747aa1d5"> 213</a></span><span class="preprocessor">#define SADC_ANA_REF_PART1_PDBISA (1U << 1)</span></div>
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<div class="line"><a id="l00214" name="l00214"></a><span class="lineno"> 214</span> </div>
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<div class="line"><a id="l00215" name="l00215"></a><span class="lineno"> 215</span> </div>
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<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"><a class="line" href="structsdrv__adc.html"> 219</a></span><span class="keyword">typedef</span> <span class="keyword">volatile</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc</a> {</div>
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<div class="line"><a id="l00220" name="l00220"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a97ba2f19ffed2f91f8191461ea1c761f"> 220</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a97ba2f19ffed2f91f8191461ea1c761f">soft_rst</a>;</div>
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<div class="line"><a id="l00221" name="l00221"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a017ea7f073911cb32c353b041656fd5a"> 221</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a017ea7f073911cb32c353b041656fd5a">init</a>;</div>
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<div class="line"><a id="l00222" name="l00222"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a81aea7dd826959fd84c35b25179fccfc"> 222</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a81aea7dd826959fd84c35b25179fccfc">dcoc</a>;</div>
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<div class="line"><a id="l00223" name="l00223"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a2747b522456925aba55dc8b686de9d06"> 223</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a2747b522456925aba55dc8b686de9d06">htc</a>;</div>
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<div class="line"><a id="l00224" name="l00224"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#ab20850566cdb4b2a9dbc9902d0e4f12a"> 224</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#ab20850566cdb4b2a9dbc9902d0e4f12a">rcht_entry</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a737982e84051c80ea05427f0ebfeb78c">SDRV_ADC_RCHT_ENTRY_CNT</a>];</div>
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<div class="line"><a id="l00225" name="l00225"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a213f8c68f8c80b7a16582c6a440d3eef"> 225</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a213f8c68f8c80b7a16582c6a440d3eef">rc_timer</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a46f9c35cfa8f56e2127c065fb85341a8">SDRV_ADC_RC_CNT</a>];</div>
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<div class="line"><a id="l00226" name="l00226"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#aeacf6b08f8034e48b477bca1cfd4d4ad"> 226</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#aeacf6b08f8034e48b477bca1cfd4d4ad">rc</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a46f9c35cfa8f56e2127c065fb85341a8">SDRV_ADC_RC_CNT</a>];</div>
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<div class="line"><a id="l00227" name="l00227"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a7ed9b00de564146e55feff160e0025e0"> 227</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a7ed9b00de564146e55feff160e0025e0">int_stat</a>;</div>
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<div class="line"><a id="l00228" name="l00228"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#aa3717de5b519110a706ee6c5b3a2095a"> 228</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#aa3717de5b519110a706ee6c5b3a2095a">int_stat_en</a>;</div>
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<div class="line"><a id="l00229" name="l00229"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a3f7af336f7077bfd200b961772668576"> 229</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a3f7af336f7077bfd200b961772668576">int_sig_en</a>;</div>
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<div class="line"><a id="l00230" name="l00230"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#aef9bb556c1530f5d648fd57e73b9a105"> 230</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#aef9bb556c1530f5d648fd57e73b9a105">reserved1</a>;</div>
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<div class="line"><a id="l00231" name="l00231"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#af14265d915b2e6711672cd9a16b08d36"> 231</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#af14265d915b2e6711672cd9a16b08d36">cor_err_int_stat</a>;</div>
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<div class="line"><a id="l00232" name="l00232"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a85879f9dc411f54efdc9c3ef7593122e"> 232</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a85879f9dc411f54efdc9c3ef7593122e">cor_err_int_stat_en</a>;</div>
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<div class="line"><a id="l00233" name="l00233"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a350f0ed13e9a8021fb2fbe648f8cf2e6"> 233</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a350f0ed13e9a8021fb2fbe648f8cf2e6">cor_err_int_sig_en</a>;</div>
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<div class="line"><a id="l00234" name="l00234"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#ae673672452e4741c4ab7c174af880a87"> 234</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#ae673672452e4741c4ab7c174af880a87">reserved2</a>;</div>
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<div class="line"><a id="l00235" name="l00235"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a6a91b4e4865a927d2accedf57e7a54b8"> 235</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a6a91b4e4865a927d2accedf57e7a54b8">unc_err_int_stat</a>;</div>
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<div class="line"><a id="l00236" name="l00236"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a026805babb21c273f598b8d49c12b5c8"> 236</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a026805babb21c273f598b8d49c12b5c8">unc_err_int_stat_en</a>;</div>
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<div class="line"><a id="l00237" name="l00237"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a6a823622684e9be2493b15268e8e7f92"> 237</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a6a823622684e9be2493b15268e8e7f92">unc_err_int_sig_en</a>;</div>
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<div class="line"><a id="l00238" name="l00238"></a><span class="lineno"> 238</span> </div>
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<div class="line"><a id="l00239" name="l00239"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a514e1114ecaa3ebd42e0eec98dbf952c"> 239</a></span> uint8_t <a class="code hl_variable" href="structsdrv__adc.html#a514e1114ecaa3ebd42e0eec98dbf952c">reserved3</a>[0x100 - 0xDC];</div>
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<div class="line"><a id="l00240" name="l00240"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#aa13d9fa8a8668b44d58f3969b703b3c9"> 240</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#aa13d9fa8a8668b44d58f3969b703b3c9">rc_entry</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a46f9c35cfa8f56e2127c065fb85341a8">SDRV_ADC_RC_CNT</a>][<a class="code hl_define" href="sdrv__adc_8h.html#a51d445309bdc467688c8356851e56796">SDRV_ADC_RC_ENTRY_CNT</a>];</div>
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<div class="line"><a id="l00241" name="l00241"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a14e3d0598b2f6c3a89d445996a5055bc"> 241</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a14e3d0598b2f6c3a89d445996a5055bc">sch_cid_part</a>[<a class="code hl_define" href="sdrv__adc_8h.html#aee4a329d2436077ee9d00f01ede4bc5c">SDRV_ADC_CID_PART_CNT</a>];</div>
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<div class="line"><a id="l00242" name="l00242"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a0e8ab5ae5446680813c31a6d530dfb0f"> 242</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a0e8ab5ae5446680813c31a6d530dfb0f">ts_value</a>;</div>
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<div class="line"><a id="l00243" name="l00243"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#ade1c502cf0967a19aa4a4fc688457222"> 243</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#ade1c502cf0967a19aa4a4fc688457222">sch_tmo</a>;</div>
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<div class="line"><a id="l00244" name="l00244"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a2b96ec1cd914a72d3bf2a55a56e56a99"> 244</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a2b96ec1cd914a72d3bf2a55a56e56a99">reserved4</a>[2];</div>
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<div class="line"><a id="l00245" name="l00245"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#ac5491406e22ea5d46bb2f7b52b02e01d"> 245</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#ac5491406e22ea5d46bb2f7b52b02e01d">sch_cfg</a>;</div>
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<div class="line"><a id="l00246" name="l00246"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a106a56f6272bccfcc2f99a6b4b9b7d54"> 246</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a106a56f6272bccfcc2f99a6b4b9b7d54">sch_prio</a>;</div>
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<div class="line"><a id="l00247" name="l00247"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a087ebb27194283a94b514cbee80bde78"> 247</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a087ebb27194283a94b514cbee80bde78">clk_ctrl</a>;</div>
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<div class="line"><a id="l00248" name="l00248"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a10cd5986fafd953f3d1eecb22283dc58"> 248</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a10cd5986fafd953f3d1eecb22283dc58">reserved5</a>;</div>
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<div class="line"><a id="l00249" name="l00249"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a353dc851fc0cfb474f93c340d92e098e"> 249</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a353dc851fc0cfb474f93c340d92e098e">ana_ref_cfg1</a>;</div>
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<div class="line"><a id="l00250" name="l00250"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a4f6d9c8dadfb38d7c44878cd6ae7f42f"> 250</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a4f6d9c8dadfb38d7c44878cd6ae7f42f">ana_ref_cfg2</a>;</div>
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<div class="line"><a id="l00251" name="l00251"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#aafd17742ae2123c2b70c520f3a179d66"> 251</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#aafd17742ae2123c2b70c520f3a179d66">cont_mode</a>;</div>
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<div class="line"><a id="l00252" name="l00252"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#afec7a0ef2e446e207bcf8c54bce6e3c2"> 252</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#afec7a0ef2e446e207bcf8c54bce6e3c2">cont_mode1</a>;</div>
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<div class="line"><a id="l00253" name="l00253"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a66192fdcd8a07904bb496cfe6d875e77"> 253</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a66192fdcd8a07904bb496cfe6d875e77">ana_para</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a4953bee4734838559dc9a78ff142c085">SDRV_ADC_ANA_PARAM_CNT</a>];</div>
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<div class="line"><a id="l00254" name="l00254"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a426d140a6ce57d5dddb3cd70f06a54d5"> 254</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a426d140a6ce57d5dddb3cd70f06a54d5">mnt_single</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a7ccedb5cdf48c8eaf62761599e1e0a94">SDRV_ADC_MNT_SINGLE_CNT</a>];</div>
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<div class="line"><a id="l00255" name="l00255"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a58bb05451acc6704e96dd3bce5c57cc3"> 255</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a58bb05451acc6704e96dd3bce5c57cc3">mnt_cont</a>;</div>
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<div class="line"><a id="l00256" name="l00256"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a665ee01cc26f8f334c65ef1e320cc243"> 256</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a665ee01cc26f8f334c65ef1e320cc243">mnt_thrd_single</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a7ccedb5cdf48c8eaf62761599e1e0a94">SDRV_ADC_MNT_SINGLE_CNT</a>];</div>
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<div class="line"><a id="l00257" name="l00257"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a705ff64c7f08ec953f0a512256aa5ac5"> 257</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a705ff64c7f08ec953f0a512256aa5ac5">mnt_thrd_cont</a>;</div>
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<div class="line"><a id="l00258" name="l00258"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#af3ad7fbb98539c2233d6cfbba6e7a4af"> 258</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#af3ad7fbb98539c2233d6cfbba6e7a4af">reserved6</a>[2];</div>
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<div class="line"><a id="l00259" name="l00259"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#ac561b0fc6c903d291607ad5aad00cce4"> 259</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#ac561b0fc6c903d291607ad5aad00cce4">mnt_cont_cfg</a>;</div>
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<div class="line"><a id="l00260" name="l00260"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a92c09e83b4543b25e880eeb37b589556"> 260</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a92c09e83b4543b25e880eeb37b589556">fifo_cfg</a>;</div>
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<div class="line"><a id="l00261" name="l00261"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a27ccc5ae7f058f59d09bb8100687f4b6"> 261</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a27ccc5ae7f058f59d09bb8100687f4b6">sub_fifo</a>[<a class="code hl_define" href="sdrv__adc_8h.html#aa471811023c116f054071db1ec707b45">SDRV_ADC_SUB_FIFO_CNT</a>];</div>
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<div class="line"><a id="l00262" name="l00262"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a9f6b7002711611e1fd3eca3856d5dea2"> 262</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a9f6b7002711611e1fd3eca3856d5dea2">dma_cfg</a>;</div>
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<div class="line"><a id="l00263" name="l00263"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a83a031f6172482a0911bc2ac14217ebe"> 263</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a83a031f6172482a0911bc2ac14217ebe">reserved7</a>;</div>
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<div class="line"><a id="l00264" name="l00264"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#aa057249336f6730cecbac0320a93d891"> 264</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#aa057249336f6730cecbac0320a93d891">fifo</a>[<a class="code hl_define" href="sdrv__adc_8h.html#aa471811023c116f054071db1ec707b45">SDRV_ADC_SUB_FIFO_CNT</a>][16];</div>
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<div class="line"><a id="l00265" name="l00265"></a><span class="lineno"> 265</span> </div>
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<div class="line"><a id="l00266" name="l00266"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a30c83125833dad1d507384924af0eb30"> 266</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a30c83125833dad1d507384924af0eb30">reg_prty_err_int_stat</a>;</div>
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<div class="line"><a id="l00267" name="l00267"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a6ab9c2b41931d556f97367075755eb51"> 267</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a6ab9c2b41931d556f97367075755eb51">reg_prty_err_int_stat_en</a>;</div>
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<div class="line"><a id="l00268" name="l00268"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a0965fc01a04ea59d7b5ad69483b26bd3"> 268</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a0965fc01a04ea59d7b5ad69483b26bd3">reg_prty_err_int_sig_en</a>;</div>
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<div class="line"><a id="l00269" name="l00269"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a05264520b4a242d894d9a9b51fc3d998"> 269</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a05264520b4a242d894d9a9b51fc3d998">reserved8</a>;</div>
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<div class="line"><a id="l00270" name="l00270"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a1eb3a1a7b8d073219b4f76c9446d9f89"> 270</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a1eb3a1a7b8d073219b4f76c9446d9f89">fusa_cor_err_int_stat</a>;</div>
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<div class="line"><a id="l00271" name="l00271"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a6a663889846e34d019764df6e389b3b9"> 271</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a6a663889846e34d019764df6e389b3b9">fusa_cor_err_int_stat_en</a>;</div>
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<div class="line"><a id="l00272" name="l00272"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a8fa2182ad6c5fedee6172ae515b50ed1"> 272</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a8fa2182ad6c5fedee6172ae515b50ed1">fusa_cor_err_int_sig_en</a>;</div>
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<div class="line"><a id="l00273" name="l00273"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#ace8c8c834d463935150174e9f176ffaf"> 273</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#ace8c8c834d463935150174e9f176ffaf">reserved9</a>;</div>
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<div class="line"><a id="l00274" name="l00274"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#abca5883a4b47a03eb2fd1580b04c7d79"> 274</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#abca5883a4b47a03eb2fd1580b04c7d79">fusa_unc_err_int_stat</a>;</div>
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<div class="line"><a id="l00275" name="l00275"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a05f4f65a258b7574f07c9fe286caeaf0"> 275</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a05f4f65a258b7574f07c9fe286caeaf0">fusa_unc_err_int_stat_en</a>;</div>
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<div class="line"><a id="l00276" name="l00276"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a694e80da568e54ecabe5de5dd04cd036"> 276</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a694e80da568e54ecabe5de5dd04cd036">fusa_unc_err_int_sig_en</a>;</div>
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<div class="line"><a id="l00277" name="l00277"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#acf6b73817d007178360e19e93eace418"> 277</a></span> uint8_t <a class="code hl_variable" href="structsdrv__adc.html#acf6b73817d007178360e19e93eace418">reserved10</a>[0x460 - 0x42C];</div>
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<div class="line"><a id="l00278" name="l00278"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a8b3e66724f273b98a0b43099ea56e4a0"> 278</a></span> uint64_t <a class="code hl_variable" href="structsdrv__adc.html#a8b3e66724f273b98a0b43099ea56e4a0">conv_rcht</a>;</div>
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<div class="line"><a id="l00279" name="l00279"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a14162d850ff789542272c27090900bb2"> 279</a></span> uint64_t <a class="code hl_variable" href="structsdrv__adc.html#a14162d850ff789542272c27090900bb2">conv_rc</a>[<a class="code hl_define" href="sdrv__adc_8h.html#a46f9c35cfa8f56e2127c065fb85341a8">SDRV_ADC_RC_CNT</a>];</div>
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<div class="line"><a id="l00280" name="l00280"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#aa6eca1fc8d656da93712f4450a53d771"> 280</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#aa6eca1fc8d656da93712f4450a53d771">ate_test</a>;</div>
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<div class="line"><a id="l00281" name="l00281"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a1f302ae1bb51f0fee5b59ffe2c6dcc15"> 281</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a1f302ae1bb51f0fee5b59ffe2c6dcc15">ate_test_cfg</a>;</div>
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<div class="line"><a id="l00282" name="l00282"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a5e8874e5f0697db61f24c48db7f2b5ce"> 282</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a5e8874e5f0697db61f24c48db7f2b5ce">dbg_reg_ctrl</a>;</div>
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<div class="line"><a id="l00283" name="l00283"></a><span class="lineno"><a class="line" href="structsdrv__adc.html#a9164715389721fbe6735572e7c1f52ae"> 283</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc.html#a9164715389721fbe6735572e7c1f52ae">dbg_reg</a>[10];</div>
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<div class="line"><a id="l00284" name="l00284"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439"> 284</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a>;</div>
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<div class="line"><a id="l00285" name="l00285"></a><span class="lineno"> 285</span> </div>
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<div class="line"><a id="l00286" name="l00286"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3b08d1cfeeb580e335a3552051a530e7"> 286</a></span><span class="preprocessor">#define SDRV_ADC_RC_TMR_MODE_SLAVE 1</span></div>
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<div class="line"><a id="l00287" name="l00287"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0991070fdbd51dab8337264b09636188"> 287</a></span><span class="preprocessor">#define SDRV_ADC_RC_TMR_MODE_MASTER 0</span></div>
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<div class="line"><a id="l00288" name="l00288"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac4077c092e157418a6bf3cb62df733df"> 288</a></span><span class="preprocessor">#define SDRV_ADC_RC_TRG_MODE_SW 1</span></div>
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<div class="line"><a id="l00289" name="l00289"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a5533638a48d63504a8152ba9a2a071c7"> 289</a></span><span class="preprocessor">#define SDRV_ADC_RC_TRG_MODE_HW 0</span></div>
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<div class="line"><a id="l00293" name="l00293"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html"> 293</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__adc__rc__cfg.html">sdrv_adc_rc_cfg</a> {</div>
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<div class="line"><a id="l00294" name="l00294"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#ae08d9d7b35b6b3ba531ad82fc4784ae8"> 294</a></span> uint16_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#ae08d9d7b35b6b3ba531ad82fc4784ae8">terminal</a>; </div>
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<div class="line"><a id="l00295" name="l00295"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#a5703c55ad6579df4ab41933e08e08b8f"> 295</a></span> uint16_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#a5703c55ad6579df4ab41933e08e08b8f">compare</a>; </div>
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<div class="line"><a id="l00296" name="l00296"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#aba2468d4f8e7dc94c66e86319b3ab377"> 296</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#aba2468d4f8e7dc94c66e86319b3ab377">q_cur</a> : 4; </div>
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<div class="line"><a id="l00297" name="l00297"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#a42f7227f684b3c010e7bf45ad940e956"> 297</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#a42f7227f684b3c010e7bf45ad940e956">q_start</a> : 4; </div>
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<div class="line"><a id="l00298" name="l00298"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#a885790ee0dbe54bb92c2deeb32971dbe"> 298</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#a885790ee0dbe54bb92c2deeb32971dbe">q_end</a> : 4; </div>
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<div class="line"><a id="l00299" name="l00299"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#a3e57c2ef1c3ffb36722f000cc1156824"> 299</a></span> uint32_t : 1;</div>
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<div class="line"><a id="l00300" name="l00300"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#a4c361128d17ad22a12b73ee568eaf9f1"> 300</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#a4c361128d17ad22a12b73ee568eaf9f1">tmr_mode</a> : 1; </div>
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<div class="line"><a id="l00301" name="l00301"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#a297412a5c0d457f05d5d52407128b0c0"> 301</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#a297412a5c0d457f05d5d52407128b0c0">trg_mode</a> : 1; </div>
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<div class="line"><a id="l00302" name="l00302"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#a6712ba6dd1d5b43d2d56ff8ac4e275a7"> 302</a></span> uint32_t : 2;</div>
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<div class="line"><a id="l00303" name="l00303"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__cfg.html#acdbc7c7daf20f35bcecb28afff5d42af"> 303</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__cfg.html#acdbc7c7daf20f35bcecb28afff5d42af">trg_en</a> : 1; </div>
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<div class="line"><a id="l00304" name="l00304"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a02bbaea955117f943305e5af43d906d0"> 304</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#a02bbaea955117f943305e5af43d906d0">sdrv_adc_rc_cfg_t</a>;</div>
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<div class="line"><a id="l00305" name="l00305"></a><span class="lineno"> 305</span> </div>
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<div class="line"><a id="l00306" name="l00306"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a5e342a8a75005b616cd32c2e0e179683"> 306</a></span><span class="preprocessor">#define SDRV_ADC_RCHT_REPEAT_1 0</span></div>
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<div class="line"><a id="l00307" name="l00307"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4c27a8f28ef85fd4cbb3fd5960ca6524"> 307</a></span><span class="preprocessor">#define SDRV_ADC_RCHT_REPEAT_2 1</span></div>
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<div class="line"><a id="l00308" name="l00308"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#abbeeb1ba6bb6911055d671e43e2e15ec"> 308</a></span><span class="preprocessor">#define SDRV_ADC_RCHT_REPEAT_4 2</span></div>
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<div class="line"><a id="l00309" name="l00309"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#abac14c41c4a46b0911f3efecb714b532"> 309</a></span><span class="preprocessor">#define SDRV_ADC_RCHT_REPEAT_8 3</span></div>
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<div class="line"><a id="l00310" name="l00310"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0683d7dcd2df219c2a3931cea5f38aca"> 310</a></span><span class="preprocessor">#define SDRV_ADC_RCHT_REPEAT_16 4</span></div>
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<div class="line"><a id="l00314" name="l00314"></a><span class="lineno"><a class="line" href="structsdrv__adc__rcht__entry__cfg.html"> 314</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__adc__rcht__entry__cfg.html">sdrv_adc_rcht_entry_cfg</a> {</div>
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<div class="line"><a id="l00315" name="l00315"></a><span class="lineno"><a class="line" href="structsdrv__adc__rcht__entry__cfg.html#a0c72dd5e18823aef187a34137983c9a6"> 315</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rcht__entry__cfg.html#a0c72dd5e18823aef187a34137983c9a6">channel</a> : 9; </div>
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<div class="line"><a id="l00316" name="l00316"></a><span class="lineno"><a class="line" href="structsdrv__adc__rcht__entry__cfg.html#a3e57c2ef1c3ffb36722f000cc1156824"> 316</a></span> uint32_t : 3;</div>
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<div class="line"><a id="l00317" name="l00317"></a><span class="lineno"><a class="line" href="structsdrv__adc__rcht__entry__cfg.html#a8177f6ce9c89a271aab458d8a3cff22a"> 317</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rcht__entry__cfg.html#a8177f6ce9c89a271aab458d8a3cff22a">cfg_sel</a> : 4; </div>
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<div class="line"><a id="l00318" name="l00318"></a><span class="lineno"><a class="line" href="structsdrv__adc__rcht__entry__cfg.html#a6712ba6dd1d5b43d2d56ff8ac4e275a7"> 318</a></span> uint32_t : 8;</div>
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<div class="line"><a id="l00319" name="l00319"></a><span class="lineno"><a class="line" href="structsdrv__adc__rcht__entry__cfg.html#aa9dd4e7fdc696e83ff806733e72e0752"> 319</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rcht__entry__cfg.html#aa9dd4e7fdc696e83ff806733e72e0752">repeat_cnt</a> : 3; </div>
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<div class="line"><a id="l00320" name="l00320"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a09cc3a4372f54206a7b1ea4a1d4e5273"> 320</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#a09cc3a4372f54206a7b1ea4a1d4e5273">sdrv_adc_rcht_entry_cfg_t</a>;</div>
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<div class="line"><a id="l00321" name="l00321"></a><span class="lineno"> 321</span> </div>
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<div class="line"><a id="l00322" name="l00322"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a7802127796aa1d580f47ad49ad2988a8"> 322</a></span><span class="preprocessor">#define SDRV_ADC_RC_REPM_SW_TRG 1</span></div>
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<div class="line"><a id="l00323" name="l00323"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a68ebd436da4e4523c766aaa919bc4438"> 323</a></span><span class="preprocessor">#define SDRV_ADC_RC_REPM_HW_TRG 0</span></div>
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<div class="line"><a id="l00327" name="l00327"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__entry__cfg.html"> 327</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__adc__rc__entry__cfg.html">sdrv_adc_rc_entry_cfg</a> {</div>
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<div class="line"><a id="l00328" name="l00328"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__entry__cfg.html#a0c72dd5e18823aef187a34137983c9a6"> 328</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__entry__cfg.html#a0c72dd5e18823aef187a34137983c9a6">channel</a> : 9; </div>
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<div class="line"><a id="l00329" name="l00329"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__entry__cfg.html#a3e57c2ef1c3ffb36722f000cc1156824"> 329</a></span> uint32_t : 3;</div>
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<div class="line"><a id="l00330" name="l00330"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__entry__cfg.html#a8177f6ce9c89a271aab458d8a3cff22a"> 330</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__entry__cfg.html#a8177f6ce9c89a271aab458d8a3cff22a">cfg_sel</a> : 4; </div>
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<div class="line"><a id="l00331" name="l00331"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__entry__cfg.html#aad754b0d9c348a99248025cd2991e55b"> 331</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__entry__cfg.html#aad754b0d9c348a99248025cd2991e55b">repeat_mode</a> : 1; </div>
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<div class="line"><a id="l00332" name="l00332"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__entry__cfg.html#a6712ba6dd1d5b43d2d56ff8ac4e275a7"> 332</a></span> uint32_t : 7;</div>
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<div class="line"><a id="l00333" name="l00333"></a><span class="lineno"><a class="line" href="structsdrv__adc__rc__entry__cfg.html#aa9dd4e7fdc696e83ff806733e72e0752"> 333</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__rc__entry__cfg.html#aa9dd4e7fdc696e83ff806733e72e0752">repeat_cnt</a> : 5; </div>
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<div class="line"><a id="l00334" name="l00334"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1141e84557fc51ffe9d03ce24683e86d"> 334</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#a1141e84557fc51ffe9d03ce24683e86d">sdrv_adc_rc_entry_cfg_t</a>;</div>
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<div class="line"><a id="l00335" name="l00335"></a><span class="lineno"> 335</span> </div>
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<div class="line"><a id="l00336" name="l00336"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a85b1b644f710036bc7903feb87ce9dab"> 336</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_2D5 0</span></div>
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<div class="line"><a id="l00337" name="l00337"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a17efd45c1f50c42ce9246732cff07084"> 337</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_4D5 1</span></div>
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<div class="line"><a id="l00338" name="l00338"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a27ae8747e88462c5e751c8a400d6ee45"> 338</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_6D5 2</span></div>
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<div class="line"><a id="l00339" name="l00339"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aee4e2f098e5c8ad932088bf6c1ba9e0d"> 339</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_10D5 3</span></div>
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<div class="line"><a id="l00340" name="l00340"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae03ad0d6456ed35d695353e3a9444f80"> 340</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_18D5 4</span></div>
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<div class="line"><a id="l00341" name="l00341"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a843235649d37e969b3fcaa1e2375d815"> 341</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_34D5 5</span></div>
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<div class="line"><a id="l00342" name="l00342"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0597b054f50c0f9b4baf9b4b8e413e12"> 342</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_66D5 6</span></div>
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<div class="line"><a id="l00343" name="l00343"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9344775f859283529f02065bf76fdebf"> 343</a></span><span class="preprocessor">#define SDRV_ADC_SAMPLE_TIME_130D5 7</span></div>
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<div class="line"><a id="l00344" name="l00344"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1aeb00c30f3c3a09330dd5fa178a0b77"> 344</a></span><span class="preprocessor">#define SDRV_ADC_REF_VREFP2 1</span></div>
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<div class="line"><a id="l00345" name="l00345"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa511b02633a24d630cf2a53086a75555"> 345</a></span><span class="preprocessor">#define SDRV_ADC_REF_VREFP1 0</span></div>
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<div class="line"><a id="l00346" name="l00346"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#afbf7f8af43c1ef4af7c7afb61ed8ac60"> 346</a></span><span class="preprocessor">#define SDRV_ADC_INPUT_DIFF 1</span></div>
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<div class="line"><a id="l00347" name="l00347"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1ceaad113fddf408d38d8a753d750edb"> 347</a></span><span class="preprocessor">#define SDRV_ADC_INPUT_SINGLE 0</span></div>
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<div class="line"><a id="l00351" name="l00351"></a><span class="lineno"><a class="line" href="structsdrv__adc__ana__param__cfg.html"> 351</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__adc__ana__param__cfg.html">sdrv_adc_ana_param_cfg</a> {</div>
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<div class="line"><a id="l00352" name="l00352"></a><span class="lineno"><a class="line" href="structsdrv__adc__ana__param__cfg.html#ab322aee7201d11451cb55e2f551e72cb"> 352</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__ana__param__cfg.html#ab322aee7201d11451cb55e2f551e72cb">sample_time</a> : 3; </div>
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<div class="line"><a id="l00353" name="l00353"></a><span class="lineno"><a class="line" href="structsdrv__adc__ana__param__cfg.html#a3e57c2ef1c3ffb36722f000cc1156824"> 353</a></span> uint32_t : 1;</div>
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<div class="line"><a id="l00354" name="l00354"></a><span class="lineno"><a class="line" href="structsdrv__adc__ana__param__cfg.html#a0928e4e0206941e7e571b40e3bfbcff4"> 354</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__ana__param__cfg.html#a0928e4e0206941e7e571b40e3bfbcff4">ref_sel</a> : 1; </div>
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<div class="line"><a id="l00355" name="l00355"></a><span class="lineno"><a class="line" href="structsdrv__adc__ana__param__cfg.html#a2a038e9af60b52d9c943ed4d69299df8"> 355</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__ana__param__cfg.html#a2a038e9af60b52d9c943ed4d69299df8">input_mode</a> : 1; </div>
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<div class="line"><a id="l00356" name="l00356"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a683ba426fdb771185750788d9c7b457d"> 356</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#a683ba426fdb771185750788d9c7b457d">sdrv_adc_ana_param_cfg_t</a>;</div>
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<div class="line"><a id="l00357" name="l00357"></a><span class="lineno"> 357</span> </div>
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<div class="line"><a id="l00358" name="l00358"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aacf9b6828066b058d08db4510c567745"> 358</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_MODE_PACK16 (0u)</span></div>
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<div class="line"><a id="l00359" name="l00359"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a345b9f2fc01788393328ee238b98d248"> 359</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_MODE_PACK32 (1u)</span></div>
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<div class="line"><a id="l00360" name="l00360"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a91952270c3530b8e55fbad182ac8b786"> 360</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_MODE_PACK64 (2u)</span></div>
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<div class="line"><a id="l00364" name="l00364"></a><span class="lineno"><a class="line" href="structsdrv__adc__fifo__cfg.html"> 364</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__adc__fifo__cfg.html">sdrv_adc_fifo_cfg</a> {</div>
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<div class="line"><a id="l00365" name="l00365"></a><span class="lineno"><a class="line" href="structsdrv__adc__fifo__cfg.html#aba76cbd2b38ec510401226a5dfde6d62"> 365</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__fifo__cfg.html#aba76cbd2b38ec510401226a5dfde6d62">pack_mode</a> : 2; </div>
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<div class="line"><a id="l00366" name="l00366"></a><span class="lineno"><a class="line" href="structsdrv__adc__fifo__cfg.html#a3e57c2ef1c3ffb36722f000cc1156824"> 366</a></span> uint32_t : 2;</div>
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<div class="line"><a id="l00367" name="l00367"></a><span class="lineno"><a class="line" href="structsdrv__adc__fifo__cfg.html#a876eac8f30e5af2a8e4ea03f9d2ed460"> 367</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__fifo__cfg.html#a876eac8f30e5af2a8e4ea03f9d2ed460">bypass</a> : 1; </div>
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<div class="line"><a id="l00368" name="l00368"></a><span class="lineno"><a class="line" href="structsdrv__adc__fifo__cfg.html#a6712ba6dd1d5b43d2d56ff8ac4e275a7"> 368</a></span> uint32_t : 3;</div>
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<div class="line"><a id="l00369" name="l00369"></a><span class="lineno"><a class="line" href="structsdrv__adc__fifo__cfg.html#a6c156f01db5738ab0f99475c2df24015"> 369</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__fifo__cfg.html#a6c156f01db5738ab0f99475c2df24015">pack16_chnl</a> : 1; </div>
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<div class="line"><a id="l00370" name="l00370"></a><span class="lineno"><a class="line" href="structsdrv__adc__fifo__cfg.html#aa63db45b7c328128e07cd4d0f86f59df"> 370</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__fifo__cfg.html#aa63db45b7c328128e07cd4d0f86f59df">threshold</a> : 7; </div>
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<div class="line"><a id="l00371" name="l00371"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0b07b6d131e9c574518d2ee2ffd85338"> 371</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#a0b07b6d131e9c574518d2ee2ffd85338">sdrv_adc_fifo_cfg_t</a>;</div>
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<div class="line"><a id="l00372" name="l00372"></a><span class="lineno"> 372</span> </div>
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<div class="line"><a id="l00376" name="l00376"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af10745a827916162bcece1029fedaa95"> 376</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_INPUT_RC3 (1u << 0)</span></div>
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<div class="line"><a id="l00377" name="l00377"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ab7f62e8e00d5adce1646f5646392e71c"> 377</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_INPUT_RC2 (1u << 1)</span></div>
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<div class="line"><a id="l00378" name="l00378"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af6430a15c5b1f823b6ee9026e73fcb91"> 378</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_INPUT_RC1 (1u << 2)</span></div>
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<div class="line"><a id="l00379" name="l00379"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae919dd3420e4c8b5048e54286206e2fd"> 379</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_INPUT_RC0 (1u << 3)</span></div>
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<div class="line"><a id="l00380" name="l00380"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a01cd69885b0bd8331a78f8e890e28026"> 380</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_INPUT_RCHT (1u << 4)</span></div>
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<div class="line"><a id="l00381" name="l00381"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aed650ee2a4cd6121dbb10b7506e2e719"> 381</a></span><span class="preprocessor">#define SDRV_ADC_FIFO_INPUT_ALL (0x1Fu)</span></div>
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<div class="line"><a id="l00382" name="l00382"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a805f76630226d47d9cb22030775b1599"> 382</a></span><span class="keyword">typedef</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> <a class="code hl_typedef" href="sdrv__adc_8h.html#a805f76630226d47d9cb22030775b1599">sdrv_adc_fifo_rc_cfg_t</a>;</div>
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<div class="line"><a id="l00383" name="l00383"></a><span class="lineno"> 383</span> </div>
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<div class="line"><a id="l00387" name="l00387"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1366e74330511580a609dbbf6ae692f7"> 387</a></span><span class="preprocessor">#define SDRV_ADC_START_RC0 (1u << 0)</span></div>
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<div class="line"><a id="l00388" name="l00388"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a18382e748d52a9f6157bbf04b32c0a81"> 388</a></span><span class="preprocessor">#define SDRV_ADC_START_RC1 (1u << 1)</span></div>
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<div class="line"><a id="l00389" name="l00389"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a26dc0d28c5b79eafe2164f045316a3fe"> 389</a></span><span class="preprocessor">#define SDRV_ADC_START_RC2 (1u << 2)</span></div>
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<div class="line"><a id="l00390" name="l00390"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a351fbd55109b1ca3b90aaab1ec1595e5"> 390</a></span><span class="preprocessor">#define SDRV_ADC_START_RC3 (1u << 3)</span></div>
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<div class="line"><a id="l00391" name="l00391"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1b8b6ce0003f7b4c67e553b9ba8788fe"> 391</a></span><span class="preprocessor">#define SDRV_ADC_START_ALL ((1u << SDRV_ADC_RC_CNT) - 1)</span></div>
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<div class="line"><a id="l00392" name="l00392"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae627ae80d38c47ffbc81d4118edee267"> 392</a></span><span class="keyword">typedef</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> <a class="code hl_typedef" href="sdrv__adc_8h.html#ae627ae80d38c47ffbc81d4118edee267">sdrv_adc_rc_start_flag_t</a>;</div>
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<div class="line"><a id="l00393" name="l00393"></a><span class="lineno"> 393</span> </div>
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<div class="line"><a id="l00397" name="l00397"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08"> 397</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08">sdrv_adc_dma_src_cfg</a> {</div>
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<div class="line"><a id="l00398" name="l00398"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a4b3534cd759c24b88c4f4b44eb18223c"> 398</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a4b3534cd759c24b88c4f4b44eb18223c">SDRV_ADC_DMA_SRC_FIFO</a> = 0, </div>
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<div class="line"><a id="l00399" name="l00399"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08ae04dd33b97968d97667db7aa0c34d846"> 399</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08ae04dd33b97968d97667db7aa0c34d846">SDRV_ADC_DMA_SRC_RC0</a>, </div>
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<div class="line"><a id="l00400" name="l00400"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a0efb5fe1dd0aac8fce67a7e6d74c7b19"> 400</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a0efb5fe1dd0aac8fce67a7e6d74c7b19">SDRV_ADC_DMA_SRC_RC1</a>, </div>
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<div class="line"><a id="l00401" name="l00401"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a6965491462daa06241b0ee7c6cf15ba3"> 401</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a6965491462daa06241b0ee7c6cf15ba3">SDRV_ADC_DMA_SRC_RC2</a>, </div>
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<div class="line"><a id="l00402" name="l00402"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a965e814cb0cb9e230509a3c5d566aac0"> 402</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a965e814cb0cb9e230509a3c5d566aac0">SDRV_ADC_DMA_SRC_RC3</a>, </div>
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<div class="line"><a id="l00403" name="l00403"></a><span class="lineno"> 403</span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08ad5a5e117c3dda438e4946d3c3004f81d">SDRV_ADC_DMA_SRC_RCHT</a> </div>
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<div class="line"><a id="l00404" name="l00404"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#afd230a1e8587f6b265a598928270f5b4"> 404</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#afd230a1e8587f6b265a598928270f5b4">sdrv_adc_dma_src_cfg_t</a>;</div>
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<div class="line"><a id="l00405" name="l00405"></a><span class="lineno"> 405</span> </div>
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<div class="line"><a id="l00409" name="l00409"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1d"> 409</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1d">sdrv_adc_sync_cid</a> {</div>
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<div class="line"><a id="l00410" name="l00410"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1da0a747f587d00801b289b452e47bdecde"> 410</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1da0a747f587d00801b289b452e47bdecde">SDRV_ADC_SYNC_CID_RC0</a> = 0,</div>
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<div class="line"><a id="l00411" name="l00411"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dab724a4ca505979a4585e3c4ac9977a78"> 411</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dab724a4ca505979a4585e3c4ac9977a78">SDRV_ADC_SYNC_CID_RC1</a>,</div>
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<div class="line"><a id="l00412" name="l00412"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dabade9d7b2484a44b621d4d9edd75ccfb"> 412</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dabade9d7b2484a44b621d4d9edd75ccfb">SDRV_ADC_SYNC_CID_RC2</a>,</div>
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<div class="line"><a id="l00413" name="l00413"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1daebf1105ffd48ad254c75f442d0a7b436"> 413</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1daebf1105ffd48ad254c75f442d0a7b436">SDRV_ADC_SYNC_CID_RC3</a>,</div>
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<div class="line"><a id="l00414" name="l00414"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1daee4caecf85fe4d412b682e4e8e2e5326"> 414</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1daee4caecf85fe4d412b682e4e8e2e5326">SDRV_ADC_SYNC_CID_RCHT</a>,</div>
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<div class="line"><a id="l00415" name="l00415"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dadbc645f6ecfbdf9aa5d91a3f1edcfa13"> 415</a></span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dadbc645f6ecfbdf9aa5d91a3f1edcfa13">SDRV_ADC_SYNC_CID_MERGE</a>,</div>
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<div class="line"><a id="l00416" name="l00416"></a><span class="lineno"> 416</span> <a class="code hl_enumvalue" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1da35786a6428d3b87144e0d65a31f2168d">SDRV_ADC_SYNC_CID_IDLE</a></div>
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<div class="line"><a id="l00417" name="l00417"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1da35786a6428d3b87144e0d65a31f2168d"> 417</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#a4fd5b7141b1e383619fd96cb5bd273bf">sdrv_adc_sync_cid_t</a>;</div>
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<div class="line"><a id="l00418" name="l00418"></a><span class="lineno"> 418</span> </div>
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<div class="line"><a id="l00422" name="l00422"></a><span class="lineno"><a class="line" href="structsdrv__adc__sync__cfg.html"> 422</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdrv__adc__sync__cfg.html">sdrv_adc_sync_cfg</a> {</div>
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<div class="line"><a id="l00423" name="l00423"></a><span class="lineno"><a class="line" href="structsdrv__adc__sync__cfg.html#ad67660ae831080c280be0b81d9a5630d"> 423</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__sync__cfg.html#ad67660ae831080c280be0b81d9a5630d">slot_itvl</a> : 8; </div>
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<div class="line"><a id="l00424" name="l00424"></a><span class="lineno"><a class="line" href="structsdrv__adc__sync__cfg.html#a3d7b778b008c356ca71b625091650226"> 424</a></span> uint32_t <a class="code hl_variable" href="structsdrv__adc__sync__cfg.html#a3d7b778b008c356ca71b625091650226">itvl_const</a> : 1; </div>
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<div class="line"><a id="l00425" name="l00425"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac3f3c6d2d256abeec5c9b07e5684d8b4"> 425</a></span>} <a class="code hl_typedef" href="sdrv__adc_8h.html#ac3f3c6d2d256abeec5c9b07e5684d8b4">sdrv_adc_sync_cfg_t</a>;</div>
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<div class="line"><a id="l00426" name="l00426"></a><span class="lineno"> 426</span> </div>
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<div class="line"><a id="l00427" name="l00427"></a><span class="lineno"> 427</span> </div>
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<div class="line"><a id="l00440" name="l00440"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a014d5e2d0e7860dcc27d57da72e29455"> 440</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a014d5e2d0e7860dcc27d57da72e29455">sdrv_adc_init</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> clk_div);</div>
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<div class="line"><a id="l00441" name="l00441"></a><span class="lineno"> 441</span> </div>
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<div class="line"><a id="l00448" name="l00448"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a922f3b59c2f4c1a0b5b6aaf87830b4f0"> 448</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a922f3b59c2f4c1a0b5b6aaf87830b4f0">sdrv_adc_set_dc_offset</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, int16_t offset);</div>
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<div class="line"><a id="l00449" name="l00449"></a><span class="lineno"> 449</span> </div>
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<div class="line"><a id="l00456" name="l00456"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ae8f38b79f83a962f6f878a743812df53"> 456</a></span>int16_t <a class="code hl_function" href="sdrv__adc_8h.html#ae8f38b79f83a962f6f878a743812df53">sdrv_adc_get_dc_offset</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00457" name="l00457"></a><span class="lineno"> 457</span> </div>
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<div class="line"><a id="l00465" name="l00465"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aebcf37a042636cf308ae559912ed87f0"> 465</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#aebcf37a042636cf308ae559912ed87f0">sdrv_adc_set_slave_mode</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00466" name="l00466"></a><span class="lineno"> 466</span> </div>
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<div class="line"><a id="l00474" name="l00474"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0c0ed133fe569190d344eb5adf21648d"> 474</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a0c0ed133fe569190d344eb5adf21648d">sdrv_adc_clr_slave_mode</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00475" name="l00475"></a><span class="lineno"> 475</span> </div>
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<div class="line"><a id="l00482" name="l00482"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a6682860213962028a19c587a68a36469"> 482</a></span>uint32_t <a class="code hl_function" href="sdrv__adc_8h.html#a6682860213962028a19c587a68a36469">sdrv_adc_read_int_status</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00483" name="l00483"></a><span class="lineno"> 483</span> </div>
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<div class="line"><a id="l00490" name="l00490"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a1e83982c006730a8fc9828895584094e"> 490</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a1e83982c006730a8fc9828895584094e">sdrv_adc_clear_int_status</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, uint32_t int_bits);</div>
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<div class="line"><a id="l00491" name="l00491"></a><span class="lineno"> 491</span> </div>
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<div class="line"><a id="l00499" name="l00499"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9d8bd07c37b445ace70368b3306981ae"> 499</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a9d8bd07c37b445ace70368b3306981ae">sdrv_adc_int_status_en_cfg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, uint32_t int_bits, <span class="keywordtype">bool</span> enable);</div>
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<div class="line"><a id="l00500" name="l00500"></a><span class="lineno"> 500</span> </div>
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<div class="line"><a id="l00508" name="l00508"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a5feef46c02a31df7e133a34a98d61174"> 508</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a5feef46c02a31df7e133a34a98d61174">sdrv_adc_int_status_sig_en_cfg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, uint32_t int_bits, <span class="keywordtype">bool</span> enable);</div>
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<div class="line"><a id="l00509" name="l00509"></a><span class="lineno"> 509</span> </div>
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<div class="line"><a id="l00517" name="l00517"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a2cd258d70c6b0c8036d5e10581aa9152"> 517</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a2cd258d70c6b0c8036d5e10581aa9152">sdrv_adc_rc_cfg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rc_nbr, <a class="code hl_struct" href="structsdrv__adc__rc__cfg.html">sdrv_adc_rc_cfg_t</a> *rc_cfg);</div>
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<div class="line"><a id="l00518" name="l00518"></a><span class="lineno"> 518</span> </div>
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<div class="line"><a id="l00525" name="l00525"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aca52a48544c92c4655233cdcee991d1e"> 525</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#aca52a48544c92c4655233cdcee991d1e">sdrv_adc_rc_start_tmr</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rc_nbr);</div>
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<div class="line"><a id="l00526" name="l00526"></a><span class="lineno"> 526</span> </div>
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<div class="line"><a id="l00533" name="l00533"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a226f81219c1b0eb9ab3217b2c6de80dc"> 533</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a226f81219c1b0eb9ab3217b2c6de80dc">sdrv_adc_rc_start_timers</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <a class="code hl_typedef" href="sdrv__adc_8h.html#ae627ae80d38c47ffbc81d4118edee267">sdrv_adc_rc_start_flag_t</a> rc_flags);</div>
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<div class="line"><a id="l00534" name="l00534"></a><span class="lineno"> 534</span> </div>
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<div class="line"><a id="l00541" name="l00541"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a426aac059a0af33a3aba5743413f6894"> 541</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a426aac059a0af33a3aba5743413f6894">sdrv_adc_rc_stop_tmr</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rc_nbr);</div>
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<div class="line"><a id="l00542" name="l00542"></a><span class="lineno"> 542</span> </div>
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<div class="line"><a id="l00549" name="l00549"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3d06b1104829388374224a4ebe5d0d9f"> 549</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a3d06b1104829388374224a4ebe5d0d9f">sdrv_adc_rc_soft_trg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rc_nbr);</div>
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<div class="line"><a id="l00550" name="l00550"></a><span class="lineno"> 550</span> </div>
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<div class="line"><a id="l00560" name="l00560"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ad2604a3c103a66bbf18b33696904fd21"> 560</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#ad2604a3c103a66bbf18b33696904fd21">sdrv_adc_rcht_ready</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, uint8_t ready_len);</div>
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<div class="line"><a id="l00561" name="l00561"></a><span class="lineno"> 561</span> </div>
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<div class="line"><a id="l00567" name="l00567"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa3e25e8a10e6e985c721900f8baed386"> 567</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#aa3e25e8a10e6e985c721900f8baed386">sdrv_adc_rcht_clr_ready</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00568" name="l00568"></a><span class="lineno"> 568</span> </div>
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<div class="line"><a id="l00576" name="l00576"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4600a52d134367629ac639c3ccbf0fea"> 576</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a4600a52d134367629ac639c3ccbf0fea">sdrv_adc_rcht_entry_cfg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX,</div>
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<div class="line"><a id="l00577" name="l00577"></a><span class="lineno"> 577</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> entry_nbr,</div>
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<div class="line"><a id="l00578" name="l00578"></a><span class="lineno"> 578</span> <a class="code hl_struct" href="structsdrv__adc__rcht__entry__cfg.html">sdrv_adc_rcht_entry_cfg_t</a> entry_cfg);</div>
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<div class="line"><a id="l00579" name="l00579"></a><span class="lineno"> 579</span> </div>
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<div class="line"><a id="l00588" name="l00588"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af295451dc2e376cb6e9209f91ebf7479"> 588</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#af295451dc2e376cb6e9209f91ebf7479">sdrv_adc_rc_entry_cfg</a>( <a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX,</div>
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<div class="line"><a id="l00589" name="l00589"></a><span class="lineno"> 589</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rc_nbr,</div>
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<div class="line"><a id="l00590" name="l00590"></a><span class="lineno"> 590</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> entry_nbr,</div>
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<div class="line"><a id="l00591" name="l00591"></a><span class="lineno"> 591</span> <a class="code hl_struct" href="structsdrv__adc__rc__entry__cfg.html">sdrv_adc_rc_entry_cfg_t</a> entry_cfg);</div>
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<div class="line"><a id="l00592" name="l00592"></a><span class="lineno"> 592</span> </div>
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<div class="line"><a id="l00600" name="l00600"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a18ff0efeb6c1a48dde7c0652157e0e26"> 600</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a18ff0efeb6c1a48dde7c0652157e0e26">sdrv_adc_ana_param_cfg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX,</div>
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<div class="line"><a id="l00601" name="l00601"></a><span class="lineno"> 601</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> param_nbr,</div>
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<div class="line"><a id="l00602" name="l00602"></a><span class="lineno"> 602</span> <a class="code hl_struct" href="structsdrv__adc__ana__param__cfg.html">sdrv_adc_ana_param_cfg_t</a> aparam_cfg);</div>
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<div class="line"><a id="l00603" name="l00603"></a><span class="lineno"> 603</span> </div>
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<div class="line"><a id="l00610" name="l00610"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#ac1aa0ecdb702bf96a0a31b1c694312f9"> 610</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#ac1aa0ecdb702bf96a0a31b1c694312f9">sdrv_adc_fifo_cfg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <a class="code hl_struct" href="structsdrv__adc__fifo__cfg.html">sdrv_adc_fifo_cfg_t</a> *fifo_cfg);</div>
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<div class="line"><a id="l00611" name="l00611"></a><span class="lineno"> 611</span> </div>
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<div class="line"><a id="l00621" name="l00621"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a18d1567da46c6e35dce4555a44b7a5d5"> 621</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a18d1567da46c6e35dce4555a44b7a5d5">sdrv_adc_fifo_rc_cfg</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <a class="code hl_typedef" href="sdrv__adc_8h.html#a805f76630226d47d9cb22030775b1599">sdrv_adc_fifo_rc_cfg_t</a> rc_cfg);</div>
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<div class="line"><a id="l00622" name="l00622"></a><span class="lineno"> 622</span> </div>
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<div class="line"><a id="l00628" name="l00628"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#abe5b146c6de386eed0e13e94f76b4934"> 628</a></span>uint32_t <a class="code hl_function" href="sdrv__adc_8h.html#abe5b146c6de386eed0e13e94f76b4934">sdrv_adc_fifo_status</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00629" name="l00629"></a><span class="lineno"> 629</span> </div>
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<div class="line"><a id="l00638" name="l00638"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a9897dbe58737f92135d07340bdebc793"> 638</a></span>uint32_t <a class="code hl_function" href="sdrv__adc_8h.html#a9897dbe58737f92135d07340bdebc793">sdrv_adc_read_fifo</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00639" name="l00639"></a><span class="lineno"> 639</span> </div>
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<div class="line"><a id="l00645" name="l00645"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a4cdf99eeeba0a05089e21be4881f384d"> 645</a></span>uintptr_t <a class="code hl_function" href="sdrv__adc_8h.html#a4cdf99eeeba0a05089e21be4881f384d">sdrv_adc_fifo_addr</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00646" name="l00646"></a><span class="lineno"> 646</span> </div>
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<div class="line"><a id="l00653" name="l00653"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a3161c001f72655956f17661eea289497"> 653</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a3161c001f72655956f17661eea289497">sdrv_adc_dma_enable</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <a class="code hl_typedef" href="sdrv__adc_8h.html#afd230a1e8587f6b265a598928270f5b4">sdrv_adc_dma_src_cfg_t</a> req_src);</div>
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<div class="line"><a id="l00654" name="l00654"></a><span class="lineno"> 654</span> </div>
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<div class="line"><a id="l00660" name="l00660"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a8f7a32ec6bd3a82e4c24c2657944dbab"> 660</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a8f7a32ec6bd3a82e4c24c2657944dbab">sdrv_adc_dma_disable</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00661" name="l00661"></a><span class="lineno"> 661</span> </div>
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<div class="line"><a id="l00670" name="l00670"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a0af1a01cbe8f7104795c9da5d99cf9c0"> 670</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a0af1a01cbe8f7104795c9da5d99cf9c0">sdrv_adc_sync_cfg</a>( <a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX,</div>
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<div class="line"><a id="l00671" name="l00671"></a><span class="lineno"> 671</span> <a class="code hl_struct" href="structsdrv__adc__sync__cfg.html">sdrv_adc_sync_cfg_t</a> sync_cfg,</div>
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<div class="line"><a id="l00672" name="l00672"></a><span class="lineno"> 672</span> uint8_t *slot_cid,</div>
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<div class="line"><a id="l00673" name="l00673"></a><span class="lineno"> 673</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> len);</div>
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<div class="line"><a id="l00674" name="l00674"></a><span class="lineno"> 674</span> </div>
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<div class="line"><a id="l00682" name="l00682"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#af222849c195796ff151ca02393913a42"> 682</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#af222849c195796ff151ca02393913a42">sdrv_adc_sync_start</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00683" name="l00683"></a><span class="lineno"> 683</span> </div>
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<div class="line"><a id="l00689" name="l00689"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a31650648a015be174a0f0ed6aa69ca34"> 689</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a31650648a015be174a0f0ed6aa69ca34">sdrv_adc_Async_start</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00690" name="l00690"></a><span class="lineno"> 690</span> </div>
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<div class="line"><a id="l00696" name="l00696"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a89836eff6fc0a2dc2e0743d3bad78e4d"> 696</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a89836eff6fc0a2dc2e0743d3bad78e4d">sdrv_adc_sync_slot_reset</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX);</div>
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<div class="line"><a id="l00697" name="l00697"></a><span class="lineno"> 697</span> </div>
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<div class="line"><a id="l00704" name="l00704"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#a81cb1c700169828f9bc51cf69577b70a"> 704</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#a81cb1c700169828f9bc51cf69577b70a">sdrv_adc_stop</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <span class="keywordtype">bool</span> rc_tmr_stop);</div>
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<div class="line"><a id="l00705" name="l00705"></a><span class="lineno"> 705</span> </div>
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<div class="line"><a id="l00714" name="l00714"></a><span class="lineno"><a class="line" href="sdrv__adc_8h.html#aa3f2b2aa2a0f1532c674ff8880cce0b4"> 714</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__adc_8h.html#aa3f2b2aa2a0f1532c674ff8880cce0b4">sdrv_adc_power_ctrl</a>(<a class="code hl_struct" href="structsdrv__adc.html">sdrv_adc_t</a> *sdrv_adcX, <span class="keywordtype">bool</span> down);</div>
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<div class="line"><a id="l00715" name="l00715"></a><span class="lineno"> 715</span> </div>
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<div class="line"><a id="l00716" name="l00716"></a><span class="lineno"> 716</span> </div>
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<div class="line"><a id="l00717" name="l00717"></a><span class="lineno"> 717</span><span class="preprocessor">#endif </span><span class="comment">/* SDRV_ADC_H */</span><span class="preprocessor"></span></div>
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<div class="ttc" id="asdrv__adc_8h_html_a014d5e2d0e7860dcc27d57da72e29455"><div class="ttname"><a href="sdrv__adc_8h.html#a014d5e2d0e7860dcc27d57da72e29455">sdrv_adc_init</a></div><div class="ttdeci">void sdrv_adc_init(sdrv_adc_t *sdrv_adcX, unsigned int clk_div)</div><div class="ttdoc">ADC controller init.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a02bbaea955117f943305e5af43d906d0"><div class="ttname"><a href="sdrv__adc_8h.html#a02bbaea955117f943305e5af43d906d0">sdrv_adc_rc_cfg_t</a></div><div class="ttdeci">struct sdrv_adc_rc_cfg sdrv_adc_rc_cfg_t</div><div class="ttdoc">RC(Request Channel) configuration info.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a0474ab16366ca253d67da5f14943e439"><div class="ttname"><a href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a></div><div class="ttdeci">volatile struct sdrv_adc sdrv_adc_t</div><div class="ttdoc">Registers of ADC Controller.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a09cc3a4372f54206a7b1ea4a1d4e5273"><div class="ttname"><a href="sdrv__adc_8h.html#a09cc3a4372f54206a7b1ea4a1d4e5273">sdrv_adc_rcht_entry_cfg_t</a></div><div class="ttdeci">struct sdrv_adc_rcht_entry_cfg sdrv_adc_rcht_entry_cfg_t</div><div class="ttdoc">RCHT(Request Channel Hardware Trigger) entry configuration info.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a0af1a01cbe8f7104795c9da5d99cf9c0"><div class="ttname"><a href="sdrv__adc_8h.html#a0af1a01cbe8f7104795c9da5d99cf9c0">sdrv_adc_sync_cfg</a></div><div class="ttdeci">void sdrv_adc_sync_cfg(sdrv_adc_t *sdrv_adcX, sdrv_adc_sync_cfg_t sync_cfg, uint8_t *slot_cid, unsigned int len)</div><div class="ttdoc">Configure slot CIDs and interval if it's in sync mode.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a0b07b6d131e9c574518d2ee2ffd85338"><div class="ttname"><a href="sdrv__adc_8h.html#a0b07b6d131e9c574518d2ee2ffd85338">sdrv_adc_fifo_cfg_t</a></div><div class="ttdeci">struct sdrv_adc_fifo_cfg sdrv_adc_fifo_cfg_t</div><div class="ttdoc">FIFO configuration info.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a0c0ed133fe569190d344eb5adf21648d"><div class="ttname"><a href="sdrv__adc_8h.html#a0c0ed133fe569190d344eb5adf21648d">sdrv_adc_clr_slave_mode</a></div><div class="ttdeci">void sdrv_adc_clr_slave_mode(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Set ADC controller to Master mode.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a1141e84557fc51ffe9d03ce24683e86d"><div class="ttname"><a href="sdrv__adc_8h.html#a1141e84557fc51ffe9d03ce24683e86d">sdrv_adc_rc_entry_cfg_t</a></div><div class="ttdeci">struct sdrv_adc_rc_entry_cfg sdrv_adc_rc_entry_cfg_t</div><div class="ttdoc">RC(Request Channel) entry configuration info.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a18d1567da46c6e35dce4555a44b7a5d5"><div class="ttname"><a href="sdrv__adc_8h.html#a18d1567da46c6e35dce4555a44b7a5d5">sdrv_adc_fifo_rc_cfg</a></div><div class="ttdeci">void sdrv_adc_fifo_rc_cfg(sdrv_adc_t *sdrv_adcX, sdrv_adc_fifo_rc_cfg_t rc_cfg)</div><div class="ttdoc">Configure which RC or RCHT could insert its data into FIFO.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a18ff0efeb6c1a48dde7c0652157e0e26"><div class="ttname"><a href="sdrv__adc_8h.html#a18ff0efeb6c1a48dde7c0652157e0e26">sdrv_adc_ana_param_cfg</a></div><div class="ttdeci">void sdrv_adc_ana_param_cfg(sdrv_adc_t *sdrv_adcX, unsigned int param_nbr, sdrv_adc_ana_param_cfg_t aparam_cfg)</div><div class="ttdoc">Configure one of the analog parameter array.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a1e83982c006730a8fc9828895584094e"><div class="ttname"><a href="sdrv__adc_8h.html#a1e83982c006730a8fc9828895584094e">sdrv_adc_clear_int_status</a></div><div class="ttdeci">void sdrv_adc_clear_int_status(sdrv_adc_t *sdrv_adcX, uint32_t int_bits)</div><div class="ttdoc">Clear ADC normal interrupt status.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a226f81219c1b0eb9ab3217b2c6de80dc"><div class="ttname"><a href="sdrv__adc_8h.html#a226f81219c1b0eb9ab3217b2c6de80dc">sdrv_adc_rc_start_timers</a></div><div class="ttdeci">void sdrv_adc_rc_start_timers(sdrv_adc_t *sdrv_adcX, sdrv_adc_rc_start_flag_t rc_flags)</div><div class="ttdoc">Start multiple RC timer at the same time to trigger ADC conversion.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a2cd258d70c6b0c8036d5e10581aa9152"><div class="ttname"><a href="sdrv__adc_8h.html#a2cd258d70c6b0c8036d5e10581aa9152">sdrv_adc_rc_cfg</a></div><div class="ttdeci">void sdrv_adc_rc_cfg(sdrv_adc_t *sdrv_adcX, unsigned int rc_nbr, sdrv_adc_rc_cfg_t *rc_cfg)</div><div class="ttdoc">RC(Request Channel) configuration.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a3161c001f72655956f17661eea289497"><div class="ttname"><a href="sdrv__adc_8h.html#a3161c001f72655956f17661eea289497">sdrv_adc_dma_enable</a></div><div class="ttdeci">void sdrv_adc_dma_enable(sdrv_adc_t *sdrv_adcX, sdrv_adc_dma_src_cfg_t req_src)</div><div class="ttdoc">Configure the source to trigger DMA request and enable it.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a31650648a015be174a0f0ed6aa69ca34"><div class="ttname"><a href="sdrv__adc_8h.html#a31650648a015be174a0f0ed6aa69ca34">sdrv_adc_Async_start</a></div><div class="ttdeci">void sdrv_adc_Async_start(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Put ADC in Async mode and start working.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a3d06b1104829388374224a4ebe5d0d9f"><div class="ttname"><a href="sdrv__adc_8h.html#a3d06b1104829388374224a4ebe5d0d9f">sdrv_adc_rc_soft_trg</a></div><div class="ttdeci">void sdrv_adc_rc_soft_trg(sdrv_adc_t *sdrv_adcX, unsigned int rc_nbr)</div><div class="ttdoc">Trigger ADC conversion once if the RC is in software trigger mode.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a426aac059a0af33a3aba5743413f6894"><div class="ttname"><a href="sdrv__adc_8h.html#a426aac059a0af33a3aba5743413f6894">sdrv_adc_rc_stop_tmr</a></div><div class="ttdeci">void sdrv_adc_rc_stop_tmr(sdrv_adc_t *sdrv_adcX, unsigned int rc_nbr)</div><div class="ttdoc">Stop RC timer.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a4600a52d134367629ac639c3ccbf0fea"><div class="ttname"><a href="sdrv__adc_8h.html#a4600a52d134367629ac639c3ccbf0fea">sdrv_adc_rcht_entry_cfg</a></div><div class="ttdeci">void sdrv_adc_rcht_entry_cfg(sdrv_adc_t *sdrv_adcX, unsigned int entry_nbr, sdrv_adc_rcht_entry_cfg_t entry_cfg)</div><div class="ttdoc">Configure RCHT(Request Channel Hardware Trigger) entry.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a46f9c35cfa8f56e2127c065fb85341a8"><div class="ttname"><a href="sdrv__adc_8h.html#a46f9c35cfa8f56e2127c065fb85341a8">SDRV_ADC_RC_CNT</a></div><div class="ttdeci">#define SDRV_ADC_RC_CNT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:25</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a4953bee4734838559dc9a78ff142c085"><div class="ttname"><a href="sdrv__adc_8h.html#a4953bee4734838559dc9a78ff142c085">SDRV_ADC_ANA_PARAM_CNT</a></div><div class="ttdeci">#define SDRV_ADC_ANA_PARAM_CNT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:29</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a4cdf99eeeba0a05089e21be4881f384d"><div class="ttname"><a href="sdrv__adc_8h.html#a4cdf99eeeba0a05089e21be4881f384d">sdrv_adc_fifo_addr</a></div><div class="ttdeci">uintptr_t sdrv_adc_fifo_addr(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Return FIFO address of the ADC controller.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a4fd5b7141b1e383619fd96cb5bd273bf"><div class="ttname"><a href="sdrv__adc_8h.html#a4fd5b7141b1e383619fd96cb5bd273bf">sdrv_adc_sync_cid_t</a></div><div class="ttdeci">enum sdrv_adc_sync_cid sdrv_adc_sync_cid_t</div><div class="ttdoc">Descriptor for configuring slot CID in sync mode.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a51d445309bdc467688c8356851e56796"><div class="ttname"><a href="sdrv__adc_8h.html#a51d445309bdc467688c8356851e56796">SDRV_ADC_RC_ENTRY_CNT</a></div><div class="ttdeci">#define SDRV_ADC_RC_ENTRY_CNT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:26</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a5feef46c02a31df7e133a34a98d61174"><div class="ttname"><a href="sdrv__adc_8h.html#a5feef46c02a31df7e133a34a98d61174">sdrv_adc_int_status_sig_en_cfg</a></div><div class="ttdeci">void sdrv_adc_int_status_sig_en_cfg(sdrv_adc_t *sdrv_adcX, uint32_t int_bits, bool enable)</div><div class="ttdoc">Enable or disable ADC controller to trigger normal interrupt.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a62f2a3e21b90aaa1c0030ba025c34c08"><div class="ttname"><a href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08">sdrv_adc_dma_src_cfg</a></div><div class="ttdeci">sdrv_adc_dma_src_cfg</div><div class="ttdoc">Describe which source to trigger DMA request.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:397</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a62f2a3e21b90aaa1c0030ba025c34c08a0efb5fe1dd0aac8fce67a7e6d74c7b19"><div class="ttname"><a href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a0efb5fe1dd0aac8fce67a7e6d74c7b19">SDRV_ADC_DMA_SRC_RC1</a></div><div class="ttdeci">@ SDRV_ADC_DMA_SRC_RC1</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:400</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a62f2a3e21b90aaa1c0030ba025c34c08a4b3534cd759c24b88c4f4b44eb18223c"><div class="ttname"><a href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a4b3534cd759c24b88c4f4b44eb18223c">SDRV_ADC_DMA_SRC_FIFO</a></div><div class="ttdeci">@ SDRV_ADC_DMA_SRC_FIFO</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:398</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a62f2a3e21b90aaa1c0030ba025c34c08a6965491462daa06241b0ee7c6cf15ba3"><div class="ttname"><a href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a6965491462daa06241b0ee7c6cf15ba3">SDRV_ADC_DMA_SRC_RC2</a></div><div class="ttdeci">@ SDRV_ADC_DMA_SRC_RC2</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:401</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a62f2a3e21b90aaa1c0030ba025c34c08a965e814cb0cb9e230509a3c5d566aac0"><div class="ttname"><a href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08a965e814cb0cb9e230509a3c5d566aac0">SDRV_ADC_DMA_SRC_RC3</a></div><div class="ttdeci">@ SDRV_ADC_DMA_SRC_RC3</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:402</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a62f2a3e21b90aaa1c0030ba025c34c08ad5a5e117c3dda438e4946d3c3004f81d"><div class="ttname"><a href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08ad5a5e117c3dda438e4946d3c3004f81d">SDRV_ADC_DMA_SRC_RCHT</a></div><div class="ttdeci">@ SDRV_ADC_DMA_SRC_RCHT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:403</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a62f2a3e21b90aaa1c0030ba025c34c08ae04dd33b97968d97667db7aa0c34d846"><div class="ttname"><a href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08ae04dd33b97968d97667db7aa0c34d846">SDRV_ADC_DMA_SRC_RC0</a></div><div class="ttdeci">@ SDRV_ADC_DMA_SRC_RC0</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:399</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a6682860213962028a19c587a68a36469"><div class="ttname"><a href="sdrv__adc_8h.html#a6682860213962028a19c587a68a36469">sdrv_adc_read_int_status</a></div><div class="ttdeci">uint32_t sdrv_adc_read_int_status(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Read ADC normal interrupt status.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a683ba426fdb771185750788d9c7b457d"><div class="ttname"><a href="sdrv__adc_8h.html#a683ba426fdb771185750788d9c7b457d">sdrv_adc_ana_param_cfg_t</a></div><div class="ttdeci">struct sdrv_adc_ana_param_cfg sdrv_adc_ana_param_cfg_t</div><div class="ttdoc">Analog Param configuration info.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a737982e84051c80ea05427f0ebfeb78c"><div class="ttname"><a href="sdrv__adc_8h.html#a737982e84051c80ea05427f0ebfeb78c">SDRV_ADC_RCHT_ENTRY_CNT</a></div><div class="ttdeci">#define SDRV_ADC_RCHT_ENTRY_CNT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:27</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a7ccedb5cdf48c8eaf62761599e1e0a94"><div class="ttname"><a href="sdrv__adc_8h.html#a7ccedb5cdf48c8eaf62761599e1e0a94">SDRV_ADC_MNT_SINGLE_CNT</a></div><div class="ttdeci">#define SDRV_ADC_MNT_SINGLE_CNT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:30</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a805f76630226d47d9cb22030775b1599"><div class="ttname"><a href="sdrv__adc_8h.html#a805f76630226d47d9cb22030775b1599">sdrv_adc_fifo_rc_cfg_t</a></div><div class="ttdeci">unsigned int sdrv_adc_fifo_rc_cfg_t</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:382</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a81cb1c700169828f9bc51cf69577b70a"><div class="ttname"><a href="sdrv__adc_8h.html#a81cb1c700169828f9bc51cf69577b70a">sdrv_adc_stop</a></div><div class="ttdeci">void sdrv_adc_stop(sdrv_adc_t *sdrv_adcX, bool rc_tmr_stop)</div><div class="ttdoc">Stop ADC from working.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a89836eff6fc0a2dc2e0743d3bad78e4d"><div class="ttname"><a href="sdrv__adc_8h.html#a89836eff6fc0a2dc2e0743d3bad78e4d">sdrv_adc_sync_slot_reset</a></div><div class="ttdeci">void sdrv_adc_sync_slot_reset(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Reset slot CID pointer to 0 in sync mode.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a8f7a32ec6bd3a82e4c24c2657944dbab"><div class="ttname"><a href="sdrv__adc_8h.html#a8f7a32ec6bd3a82e4c24c2657944dbab">sdrv_adc_dma_disable</a></div><div class="ttdeci">void sdrv_adc_dma_disable(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Disable DMA request of the ADC controller.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a922f3b59c2f4c1a0b5b6aaf87830b4f0"><div class="ttname"><a href="sdrv__adc_8h.html#a922f3b59c2f4c1a0b5b6aaf87830b4f0">sdrv_adc_set_dc_offset</a></div><div class="ttdeci">void sdrv_adc_set_dc_offset(sdrv_adc_t *sdrv_adcX, int16_t offset)</div><div class="ttdoc">Set data calibration offset value of ADC controller.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a9897dbe58737f92135d07340bdebc793"><div class="ttname"><a href="sdrv__adc_8h.html#a9897dbe58737f92135d07340bdebc793">sdrv_adc_read_fifo</a></div><div class="ttdeci">uint32_t sdrv_adc_read_fifo(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Read ADC FIFO data.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_a9d8bd07c37b445ace70368b3306981ae"><div class="ttname"><a href="sdrv__adc_8h.html#a9d8bd07c37b445ace70368b3306981ae">sdrv_adc_int_status_en_cfg</a></div><div class="ttdeci">void sdrv_adc_int_status_en_cfg(sdrv_adc_t *sdrv_adcX, uint32_t int_bits, bool enable)</div><div class="ttdoc">Enable or disable ADC controller to record normal interrupt status.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1d"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1d">sdrv_adc_sync_cid</a></div><div class="ttdeci">sdrv_adc_sync_cid</div><div class="ttdoc">Descriptor for configuring slot CID in sync mode.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:409</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1da0a747f587d00801b289b452e47bdecde"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1da0a747f587d00801b289b452e47bdecde">SDRV_ADC_SYNC_CID_RC0</a></div><div class="ttdeci">@ SDRV_ADC_SYNC_CID_RC0</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:410</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1da35786a6428d3b87144e0d65a31f2168d"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1da35786a6428d3b87144e0d65a31f2168d">SDRV_ADC_SYNC_CID_IDLE</a></div><div class="ttdeci">@ SDRV_ADC_SYNC_CID_IDLE</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:416</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1dab724a4ca505979a4585e3c4ac9977a78"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dab724a4ca505979a4585e3c4ac9977a78">SDRV_ADC_SYNC_CID_RC1</a></div><div class="ttdeci">@ SDRV_ADC_SYNC_CID_RC1</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:411</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1dabade9d7b2484a44b621d4d9edd75ccfb"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dabade9d7b2484a44b621d4d9edd75ccfb">SDRV_ADC_SYNC_CID_RC2</a></div><div class="ttdeci">@ SDRV_ADC_SYNC_CID_RC2</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:412</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1dadbc645f6ecfbdf9aa5d91a3f1edcfa13"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1dadbc645f6ecfbdf9aa5d91a3f1edcfa13">SDRV_ADC_SYNC_CID_MERGE</a></div><div class="ttdeci">@ SDRV_ADC_SYNC_CID_MERGE</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:415</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1daebf1105ffd48ad254c75f442d0a7b436"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1daebf1105ffd48ad254c75f442d0a7b436">SDRV_ADC_SYNC_CID_RC3</a></div><div class="ttdeci">@ SDRV_ADC_SYNC_CID_RC3</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:413</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa0837abac3ae1b7e1cd79dd0c4ca1d1daee4caecf85fe4d412b682e4e8e2e5326"><div class="ttname"><a href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1daee4caecf85fe4d412b682e4e8e2e5326">SDRV_ADC_SYNC_CID_RCHT</a></div><div class="ttdeci">@ SDRV_ADC_SYNC_CID_RCHT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:414</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa3e25e8a10e6e985c721900f8baed386"><div class="ttname"><a href="sdrv__adc_8h.html#aa3e25e8a10e6e985c721900f8baed386">sdrv_adc_rcht_clr_ready</a></div><div class="ttdeci">void sdrv_adc_rcht_clr_ready(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Clear RCHT(Request Channel Hardware Trigger) ready.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa3f2b2aa2a0f1532c674ff8880cce0b4"><div class="ttname"><a href="sdrv__adc_8h.html#aa3f2b2aa2a0f1532c674ff8880cce0b4">sdrv_adc_power_ctrl</a></div><div class="ttdeci">void sdrv_adc_power_ctrl(sdrv_adc_t *sdrv_adcX, bool down)</div><div class="ttdoc">ADC analog reference configuration.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aa471811023c116f054071db1ec707b45"><div class="ttname"><a href="sdrv__adc_8h.html#aa471811023c116f054071db1ec707b45">SDRV_ADC_SUB_FIFO_CNT</a></div><div class="ttdeci">#define SDRV_ADC_SUB_FIFO_CNT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:31</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_abe5b146c6de386eed0e13e94f76b4934"><div class="ttname"><a href="sdrv__adc_8h.html#abe5b146c6de386eed0e13e94f76b4934">sdrv_adc_fifo_status</a></div><div class="ttdeci">uint32_t sdrv_adc_fifo_status(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Get ADC FIFO status.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_ac1aa0ecdb702bf96a0a31b1c694312f9"><div class="ttname"><a href="sdrv__adc_8h.html#ac1aa0ecdb702bf96a0a31b1c694312f9">sdrv_adc_fifo_cfg</a></div><div class="ttdeci">void sdrv_adc_fifo_cfg(sdrv_adc_t *sdrv_adcX, sdrv_adc_fifo_cfg_t *fifo_cfg)</div><div class="ttdoc">Configure FIFO working mode.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_ac3f3c6d2d256abeec5c9b07e5684d8b4"><div class="ttname"><a href="sdrv__adc_8h.html#ac3f3c6d2d256abeec5c9b07e5684d8b4">sdrv_adc_sync_cfg_t</a></div><div class="ttdeci">struct sdrv_adc_sync_cfg sdrv_adc_sync_cfg_t</div><div class="ttdoc">Sync mode configuration info.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aca52a48544c92c4655233cdcee991d1e"><div class="ttname"><a href="sdrv__adc_8h.html#aca52a48544c92c4655233cdcee991d1e">sdrv_adc_rc_start_tmr</a></div><div class="ttdeci">void sdrv_adc_rc_start_tmr(sdrv_adc_t *sdrv_adcX, unsigned int rc_nbr)</div><div class="ttdoc">Start RC timer to trigger ADC conversion.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_ad2604a3c103a66bbf18b33696904fd21"><div class="ttname"><a href="sdrv__adc_8h.html#ad2604a3c103a66bbf18b33696904fd21">sdrv_adc_rcht_ready</a></div><div class="ttdeci">void sdrv_adc_rcht_ready(sdrv_adc_t *sdrv_adcX, uint8_t ready_len)</div><div class="ttdoc">Set RCHT(Request Channel Hardware Trigger) ready.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_ae627ae80d38c47ffbc81d4118edee267"><div class="ttname"><a href="sdrv__adc_8h.html#ae627ae80d38c47ffbc81d4118edee267">sdrv_adc_rc_start_flag_t</a></div><div class="ttdeci">unsigned int sdrv_adc_rc_start_flag_t</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:392</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_ae8f38b79f83a962f6f878a743812df53"><div class="ttname"><a href="sdrv__adc_8h.html#ae8f38b79f83a962f6f878a743812df53">sdrv_adc_get_dc_offset</a></div><div class="ttdeci">int16_t sdrv_adc_get_dc_offset(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Get current data calibration offset value of ADC controller.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aebcf37a042636cf308ae559912ed87f0"><div class="ttname"><a href="sdrv__adc_8h.html#aebcf37a042636cf308ae559912ed87f0">sdrv_adc_set_slave_mode</a></div><div class="ttdeci">void sdrv_adc_set_slave_mode(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Set ADC controller to Slave mode.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_aee4a329d2436077ee9d00f01ede4bc5c"><div class="ttname"><a href="sdrv__adc_8h.html#aee4a329d2436077ee9d00f01ede4bc5c">SDRV_ADC_CID_PART_CNT</a></div><div class="ttdeci">#define SDRV_ADC_CID_PART_CNT</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:28</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_af222849c195796ff151ca02393913a42"><div class="ttname"><a href="sdrv__adc_8h.html#af222849c195796ff151ca02393913a42">sdrv_adc_sync_start</a></div><div class="ttdeci">void sdrv_adc_sync_start(sdrv_adc_t *sdrv_adcX)</div><div class="ttdoc">Put ADC in sync mode and start working.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_af295451dc2e376cb6e9209f91ebf7479"><div class="ttname"><a href="sdrv__adc_8h.html#af295451dc2e376cb6e9209f91ebf7479">sdrv_adc_rc_entry_cfg</a></div><div class="ttdeci">void sdrv_adc_rc_entry_cfg(sdrv_adc_t *sdrv_adcX, unsigned int rc_nbr, unsigned int entry_nbr, sdrv_adc_rc_entry_cfg_t entry_cfg)</div><div class="ttdoc">Configure RC(Request Channel) entry.</div></div>
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<div class="ttc" id="asdrv__adc_8h_html_afd230a1e8587f6b265a598928270f5b4"><div class="ttname"><a href="sdrv__adc_8h.html#afd230a1e8587f6b265a598928270f5b4">sdrv_adc_dma_src_cfg_t</a></div><div class="ttdeci">enum sdrv_adc_dma_src_cfg sdrv_adc_dma_src_cfg_t</div><div class="ttdoc">Describe which source to trigger DMA request.</div></div>
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<div class="ttc" id="astructsdrv__adc__ana__param__cfg_html"><div class="ttname"><a href="structsdrv__adc__ana__param__cfg.html">sdrv_adc_ana_param_cfg</a></div><div class="ttdoc">Analog Param configuration info.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:351</div></div>
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<div class="ttc" id="astructsdrv__adc__ana__param__cfg_html_a0928e4e0206941e7e571b40e3bfbcff4"><div class="ttname"><a href="structsdrv__adc__ana__param__cfg.html#a0928e4e0206941e7e571b40e3bfbcff4">sdrv_adc_ana_param_cfg::ref_sel</a></div><div class="ttdeci">uint32_t ref_sel</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:354</div></div>
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<div class="ttc" id="astructsdrv__adc__ana__param__cfg_html_a2a038e9af60b52d9c943ed4d69299df8"><div class="ttname"><a href="structsdrv__adc__ana__param__cfg.html#a2a038e9af60b52d9c943ed4d69299df8">sdrv_adc_ana_param_cfg::input_mode</a></div><div class="ttdeci">uint32_t input_mode</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:355</div></div>
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<div class="ttc" id="astructsdrv__adc__ana__param__cfg_html_ab322aee7201d11451cb55e2f551e72cb"><div class="ttname"><a href="structsdrv__adc__ana__param__cfg.html#ab322aee7201d11451cb55e2f551e72cb">sdrv_adc_ana_param_cfg::sample_time</a></div><div class="ttdeci">uint32_t sample_time</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:352</div></div>
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<div class="ttc" id="astructsdrv__adc__fifo__cfg_html"><div class="ttname"><a href="structsdrv__adc__fifo__cfg.html">sdrv_adc_fifo_cfg</a></div><div class="ttdoc">FIFO configuration info.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:364</div></div>
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<div class="ttc" id="astructsdrv__adc__fifo__cfg_html_a6c156f01db5738ab0f99475c2df24015"><div class="ttname"><a href="structsdrv__adc__fifo__cfg.html#a6c156f01db5738ab0f99475c2df24015">sdrv_adc_fifo_cfg::pack16_chnl</a></div><div class="ttdeci">uint32_t pack16_chnl</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:369</div></div>
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<div class="ttc" id="astructsdrv__adc__fifo__cfg_html_a876eac8f30e5af2a8e4ea03f9d2ed460"><div class="ttname"><a href="structsdrv__adc__fifo__cfg.html#a876eac8f30e5af2a8e4ea03f9d2ed460">sdrv_adc_fifo_cfg::bypass</a></div><div class="ttdeci">uint32_t bypass</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:367</div></div>
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<div class="ttc" id="astructsdrv__adc__fifo__cfg_html_aa63db45b7c328128e07cd4d0f86f59df"><div class="ttname"><a href="structsdrv__adc__fifo__cfg.html#aa63db45b7c328128e07cd4d0f86f59df">sdrv_adc_fifo_cfg::threshold</a></div><div class="ttdeci">uint32_t threshold</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:370</div></div>
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<div class="ttc" id="astructsdrv__adc__fifo__cfg_html_aba76cbd2b38ec510401226a5dfde6d62"><div class="ttname"><a href="structsdrv__adc__fifo__cfg.html#aba76cbd2b38ec510401226a5dfde6d62">sdrv_adc_fifo_cfg::pack_mode</a></div><div class="ttdeci">uint32_t pack_mode</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:365</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html">sdrv_adc_rc_cfg</a></div><div class="ttdoc">RC(Request Channel) configuration info.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:293</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_a297412a5c0d457f05d5d52407128b0c0"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#a297412a5c0d457f05d5d52407128b0c0">sdrv_adc_rc_cfg::trg_mode</a></div><div class="ttdeci">uint32_t trg_mode</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:301</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_a42f7227f684b3c010e7bf45ad940e956"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#a42f7227f684b3c010e7bf45ad940e956">sdrv_adc_rc_cfg::q_start</a></div><div class="ttdeci">uint32_t q_start</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:297</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_a4c361128d17ad22a12b73ee568eaf9f1"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#a4c361128d17ad22a12b73ee568eaf9f1">sdrv_adc_rc_cfg::tmr_mode</a></div><div class="ttdeci">uint32_t tmr_mode</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:300</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_a5703c55ad6579df4ab41933e08e08b8f"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#a5703c55ad6579df4ab41933e08e08b8f">sdrv_adc_rc_cfg::compare</a></div><div class="ttdeci">uint16_t compare</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:295</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_a885790ee0dbe54bb92c2deeb32971dbe"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#a885790ee0dbe54bb92c2deeb32971dbe">sdrv_adc_rc_cfg::q_end</a></div><div class="ttdeci">uint32_t q_end</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:298</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_aba2468d4f8e7dc94c66e86319b3ab377"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#aba2468d4f8e7dc94c66e86319b3ab377">sdrv_adc_rc_cfg::q_cur</a></div><div class="ttdeci">uint32_t q_cur</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:296</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_acdbc7c7daf20f35bcecb28afff5d42af"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#acdbc7c7daf20f35bcecb28afff5d42af">sdrv_adc_rc_cfg::trg_en</a></div><div class="ttdeci">uint32_t trg_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:303</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__cfg_html_ae08d9d7b35b6b3ba531ad82fc4784ae8"><div class="ttname"><a href="structsdrv__adc__rc__cfg.html#ae08d9d7b35b6b3ba531ad82fc4784ae8">sdrv_adc_rc_cfg::terminal</a></div><div class="ttdeci">uint16_t terminal</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:294</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__entry__cfg_html"><div class="ttname"><a href="structsdrv__adc__rc__entry__cfg.html">sdrv_adc_rc_entry_cfg</a></div><div class="ttdoc">RC(Request Channel) entry configuration info.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:327</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__entry__cfg_html_a0c72dd5e18823aef187a34137983c9a6"><div class="ttname"><a href="structsdrv__adc__rc__entry__cfg.html#a0c72dd5e18823aef187a34137983c9a6">sdrv_adc_rc_entry_cfg::channel</a></div><div class="ttdeci">uint32_t channel</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:328</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__entry__cfg_html_a8177f6ce9c89a271aab458d8a3cff22a"><div class="ttname"><a href="structsdrv__adc__rc__entry__cfg.html#a8177f6ce9c89a271aab458d8a3cff22a">sdrv_adc_rc_entry_cfg::cfg_sel</a></div><div class="ttdeci">uint32_t cfg_sel</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:330</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__entry__cfg_html_aa9dd4e7fdc696e83ff806733e72e0752"><div class="ttname"><a href="structsdrv__adc__rc__entry__cfg.html#aa9dd4e7fdc696e83ff806733e72e0752">sdrv_adc_rc_entry_cfg::repeat_cnt</a></div><div class="ttdeci">uint32_t repeat_cnt</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:333</div></div>
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<div class="ttc" id="astructsdrv__adc__rc__entry__cfg_html_aad754b0d9c348a99248025cd2991e55b"><div class="ttname"><a href="structsdrv__adc__rc__entry__cfg.html#aad754b0d9c348a99248025cd2991e55b">sdrv_adc_rc_entry_cfg::repeat_mode</a></div><div class="ttdeci">uint32_t repeat_mode</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:331</div></div>
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<div class="ttc" id="astructsdrv__adc__rcht__entry__cfg_html"><div class="ttname"><a href="structsdrv__adc__rcht__entry__cfg.html">sdrv_adc_rcht_entry_cfg</a></div><div class="ttdoc">RCHT(Request Channel Hardware Trigger) entry configuration info.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:314</div></div>
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<div class="ttc" id="astructsdrv__adc__rcht__entry__cfg_html_a0c72dd5e18823aef187a34137983c9a6"><div class="ttname"><a href="structsdrv__adc__rcht__entry__cfg.html#a0c72dd5e18823aef187a34137983c9a6">sdrv_adc_rcht_entry_cfg::channel</a></div><div class="ttdeci">uint32_t channel</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:315</div></div>
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<div class="ttc" id="astructsdrv__adc__rcht__entry__cfg_html_a8177f6ce9c89a271aab458d8a3cff22a"><div class="ttname"><a href="structsdrv__adc__rcht__entry__cfg.html#a8177f6ce9c89a271aab458d8a3cff22a">sdrv_adc_rcht_entry_cfg::cfg_sel</a></div><div class="ttdeci">uint32_t cfg_sel</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:317</div></div>
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<div class="ttc" id="astructsdrv__adc__rcht__entry__cfg_html_aa9dd4e7fdc696e83ff806733e72e0752"><div class="ttname"><a href="structsdrv__adc__rcht__entry__cfg.html#aa9dd4e7fdc696e83ff806733e72e0752">sdrv_adc_rcht_entry_cfg::repeat_cnt</a></div><div class="ttdeci">uint32_t repeat_cnt</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:319</div></div>
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<div class="ttc" id="astructsdrv__adc__sync__cfg_html"><div class="ttname"><a href="structsdrv__adc__sync__cfg.html">sdrv_adc_sync_cfg</a></div><div class="ttdoc">Sync mode configuration info.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:422</div></div>
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<div class="ttc" id="astructsdrv__adc__sync__cfg_html_a3d7b778b008c356ca71b625091650226"><div class="ttname"><a href="structsdrv__adc__sync__cfg.html#a3d7b778b008c356ca71b625091650226">sdrv_adc_sync_cfg::itvl_const</a></div><div class="ttdeci">uint32_t itvl_const</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:424</div></div>
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<div class="ttc" id="astructsdrv__adc__sync__cfg_html_ad67660ae831080c280be0b81d9a5630d"><div class="ttname"><a href="structsdrv__adc__sync__cfg.html#ad67660ae831080c280be0b81d9a5630d">sdrv_adc_sync_cfg::slot_itvl</a></div><div class="ttdeci">uint32_t slot_itvl</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:423</div></div>
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<div class="ttc" id="astructsdrv__adc_html"><div class="ttname"><a href="structsdrv__adc.html">sdrv_adc</a></div><div class="ttdoc">Registers of ADC Controller.</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:219</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a017ea7f073911cb32c353b041656fd5a"><div class="ttname"><a href="structsdrv__adc.html#a017ea7f073911cb32c353b041656fd5a">sdrv_adc::init</a></div><div class="ttdeci">uint32_t init</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:221</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a026805babb21c273f598b8d49c12b5c8"><div class="ttname"><a href="structsdrv__adc.html#a026805babb21c273f598b8d49c12b5c8">sdrv_adc::unc_err_int_stat_en</a></div><div class="ttdeci">uint32_t unc_err_int_stat_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:236</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a05264520b4a242d894d9a9b51fc3d998"><div class="ttname"><a href="structsdrv__adc.html#a05264520b4a242d894d9a9b51fc3d998">sdrv_adc::reserved8</a></div><div class="ttdeci">uint32_t reserved8</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:269</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a05f4f65a258b7574f07c9fe286caeaf0"><div class="ttname"><a href="structsdrv__adc.html#a05f4f65a258b7574f07c9fe286caeaf0">sdrv_adc::fusa_unc_err_int_stat_en</a></div><div class="ttdeci">uint32_t fusa_unc_err_int_stat_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:275</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a087ebb27194283a94b514cbee80bde78"><div class="ttname"><a href="structsdrv__adc.html#a087ebb27194283a94b514cbee80bde78">sdrv_adc::clk_ctrl</a></div><div class="ttdeci">uint32_t clk_ctrl</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:247</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a0965fc01a04ea59d7b5ad69483b26bd3"><div class="ttname"><a href="structsdrv__adc.html#a0965fc01a04ea59d7b5ad69483b26bd3">sdrv_adc::reg_prty_err_int_sig_en</a></div><div class="ttdeci">uint32_t reg_prty_err_int_sig_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:268</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a0e8ab5ae5446680813c31a6d530dfb0f"><div class="ttname"><a href="structsdrv__adc.html#a0e8ab5ae5446680813c31a6d530dfb0f">sdrv_adc::ts_value</a></div><div class="ttdeci">uint32_t ts_value</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:242</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a106a56f6272bccfcc2f99a6b4b9b7d54"><div class="ttname"><a href="structsdrv__adc.html#a106a56f6272bccfcc2f99a6b4b9b7d54">sdrv_adc::sch_prio</a></div><div class="ttdeci">uint32_t sch_prio</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:246</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a10cd5986fafd953f3d1eecb22283dc58"><div class="ttname"><a href="structsdrv__adc.html#a10cd5986fafd953f3d1eecb22283dc58">sdrv_adc::reserved5</a></div><div class="ttdeci">uint32_t reserved5</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:248</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a14162d850ff789542272c27090900bb2"><div class="ttname"><a href="structsdrv__adc.html#a14162d850ff789542272c27090900bb2">sdrv_adc::conv_rc</a></div><div class="ttdeci">uint64_t conv_rc[SDRV_ADC_RC_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:279</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a14e3d0598b2f6c3a89d445996a5055bc"><div class="ttname"><a href="structsdrv__adc.html#a14e3d0598b2f6c3a89d445996a5055bc">sdrv_adc::sch_cid_part</a></div><div class="ttdeci">uint32_t sch_cid_part[SDRV_ADC_CID_PART_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:241</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a1eb3a1a7b8d073219b4f76c9446d9f89"><div class="ttname"><a href="structsdrv__adc.html#a1eb3a1a7b8d073219b4f76c9446d9f89">sdrv_adc::fusa_cor_err_int_stat</a></div><div class="ttdeci">uint32_t fusa_cor_err_int_stat</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:270</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a1f302ae1bb51f0fee5b59ffe2c6dcc15"><div class="ttname"><a href="structsdrv__adc.html#a1f302ae1bb51f0fee5b59ffe2c6dcc15">sdrv_adc::ate_test_cfg</a></div><div class="ttdeci">uint32_t ate_test_cfg</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:281</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a213f8c68f8c80b7a16582c6a440d3eef"><div class="ttname"><a href="structsdrv__adc.html#a213f8c68f8c80b7a16582c6a440d3eef">sdrv_adc::rc_timer</a></div><div class="ttdeci">uint32_t rc_timer[SDRV_ADC_RC_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:225</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a2747b522456925aba55dc8b686de9d06"><div class="ttname"><a href="structsdrv__adc.html#a2747b522456925aba55dc8b686de9d06">sdrv_adc::htc</a></div><div class="ttdeci">uint32_t htc</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:223</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a27ccc5ae7f058f59d09bb8100687f4b6"><div class="ttname"><a href="structsdrv__adc.html#a27ccc5ae7f058f59d09bb8100687f4b6">sdrv_adc::sub_fifo</a></div><div class="ttdeci">uint32_t sub_fifo[SDRV_ADC_SUB_FIFO_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:261</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a2b96ec1cd914a72d3bf2a55a56e56a99"><div class="ttname"><a href="structsdrv__adc.html#a2b96ec1cd914a72d3bf2a55a56e56a99">sdrv_adc::reserved4</a></div><div class="ttdeci">uint32_t reserved4[2]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:244</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a30c83125833dad1d507384924af0eb30"><div class="ttname"><a href="structsdrv__adc.html#a30c83125833dad1d507384924af0eb30">sdrv_adc::reg_prty_err_int_stat</a></div><div class="ttdeci">uint32_t reg_prty_err_int_stat</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:266</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a350f0ed13e9a8021fb2fbe648f8cf2e6"><div class="ttname"><a href="structsdrv__adc.html#a350f0ed13e9a8021fb2fbe648f8cf2e6">sdrv_adc::cor_err_int_sig_en</a></div><div class="ttdeci">uint32_t cor_err_int_sig_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:233</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a353dc851fc0cfb474f93c340d92e098e"><div class="ttname"><a href="structsdrv__adc.html#a353dc851fc0cfb474f93c340d92e098e">sdrv_adc::ana_ref_cfg1</a></div><div class="ttdeci">uint32_t ana_ref_cfg1</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:249</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a3f7af336f7077bfd200b961772668576"><div class="ttname"><a href="structsdrv__adc.html#a3f7af336f7077bfd200b961772668576">sdrv_adc::int_sig_en</a></div><div class="ttdeci">uint32_t int_sig_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:229</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a426d140a6ce57d5dddb3cd70f06a54d5"><div class="ttname"><a href="structsdrv__adc.html#a426d140a6ce57d5dddb3cd70f06a54d5">sdrv_adc::mnt_single</a></div><div class="ttdeci">uint32_t mnt_single[SDRV_ADC_MNT_SINGLE_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:254</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a4f6d9c8dadfb38d7c44878cd6ae7f42f"><div class="ttname"><a href="structsdrv__adc.html#a4f6d9c8dadfb38d7c44878cd6ae7f42f">sdrv_adc::ana_ref_cfg2</a></div><div class="ttdeci">uint32_t ana_ref_cfg2</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:250</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a514e1114ecaa3ebd42e0eec98dbf952c"><div class="ttname"><a href="structsdrv__adc.html#a514e1114ecaa3ebd42e0eec98dbf952c">sdrv_adc::reserved3</a></div><div class="ttdeci">uint8_t reserved3[0x100 - 0xDC]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:239</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a58bb05451acc6704e96dd3bce5c57cc3"><div class="ttname"><a href="structsdrv__adc.html#a58bb05451acc6704e96dd3bce5c57cc3">sdrv_adc::mnt_cont</a></div><div class="ttdeci">uint32_t mnt_cont</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:255</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a5e8874e5f0697db61f24c48db7f2b5ce"><div class="ttname"><a href="structsdrv__adc.html#a5e8874e5f0697db61f24c48db7f2b5ce">sdrv_adc::dbg_reg_ctrl</a></div><div class="ttdeci">uint32_t dbg_reg_ctrl</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:282</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a66192fdcd8a07904bb496cfe6d875e77"><div class="ttname"><a href="structsdrv__adc.html#a66192fdcd8a07904bb496cfe6d875e77">sdrv_adc::ana_para</a></div><div class="ttdeci">uint32_t ana_para[SDRV_ADC_ANA_PARAM_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:253</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a665ee01cc26f8f334c65ef1e320cc243"><div class="ttname"><a href="structsdrv__adc.html#a665ee01cc26f8f334c65ef1e320cc243">sdrv_adc::mnt_thrd_single</a></div><div class="ttdeci">uint32_t mnt_thrd_single[SDRV_ADC_MNT_SINGLE_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:256</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a694e80da568e54ecabe5de5dd04cd036"><div class="ttname"><a href="structsdrv__adc.html#a694e80da568e54ecabe5de5dd04cd036">sdrv_adc::fusa_unc_err_int_sig_en</a></div><div class="ttdeci">uint32_t fusa_unc_err_int_sig_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:276</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a6a663889846e34d019764df6e389b3b9"><div class="ttname"><a href="structsdrv__adc.html#a6a663889846e34d019764df6e389b3b9">sdrv_adc::fusa_cor_err_int_stat_en</a></div><div class="ttdeci">uint32_t fusa_cor_err_int_stat_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:271</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a6a823622684e9be2493b15268e8e7f92"><div class="ttname"><a href="structsdrv__adc.html#a6a823622684e9be2493b15268e8e7f92">sdrv_adc::unc_err_int_sig_en</a></div><div class="ttdeci">uint32_t unc_err_int_sig_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:237</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a6a91b4e4865a927d2accedf57e7a54b8"><div class="ttname"><a href="structsdrv__adc.html#a6a91b4e4865a927d2accedf57e7a54b8">sdrv_adc::unc_err_int_stat</a></div><div class="ttdeci">uint32_t unc_err_int_stat</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:235</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a6ab9c2b41931d556f97367075755eb51"><div class="ttname"><a href="structsdrv__adc.html#a6ab9c2b41931d556f97367075755eb51">sdrv_adc::reg_prty_err_int_stat_en</a></div><div class="ttdeci">uint32_t reg_prty_err_int_stat_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:267</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a705ff64c7f08ec953f0a512256aa5ac5"><div class="ttname"><a href="structsdrv__adc.html#a705ff64c7f08ec953f0a512256aa5ac5">sdrv_adc::mnt_thrd_cont</a></div><div class="ttdeci">uint32_t mnt_thrd_cont</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:257</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a7ed9b00de564146e55feff160e0025e0"><div class="ttname"><a href="structsdrv__adc.html#a7ed9b00de564146e55feff160e0025e0">sdrv_adc::int_stat</a></div><div class="ttdeci">uint32_t int_stat</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:227</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a81aea7dd826959fd84c35b25179fccfc"><div class="ttname"><a href="structsdrv__adc.html#a81aea7dd826959fd84c35b25179fccfc">sdrv_adc::dcoc</a></div><div class="ttdeci">uint32_t dcoc</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:222</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a83a031f6172482a0911bc2ac14217ebe"><div class="ttname"><a href="structsdrv__adc.html#a83a031f6172482a0911bc2ac14217ebe">sdrv_adc::reserved7</a></div><div class="ttdeci">uint32_t reserved7</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:263</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a85879f9dc411f54efdc9c3ef7593122e"><div class="ttname"><a href="structsdrv__adc.html#a85879f9dc411f54efdc9c3ef7593122e">sdrv_adc::cor_err_int_stat_en</a></div><div class="ttdeci">uint32_t cor_err_int_stat_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:232</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a8b3e66724f273b98a0b43099ea56e4a0"><div class="ttname"><a href="structsdrv__adc.html#a8b3e66724f273b98a0b43099ea56e4a0">sdrv_adc::conv_rcht</a></div><div class="ttdeci">uint64_t conv_rcht</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:278</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a8fa2182ad6c5fedee6172ae515b50ed1"><div class="ttname"><a href="structsdrv__adc.html#a8fa2182ad6c5fedee6172ae515b50ed1">sdrv_adc::fusa_cor_err_int_sig_en</a></div><div class="ttdeci">uint32_t fusa_cor_err_int_sig_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:272</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a9164715389721fbe6735572e7c1f52ae"><div class="ttname"><a href="structsdrv__adc.html#a9164715389721fbe6735572e7c1f52ae">sdrv_adc::dbg_reg</a></div><div class="ttdeci">uint32_t dbg_reg[10]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:283</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a92c09e83b4543b25e880eeb37b589556"><div class="ttname"><a href="structsdrv__adc.html#a92c09e83b4543b25e880eeb37b589556">sdrv_adc::fifo_cfg</a></div><div class="ttdeci">uint32_t fifo_cfg</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:260</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a97ba2f19ffed2f91f8191461ea1c761f"><div class="ttname"><a href="structsdrv__adc.html#a97ba2f19ffed2f91f8191461ea1c761f">sdrv_adc::soft_rst</a></div><div class="ttdeci">uint32_t soft_rst</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:220</div></div>
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<div class="ttc" id="astructsdrv__adc_html_a9f6b7002711611e1fd3eca3856d5dea2"><div class="ttname"><a href="structsdrv__adc.html#a9f6b7002711611e1fd3eca3856d5dea2">sdrv_adc::dma_cfg</a></div><div class="ttdeci">uint32_t dma_cfg</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:262</div></div>
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<div class="ttc" id="astructsdrv__adc_html_aa057249336f6730cecbac0320a93d891"><div class="ttname"><a href="structsdrv__adc.html#aa057249336f6730cecbac0320a93d891">sdrv_adc::fifo</a></div><div class="ttdeci">uint32_t fifo[SDRV_ADC_SUB_FIFO_CNT][16]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:264</div></div>
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<div class="ttc" id="astructsdrv__adc_html_aa13d9fa8a8668b44d58f3969b703b3c9"><div class="ttname"><a href="structsdrv__adc.html#aa13d9fa8a8668b44d58f3969b703b3c9">sdrv_adc::rc_entry</a></div><div class="ttdeci">uint32_t rc_entry[SDRV_ADC_RC_CNT][SDRV_ADC_RC_ENTRY_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:240</div></div>
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<div class="ttc" id="astructsdrv__adc_html_aa3717de5b519110a706ee6c5b3a2095a"><div class="ttname"><a href="structsdrv__adc.html#aa3717de5b519110a706ee6c5b3a2095a">sdrv_adc::int_stat_en</a></div><div class="ttdeci">uint32_t int_stat_en</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:228</div></div>
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<div class="ttc" id="astructsdrv__adc_html_aa6eca1fc8d656da93712f4450a53d771"><div class="ttname"><a href="structsdrv__adc.html#aa6eca1fc8d656da93712f4450a53d771">sdrv_adc::ate_test</a></div><div class="ttdeci">uint32_t ate_test</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:280</div></div>
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<div class="ttc" id="astructsdrv__adc_html_aafd17742ae2123c2b70c520f3a179d66"><div class="ttname"><a href="structsdrv__adc.html#aafd17742ae2123c2b70c520f3a179d66">sdrv_adc::cont_mode</a></div><div class="ttdeci">uint32_t cont_mode</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:251</div></div>
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<div class="ttc" id="astructsdrv__adc_html_ab20850566cdb4b2a9dbc9902d0e4f12a"><div class="ttname"><a href="structsdrv__adc.html#ab20850566cdb4b2a9dbc9902d0e4f12a">sdrv_adc::rcht_entry</a></div><div class="ttdeci">uint32_t rcht_entry[SDRV_ADC_RCHT_ENTRY_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:224</div></div>
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<div class="ttc" id="astructsdrv__adc_html_abca5883a4b47a03eb2fd1580b04c7d79"><div class="ttname"><a href="structsdrv__adc.html#abca5883a4b47a03eb2fd1580b04c7d79">sdrv_adc::fusa_unc_err_int_stat</a></div><div class="ttdeci">uint32_t fusa_unc_err_int_stat</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:274</div></div>
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<div class="ttc" id="astructsdrv__adc_html_ac5491406e22ea5d46bb2f7b52b02e01d"><div class="ttname"><a href="structsdrv__adc.html#ac5491406e22ea5d46bb2f7b52b02e01d">sdrv_adc::sch_cfg</a></div><div class="ttdeci">uint32_t sch_cfg</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:245</div></div>
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<div class="ttc" id="astructsdrv__adc_html_ac561b0fc6c903d291607ad5aad00cce4"><div class="ttname"><a href="structsdrv__adc.html#ac561b0fc6c903d291607ad5aad00cce4">sdrv_adc::mnt_cont_cfg</a></div><div class="ttdeci">uint32_t mnt_cont_cfg</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:259</div></div>
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<div class="ttc" id="astructsdrv__adc_html_ace8c8c834d463935150174e9f176ffaf"><div class="ttname"><a href="structsdrv__adc.html#ace8c8c834d463935150174e9f176ffaf">sdrv_adc::reserved9</a></div><div class="ttdeci">uint32_t reserved9</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:273</div></div>
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<div class="ttc" id="astructsdrv__adc_html_acf6b73817d007178360e19e93eace418"><div class="ttname"><a href="structsdrv__adc.html#acf6b73817d007178360e19e93eace418">sdrv_adc::reserved10</a></div><div class="ttdeci">uint8_t reserved10[0x460 - 0x42C]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:277</div></div>
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<div class="ttc" id="astructsdrv__adc_html_ade1c502cf0967a19aa4a4fc688457222"><div class="ttname"><a href="structsdrv__adc.html#ade1c502cf0967a19aa4a4fc688457222">sdrv_adc::sch_tmo</a></div><div class="ttdeci">uint32_t sch_tmo</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:243</div></div>
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<div class="ttc" id="astructsdrv__adc_html_ae673672452e4741c4ab7c174af880a87"><div class="ttname"><a href="structsdrv__adc.html#ae673672452e4741c4ab7c174af880a87">sdrv_adc::reserved2</a></div><div class="ttdeci">uint32_t reserved2</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:234</div></div>
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<div class="ttc" id="astructsdrv__adc_html_aeacf6b08f8034e48b477bca1cfd4d4ad"><div class="ttname"><a href="structsdrv__adc.html#aeacf6b08f8034e48b477bca1cfd4d4ad">sdrv_adc::rc</a></div><div class="ttdeci">uint32_t rc[SDRV_ADC_RC_CNT]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:226</div></div>
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<div class="ttc" id="astructsdrv__adc_html_aef9bb556c1530f5d648fd57e73b9a105"><div class="ttname"><a href="structsdrv__adc.html#aef9bb556c1530f5d648fd57e73b9a105">sdrv_adc::reserved1</a></div><div class="ttdeci">uint32_t reserved1</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:230</div></div>
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<div class="ttc" id="astructsdrv__adc_html_af14265d915b2e6711672cd9a16b08d36"><div class="ttname"><a href="structsdrv__adc.html#af14265d915b2e6711672cd9a16b08d36">sdrv_adc::cor_err_int_stat</a></div><div class="ttdeci">uint32_t cor_err_int_stat</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:231</div></div>
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<div class="ttc" id="astructsdrv__adc_html_af3ad7fbb98539c2233d6cfbba6e7a4af"><div class="ttname"><a href="structsdrv__adc.html#af3ad7fbb98539c2233d6cfbba6e7a4af">sdrv_adc::reserved6</a></div><div class="ttdeci">uint32_t reserved6[2]</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:258</div></div>
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<div class="ttc" id="astructsdrv__adc_html_afec7a0ef2e446e207bcf8c54bce6e3c2"><div class="ttname"><a href="structsdrv__adc.html#afec7a0ef2e446e207bcf8c54bce6e3c2">sdrv_adc::cont_mode1</a></div><div class="ttdeci">uint32_t cont_mode1</div><div class="ttdef"><b>Definition:</b> sdrv_adc.h:252</div></div>
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