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<p><code>#include &lt;<a class="el" href="sdrv__watchdog_8h_source.html">sdrv_watchdog.h</a>&gt;</code></p>
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Data Fields</h2></td></tr>
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<tr class="memitem:ab5627d8d8b095c198e2523c44ca380ac"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__wdt__config.html#ab5627d8d8b095c198e2523c44ca380ac">timeout</a></td></tr>
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<h2 class="groupheader">Field Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a4fbb29902a8e68cabb1149ca70e8adb2">&#9670;&nbsp;</a></span>auto_restart</h2>
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<td class="memname">bool auto_restart</td>
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<p >WDT overflow auto restart enable. </p>
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<td class="memname"><a class="el" href="sdrv__watchdog_8h.html#abb3b55bd2169a431a69c4aea51b91cb8">sdrv_wdt_clock_e</a> clk_src</td>
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<p >WDT clock source. </p>
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<td class="memname"><a class="el" href="sdrv__watchdog_8h.html#af2949d4870e6b062bf5719aa3d9ecc10">sdrv_wdt_external_reset_t</a> ext_rst</td>
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<p >WDT external reset. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a75901ed54fd1b29db872bfa92faa6723">&#9670;&nbsp;</a></span>int_rst</h2>
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<td class="memname"><a class="el" href="sdrv__watchdog_8h.html#a3865646bf93ac52a830ee511317a4f01">sdrv_wdt_internal_reset_t</a> int_rst</td>
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<p >WDT internal reset. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#af86d295d9b690d6dd3cb627b3ed509e0">&#9670;&nbsp;</a></span>intr_bitmap</h2>
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<td class="memname">uint32_t intr_bitmap</td>
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<p >WDT interrupt enable bitmap. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a3d20d10222971c79cfa2afdc8332ff06">&#9670;&nbsp;</a></span>pre_divide</h2>
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<td class="memname">uint16_t pre_divide</td>
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<p >Clock pre-divider ratio, 0 ~ 0xFFFF. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#adf6fc3bebb05aa32b96459b62691a90c">&#9670;&nbsp;</a></span>refresh</h2>
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<p >WDT refresh mode. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a94e694d7a7a185d5d37f9035381ddb26">&#9670;&nbsp;</a></span>seq_delta</h2>
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<td class="memname">uint32_t seq_delta</td>
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<p >WDT refresh sequence delta, unit: ms. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#ab5627d8d8b095c198e2523c44ca380ac">&#9670;&nbsp;</a></span>timeout</h2>
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<td class="memname">uint32_t timeout</td>
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<p >WDT timeout value, unit: ms. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a573465cab52555508cb40dcf41dea89c">&#9670;&nbsp;</a></span>wdt_en_src</h2>
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<td class="memname">uint8_t wdt_en_src</td>
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<p >WDT enable control by: 0-Fuse, 1-Software. </p>
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<a id="a0bc0363bcbdec22355911327e7342390" name="a0bc0363bcbdec22355911327e7342390"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0bc0363bcbdec22355911327e7342390">&#9670;&nbsp;</a></span>window_low</h2>
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<td class="memname">uint32_t window_low</td>
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<p >WDT refresh window low limit, unit: ms. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#ab529be6cb9cf564522cdad0dd2c66691">&#9670;&nbsp;</a></span>wtc_src</h2>
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<td class="memname">uint8_t wtc_src</td>
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<p >WDT terminal count config by: 0-Fuse, 1-Software. </p>
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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/<a class="el" href="sdrv__watchdog_8h_source.html">sdrv_watchdog.h</a></li>
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