liumin/test
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases 1 Wiki Activity
Files
b6a63efc9ef56ae11f26c28e3b049e520f9218ad
test/doc/Doxygen/html/sdrv__sdramc_8h_source.html
liumin 846bd3bbda 增加所有文件
2025-11-07 20:19:23 +08:00

488 lines
95 KiB
HTML
Raw Blame History

<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=11"/>
<meta name="generator" content="Doxygen 1.9.4"/>
<meta name="viewport" content="width=device-width, initial-scale=1"/>
<title>SemiDrive SSDK Appication Program Interface: Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/sdrv_sdramc.h Source File</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="search/search.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="search/searchdata.js"></script>
<script type="text/javascript" src="search/search.js"></script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
<tbody>
<tr id="projectrow">
<td id="projectalign">
<div id="projectname">SemiDrive SSDK Appication Program Interface<span id="projectnumber">&#160;PTG3.0</span>
</div>
</td>
</tr>
</tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.9.4 -->
<script type="text/javascript">
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
var searchBox = new SearchBox("searchBox", "search",'Search','.html');
/* @license-end */
</script>
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
$(function() {
initMenu('',true,false,'search.php','Search');
$(document).ready(function() { init_search(); });
});
/* @license-end */
</script>
<div id="main-nav"></div>
<!-- window showing the filter options -->
<div id="MSearchSelectWindow"
onmouseover="return searchBox.OnSearchSelectShow()"
onmouseout="return searchBox.OnSearchSelectHide()"
onkeydown="return searchBox.OnSearchSelectKey(event)">
</div>
<!-- iframe showing the search results (closed by default) -->
<div id="MSearchResultsWindow">
<iframe src="javascript:void(0)" frameborder="0"
name="MSearchResults" id="MSearchResults">
</iframe>
</div>
<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_ee023d43c33bfccc31aa50a48a76892b.html">include</a></li> </ul>
</div>
</div><!-- top -->
<div class="header">
<div class="headertitle"><div class="title">sdrv_sdramc.h</div></div>
</div><!--header-->
<div class="contents">
<a href="sdrv__sdramc_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno"> 1</span> </div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno"> 9</span><span class="preprocessor">#ifndef SDRV_SDRAMC_H_</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno"> 10</span><span class="preprocessor">#define SDRV_SDRAMC_H_</span></div>
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno"> 11</span> </div>
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno"> 12</span><span class="preprocessor">#include &lt;types.h&gt;</span></div>
<div class="line"><a id="l00013" name="l00013"></a><span class="lineno"> 13</span><span class="preprocessor">#include &lt;debug.h&gt;</span></div>
<div class="line"><a id="l00014" name="l00014"></a><span class="lineno"> 14</span><span class="preprocessor">#include &lt;reg.h&gt;</span></div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno"> 15</span><span class="preprocessor">#include &lt;<a class="code" href="sdrv__sdramc_8h.html">sdrv_sdramc.h</a>&gt;</span></div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno"> 16</span><span class="preprocessor">#include &lt;<a class="code" href="sdrv__common_8h.html">sdrv_common.h</a>&gt;</span></div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno"> 17</span> </div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno"> 18</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno"> 19</span><span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno"> 20</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno"> 21</span> </div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno"> 22</span><span class="comment">//#define ENABLE_SDRAMC_CTL_DATA_DEBUG</span></div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno"> 23</span><span class="preprocessor">#ifdef ENABLE_SDRAMC_CTL_DATA_DEBUG</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno"> 24</span><span class="preprocessor">#define SDRAMC_CTL_DATA_DEBUG(format, ...) printf(format, ##__VA_ARGS__)</span></div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno"> 25</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abba043b20aa0a330afc49d09e6075f08"> 26</a></span><span class="preprocessor">#define SDRAMC_CTL_DATA_DEBUG(format, ...)</span></div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno"> 27</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno"> 28</span> </div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno"> 29</span><span class="comment">//#define WITH_DDR_DEBUG</span></div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno"> 30</span><span class="preprocessor">#ifdef WITH_DDR_DEBUG</span></div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno"> 31</span><span class="preprocessor">#define ddr_readl(reg) \</span></div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno"> 32</span><span class="preprocessor"> readl(reg); \</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno"> 33</span><span class="preprocessor"> ssdk_printf(SSDK_EMERG, &quot;r(0x%x, r(0x%08x)\r\n&quot;</span>, reg, readl(reg));</div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno"> 34</span><span class="preprocessor">#define ddr_writel(val, reg) \</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno"> 35</span><span class="preprocessor"> writel(val, reg); \</span></div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno"> 36</span><span class="preprocessor"> ssdk_printf(SSDK_EMERG, &quot;w(0x%x, 0x%08x), r(0x%08x)\r\n&quot;</span>, reg, val, \</div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno"> 37</span> readl(reg));</div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno"> 38</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a4d0cd41069b5d69e3b1975848d4b159e"> 39</a></span><span class="preprocessor">#define ddr_writel(val, reg) writel(val, reg)</span></div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a05b6ae57b484a0e22271b30bae269f13"> 40</a></span><span class="preprocessor">#define ddr_readl(reg) readl(reg)</span></div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno"> 41</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno"> 42</span> </div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno"> 43</span><span class="preprocessor">#undef BIT</span></div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a4eaf4bf81c52c3f375967906e4d5ba17"> 44</a></span><span class="preprocessor">#define BIT(nr) ((uint32_t)1u &lt;&lt; (nr))</span></div>
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno"> 45</span> </div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa5a0c43bb0a31d043cc41bfd86045959"> 46</a></span><span class="preprocessor">#define SDRAMC_NS_2_TICKS(hz, ns) (((hz) / 10000u * (ns) + 100000u) / 100000u)</span></div>
<div class="line"><a id="l00047" name="l00047"></a><span class="lineno"> 47</span> </div>
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a28e01008f23c1d8ad18c628b1eb9c4a5"> 48</a></span><span class="preprocessor">#define SDRAMC_INIT (0x0u)</span></div>
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a05aba9a93fc5d7e8573eeb38d357ceb8"> 49</a></span><span class="preprocessor">#define SDRAMC_INIT_DONE BIT(31)</span></div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a3db5a6f02bf089068b16ff6f00fc2969"> 50</a></span><span class="preprocessor">#define SDRAMC_INIT_SOFT_RESET BIT(8)</span></div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae4221d8c1ec1f0e3324e8078b66177e6"> 51</a></span><span class="preprocessor">#define SDRAMC_INIT_CLK_OUT_EN BIT(4)</span></div>
<div class="line"><a id="l00052" name="l00052"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ac9cff68251b7fde96f8e15f0aac3530f"> 52</a></span><span class="preprocessor">#define SDRAMC_INIT_SDR_SYNC_FLUSH BIT(3)</span></div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad1553229687ce1365bfa496dc74197d2"> 53</a></span><span class="preprocessor">#define SDRAMC_INIT_DDR_ASYNC_FLUSH_B BIT(2)</span></div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a09e0935163bba161d7cf4c689f4e79fc"> 54</a></span><span class="preprocessor">#define SDRAMC_INIT_CFG_MRS BIT(1)</span></div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a39b1b2af7b816324bf9efedeaa970366"> 55</a></span><span class="preprocessor">#define SDRAMC_INIT_START BIT(0)</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno"> 56</span> </div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a929358f4b646c4f5b5e08c2bbe355a4e"> 57</a></span><span class="preprocessor">#define SDRAMC_AXI_RDY_CNT (0x4u)</span></div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a092bc7c0db0ccacb29d45127a848eda9"> 58</a></span><span class="preprocessor">#define SDRAMC_AXI_RDY_CNT_R_CH_LSB (16u)</span></div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a4503422240cefe42b0d75b11349fd47e"> 59</a></span><span class="preprocessor">#define SDRAMC_AXI_RDY_CNT_B_CH_LSB (0u)</span></div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno"> 60</span> </div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aeac02fb60186f0b84ae130cd2b7ecb7e"> 61</a></span><span class="preprocessor">#define SDRAMC_AXI_FIFO_GAP (0x8u)</span></div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ac7e7c3663eba9d7974c9e41f4f3bb93c"> 62</a></span><span class="preprocessor">#define SDRAMC_AXI_FIFO_GAP_B_LSB (10u)</span></div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a22985f1dc5d6c2fd64e049350fef0281"> 63</a></span><span class="preprocessor">#define SDRAMC_AXI_FIFO_GAP_AR_LSB (8u)</span></div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1acaf22b58542dd8e6e16cdc01a1ae4b"> 64</a></span><span class="preprocessor">#define SDRAMC_AXI_FIFO_GAP_RD_LSB (6u)</span></div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a7ca5086c260dfb69cad078e02feaea78"> 65</a></span><span class="preprocessor">#define SDRAMC_AXI_FIFO_GAP_AW_LSB (4u)</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a768292b45d759d11b6e5ed7b75bd00b8"> 66</a></span><span class="preprocessor">#define SDRAMC_AXI_FIFO_GAP_WR_LSB (0u)</span></div>
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno"> 67</span> </div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#af777949a09934191e539b73714322a6e"> 68</a></span><span class="preprocessor">#define SDRAMC_BA (0x10u)</span></div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a688df20706a4c6a8b468feb091ecc7cb"> 69</a></span><span class="preprocessor">#define SDRAMC_BA_BASE_ADDR_LSB (0u)</span></div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno"> 70</span> </div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a32758eac766c620448c7ccd4e2577407"> 71</a></span><span class="preprocessor">#define RD_CLK (0x14u)</span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa6d87f1de17283866813c7513cb5f387"> 72</a></span><span class="preprocessor">#define RD_CLK_DUMMY_LSB (5u)</span></div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a31c9a098b7469ac620225c292a933b27"> 73</a></span><span class="preprocessor">#define RD_CLK_ASYNC_FIFO_RD_SEL_LSB (2u)</span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ac4b13a34ab62d5f6167a1b3909dafc81"> 74</a></span><span class="preprocessor">#define RD_CLK_SEL_LSB (0u)</span></div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno"> 75</span> </div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#add87ec667cb0d00a86fbd6e24edd50c2"> 76</a></span><span class="preprocessor">#define SDRAM_DDR_MODE (0x18u)</span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae50518e9cef76869db46f1460273c695"> 77</a></span><span class="preprocessor">#define SDRAM_DDR_MODE_CFG BIT(0)</span></div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno"> 78</span> </div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a10e3839f61e6da896306cc88ddc224d6"> 79</a></span><span class="preprocessor">#define SDRAM_BURST_MODE (0x1Cu)</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1ffc366d9a4a3624c6ee38c9c3341fac"> 80</a></span><span class="preprocessor">#define SDRAM_BURST_MODE_TYPE BIT(3)</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a271debe31eb2318ff9c2ffef7deaaa5f"> 81</a></span><span class="preprocessor">#define SDRAM_BURST_MODE_LSB (0u)</span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno"> 82</span> </div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a6f9acffeaed9960ca88e888d9ebff754"> 83</a></span><span class="preprocessor">#define SDRAM_WIDTH_MODE (0x20u)</span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a86d9ef5b7af21881056e000056e39276"> 84</a></span><span class="preprocessor">#define SDRAM_WIDTH_MODE_LSB (0u)</span></div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno"> 85</span> </div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aec56551987db8bcc80df6d204b6b88b5"> 86</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL (0x24u)</span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a454b0e29ce784f35eaf99f4613167d58"> 87</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RR_SCH_STATUS BIT(25)</span></div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a9439f8dd825b5816af142959f75ba0d2"> 88</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RR_SCH_MASK BIT(24)</span></div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a83352a27f288189bb9c5c5f96a43ecd8"> 89</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RR_SCH_SET BIT(23)</span></div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a95b720da2b10f062cc6e4a901f79e56f"> 90</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RETURN_STATUS BIT(22)</span></div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a14f88dba5cdfb2d3f9a3a8ff13936410"> 91</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_SCH_STATUS BIT(21)</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a749e55b8e7127440659c28d8bb2f48c2"> 92</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RD_STATUS BIT(20)</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1bfbfb2d05160d4c2fa8e70d127792ec"> 93</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_B_STATUS BIT(19)</span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ab3aac65871fde633638fe45786e802dc"> 94</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_WR_STATUS BIT(18)</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a07def013e8638a87d9d075ca785d5117"> 95</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_AW_STATUS BIT(17)</span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a5490ecb3e333d5e2097915aad5cb2686"> 96</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_AR_STATUS BIT(16)</span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa702ef77e3ffcb26da76dbae3b7835c5"> 97</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RETURN_MASK BIT(14)</span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aefdfc5c4d1ca32a7a4d962a7053028bd"> 98</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_SCH_MASK BIT(13)</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a01de6af9a71323429e02c2ebeb99d165"> 99</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RD_MASK BIT(12)</span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ac701faaf890654a884bcd3f16e1c221b"> 100</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_B_MASK BIT(11)</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a83189902e8fe10ccf9cbdff54b80b8cf"> 101</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_WR_MASK BIT(10)</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a40a8975e1a29a028f44c27ab51b2769e"> 102</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_AW_MASK BIT(9)</span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a17d5dcf27aa4b22fff5b3c2a215dc637"> 103</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_AR_MASK BIT(8)</span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1bd1a7defe9fea4a7565f135ec191302"> 104</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RETURN_SET BIT(6)</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a52f300aaa67df2ffd14dad4ef083b35c"> 105</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_SCH_SET BIT(5)</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#af8331af74af85d5bdf19fb8d046bce3d"> 106</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_RD_SET BIT(4)</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad6adc2443d9e5cc92ec1458600cf13f0"> 107</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_B_SET BIT(3)</span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad0b5b256f760000126817c0695761001"> 108</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_WR_SET BIT(2)</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a82a400f7f84f264ff961c37e7e5f5b8a"> 109</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_AW_SET BIT(1)</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a6d909074a7f7034a9ed3770b8b381271"> 110</a></span><span class="preprocessor">#define SDRAMC_FLOW_CTRL_AR_SET BIT(0)</span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno"> 111</span> </div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a4bf90a83b734d18c1a3a4e274e603a90"> 112</a></span><span class="preprocessor">#define SDRAMC_INTERRUPT (0x28u)</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno"> 113</span> </div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1c46f6820771a2b2ced357116a2589fe"> 114</a></span><span class="preprocessor">#define SDRAMC_INTERRUPT_EN (0x2Cu)</span></div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno"> 115</span> </div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno"> 116</span><span class="comment">// #define SDRAMC_SHARE_BUFFER_GAP (0x28u)</span></div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno"> 117</span><span class="comment">// #define SDRAMC_SHARE_BUFFER_GAP_LSB (0u)</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno"> 118</span> </div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno"> 119</span><span class="comment">// #define SDRAMC_QUEUE_ALFUL_GAP (0x2Cu)</span></div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno"> 120</span><span class="comment">// #define SDRAMC_QUEUE_ALFUL_GAP_LSB (0u)</span></div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno"> 121</span> </div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a6f37d05944b87687ca9790ad2ca861c8"> 122</a></span><span class="preprocessor">#define SDRAMC_SCH_WEIGHT (0x30u)</span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a193a7981db40e4e5958fd01f691543ab"> 123</a></span><span class="preprocessor">#define SDRAMC_SCH_WEIGHT_RW_W_LSB (24u)</span></div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a7bdeb6d3ecfc837a83825eaf08363f9a"> 124</a></span><span class="preprocessor">#define SDRAMC_SCH_WEIGHT_PAGE_W_LSB (16u)</span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a51ce0fe56cb0fd6a502ee54a6d367925"> 125</a></span><span class="preprocessor">#define SDRAMC_SCH_WEIGHT_BANKIDLE_W_LSB (8u)</span></div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a770be1038b5861d7fcc8e9bad7799231"> 126</a></span><span class="preprocessor">#define SDRAMC_SCH_WEIGHT_QOS_W_LSB (0u)</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno"> 127</span> </div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa89bf706c5bd08254966bc046ae6d28a"> 128</a></span><span class="preprocessor">#define SDRAMC_AGING_WEIGHT (0x34u)</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a3a1904f1c4689f61df7817038cab1a90"> 129</a></span><span class="preprocessor">#define SDRAMC_AGING_WEIGHT_LSB (0u)</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno"> 130</span> </div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a80b13e7398d2117bb629c63db81bb14e"> 131</a></span><span class="preprocessor">#define SDRAMC_CAS_MODE (0x38u)</span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a43291eb3f6a1f92f246d0cc60927e110"> 132</a></span><span class="preprocessor">#define SDRAMC_CAS_MODE_RD_NONE_DLY (8u)</span></div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aabb5f95a068e0ce590dda089c7d325b9"> 133</a></span><span class="preprocessor">#define SDRAMC_CAS_MODE_LSB (0u)</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno"> 134</span> </div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a7a86e8e603227ba42bcc8f12fd253479"> 135</a></span><span class="preprocessor">#define SDRAMC_OPERATING_MODE (0x3Cu)</span></div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a51fd37ea78d345f4fdcebb5d880d7dab"> 136</a></span><span class="preprocessor">#define SDRAMC_OPERATING_MODE_A13_A9_LSB (16u)</span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a945bf2956293063d54dc3c5eba577d32"> 137</a></span><span class="preprocessor">#define SDRAMC_OPERATING_MODE_LSB (0u)</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno"> 138</span> </div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a61a86e66469bfcd6c3247a0703d9d4e9"> 139</a></span><span class="preprocessor">#define SDRAMC_EXTEND_CONTROL (0x40u)</span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a50e2c354857aeee90140fd2511fb2674"> 140</a></span><span class="preprocessor">#define SDRAMC_EXTEND_CONTROL_A13_A2_LSB (16u)</span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1075f9fcc098a2eee425f7e27360bbb7"> 141</a></span><span class="preprocessor">#define SDRAMC_EXTEND_CONTROL_DRIVE_STRENGTH (1u)</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae1103907ee225c3d2c332de04d4541da"> 142</a></span><span class="preprocessor">#define SDRAMC_EXTEND_CONTROL_DLL_EN (0u)</span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno"> 143</span> </div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a5898f26916dcb2cbae18e6e442f1b480"> 144</a></span><span class="preprocessor">#define SDRAMC_TIMING_REGS_PART1 (0x44u)</span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aadd68205fc8c801ef83dc51e2a99d702"> 145</a></span><span class="preprocessor">#define SDRAMC_TIMING_TRCD_LSB (24u)</span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a2ad9252f312abd78b0406973778d4f70"> 146</a></span><span class="preprocessor">#define SDRAMC_TIMING_TRFC_LSB (16u)</span></div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#af41c6d1269e56459feda44e2660a39cc"> 147</a></span><span class="preprocessor">#define SDRAMC_TIMING_TRC_LSB (8u)</span></div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae28ebea664102321ab343d08eda58f00"> 148</a></span><span class="preprocessor">#define SDRAMC_TIMING_TRAS_MIN_LSB (0u)</span></div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno"> 149</span> </div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1765a38f2768ccb32a2010b534ed0f62"> 150</a></span><span class="preprocessor">#define SDRAMC_TIMING_REGS_PART2 (0x48u)</span></div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad65cf8bb39407a5685af2bab7db594cd"> 151</a></span><span class="preprocessor">#define SDRAMC_TIMING_TWTR_LSB (24u)</span></div>
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aead8a57fefcf37313ae002a6bd2eefb8"> 152</a></span><span class="preprocessor">#define SDRAMC_TIMING_TWR_LSB (16u)</span></div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a812495807198c3a60071aecf72aff90a"> 153</a></span><span class="preprocessor">#define SDRAMC_TIMING_TRRD_LSB (8u)</span></div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a0ac8d1dbf508167cf40f64128a1a4e04"> 154</a></span><span class="preprocessor">#define SDRAMC_TIMING_TRP_LSB (0u)</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno"> 155</span> </div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abffbebb1c3b347644588e80f0a99f56a"> 156</a></span><span class="preprocessor">#define SDRAMC_TIMING_REGS_PART3 (0x4Cu)</span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a8d2151455a78210364ff3e3d816b5d5c"> 157</a></span><span class="preprocessor">#define SDRAMC_TIMING_CNT_200CYCLE_LSB (16u)</span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a23e64facd7369e432def9f08c52f9415"> 158</a></span><span class="preprocessor">#define SDRAMC_TIMING_TREFI_LSB (0u)</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno"> 159</span> </div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae5ceb6e97c6f82b1002e13d8d97e93b0"> 160</a></span><span class="preprocessor">#define SDRAMC_INIT_WAIT_CONT (0x50u)</span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae1d0d5f4a000d085a24f7e36dadcf79a"> 161</a></span><span class="preprocessor">#define SDRAMC_INIT_WAIT_CONT_200US (0u)</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno"> 162</span> </div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a0df16e2263f64c115da60e1b2f86f80a"> 163</a></span><span class="preprocessor">#define SDRAMC_ADDR_DIVED_MODE (0x54u)</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abab42d6206e05cf5f578281917f6708f"> 164</a></span><span class="preprocessor">#define SDRAMC_ADDR_DIVED_MODE_CS_START_LSB (24u)</span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a18be04365e87347c6346309355ed4f35"> 165</a></span><span class="preprocessor">#define SDRAMC_ADDR_DIVED_MODE_COLOW_START_LSB (16u)</span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a172df4aac8df593b8b562ca04fb4d091"> 166</a></span><span class="preprocessor">#define SDRAMC_ADDR_DIVED_MODE_BANK_START_LSB (8u)</span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ac5cc15cf16e9df2dfa0ba0c5d1b91efc"> 167</a></span><span class="preprocessor">#define SDRAMC_ADDR_DIVED_MODE_ROW_MODE_LSB (5u)</span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a3e614c5522d51eec4cc2c06c27790d73"> 168</a></span><span class="preprocessor">#define SDRAMC_ADDR_DIVED_MODE_ROW_START_LSB (0u)</span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno"> 169</span> </div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aac4ff656bd8379f42f10b6cc2d1c3964"> 170</a></span><span class="preprocessor">#define SDRAMC_CHIP_SELECT_MODE (0x58u)</span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a3c93c559ce6d048b175a987dff00e3b1"> 171</a></span><span class="preprocessor">#define SDRAMC_CHIP_SELECT_COLOW_MODE_LSB (2u)</span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#af4f8008a145595cb7eab408c5e83f0a6"> 172</a></span><span class="preprocessor">#define SDRAMC_CHIP_SELECT_MODE_LSB (0u)</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno"> 173</span> </div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a5f2fcd1bd636e18de3142cf20200881d"> 174</a></span><span class="preprocessor">#define SDRAMC_RETURN_FC_GAP (0x5Cu)</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad24745582e00c23d3b00f5cd2528b445"> 175</a></span><span class="preprocessor">#define SDRAMC_RETURN_FC_GAP_LSB (0u)</span></div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno"> 176</span> </div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a2384bf9d0659c30405fdca44eb593605"> 177</a></span><span class="preprocessor">#define SDRAMC_BANK_MODE (0x60u)</span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a414b446c026592d533949b23422ac06d"> 178</a></span><span class="preprocessor">#define SDRAMC_BANK_MODE_LSB (0u)</span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno"> 179</span> </div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a7bec8e260b62e7e8895ca54332590751"> 180</a></span><span class="preprocessor">#define SDRAMC_TIMING_REGS_PART4 (0x64u)</span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a43a8e42b43419c9d2d4f1559ac184bc1"> 181</a></span><span class="preprocessor">#define SDRAMC_TIMING_TXSRD_LSB (16u)</span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ada1be84af243c1ea92e98ce4347b4fb9"> 182</a></span><span class="preprocessor">#define SDRAMC_TIMING_TRAS_MAX_LSB (0u)</span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno"> 183</span> </div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae3c66b38376e4c685453c03ab622c977"> 184</a></span><span class="preprocessor">#define SDRAMC_MRD (0x68u)</span></div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abbecdbe0f2ec64053ab1125cdc093869"> 185</a></span><span class="preprocessor">#define SDRAMC_MRD_TMR_LSB (0u)</span></div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno"> 186</span> </div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a7467f984ffa4604b0ca6b51d7340420d"> 187</a></span><span class="preprocessor">#define SDRAMC_CFG_CMD (0x6Cu)</span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a5830bbd7d34cf78e646e6c6024fa25b1"> 188</a></span><span class="preprocessor">#define SDRAMC_CFG_CMD_SELF_REFRESH BIT(0)</span></div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno"> 189</span> </div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a85342654bd79dd0d858e801b0b46ea1e"> 190</a></span><span class="preprocessor">#define SDRAMC_CFG_PWR_DWN (0x70u)</span></div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a6563e60b53706fa5b374e47392863c52"> 191</a></span><span class="preprocessor">#define SDRAMC_CFG_PWR_DWN_EN BIT(0)</span></div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno"> 192</span> </div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1a2c63e8edef4867396542d0f9c9a808"> 193</a></span><span class="preprocessor">#define WCMD_ERR_INT_SET (0x74u)</span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a9da9dd77e58f89c6508c8ffbcbabdcf3"> 194</a></span><span class="preprocessor">#define WCMD_ERR_INT_SET_CLR BIT(0)</span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno"> 195</span> </div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acf69889a4a83041bd58409a5fe504b41"> 196</a></span><span class="preprocessor">#define SDRAMC_AXI_AWCNT (0x78u)</span></div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1f878d57ac4798461935a8ad0988e5ab"> 197</a></span><span class="preprocessor">#define SDRAMC_AXI_AWCNT_LSB (0u)</span></div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno"> 198</span> </div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad29418db423dee26483a1ff995042294"> 199</a></span><span class="preprocessor">#define SDRAMC_AXI_WCNT (0x7Cu)</span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a48529871ff674837d44e33246d77e837"> 200</a></span><span class="preprocessor">#define SDRAMC_AXI_WCNT_LSB (0u)</span></div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno"> 201</span> </div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1a166b88792c74d92fad106294801f00"> 202</a></span><span class="preprocessor">#define SDRAMC_AXI_ARCNT (0x80u)</span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a8e50d3a2c9445b6a72de1e7da12d81df"> 203</a></span><span class="preprocessor">#define SDRAMC_AXI_ARCNT_LSB (0u)</span></div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno"> 204</span> </div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ada71b6152a10d75c21e0158f046590cc"> 205</a></span><span class="preprocessor">#define SDRAMC_AXI_BRESP_CNT (0x84u)</span></div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a568ea4b82b05a2183737308d91049872"> 206</a></span><span class="preprocessor">#define SDRAMC_AXI_BRESP_CNT_LSB (0u)</span></div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno"> 207</span> </div>
<div class="line"><a id="l00208" name="l00208"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abf63707fafcceab20f3fee6fcd2e208c"> 208</a></span><span class="preprocessor">#define SDRAMC_AXI_RCNT (0x88u)</span></div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a9e59cd401e132d1942735fc3cf823679"> 209</a></span><span class="preprocessor">#define SDRAMC_AXI_RCNT_LSB (0u)</span></div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno"> 210</span> </div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aaa07e7617e8eecf73dac75d32e4ec363"> 211</a></span><span class="preprocessor">#define SDRAMC_DRAM_RCNT (0x8Cu)</span></div>
<div class="line"><a id="l00212" name="l00212"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#af75e9faee89733c55bb2434e585d2677"> 212</a></span><span class="preprocessor">#define SDRAMC_DRAM_RCNT_LSB (0u)</span></div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno"> 213</span> </div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a698293aea33a204d7d6f44647ebcf5a0"> 214</a></span><span class="preprocessor">#define SDRAMC_DRAM_WCNT (0x90u)</span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad491ea562b95b64aaaa9a0412c0df09c"> 215</a></span><span class="preprocessor">#define SDRAMC_DRAM_WCNT_LSB (0u)</span></div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno"> 216</span> </div>
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aab7370c96d78215adeec6db75880a412"> 217</a></span><span class="preprocessor">#define SDRAMC_DRAM_DCNT (0x94u)</span></div>
<div class="line"><a id="l00218" name="l00218"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aaf1543c5f869172beb31979f9d4ad48a"> 218</a></span><span class="preprocessor">#define SDRAMC_DRAM_DCNT_LSB (0u)</span></div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"> 219</span> </div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a4a49ea4d3c84981b454c6cce9d55b22a"> 220</a></span><span class="preprocessor">#define SDRAMC_DLL0 (0x98u)</span></div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a42eef360b28173c1a31cece31bac6581"> 221</a></span><span class="preprocessor">#define SDRAMC_DLL0_SLVUPDGATE BIT(31)</span></div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a0f78b9f537115e02066fbc5a28fac45b"> 222</a></span><span class="preprocessor">#define SDRAMC_DLL0_REFUPDINT1_LSB (28u)</span></div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa0272857eafa270b0836353dbf5081ab"> 223</a></span><span class="preprocessor">#define SDRAMC_DLL0_REFUPDINT0_LSB (25u)</span></div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acfc9e8cfb6546b9f99f975e506815f8a"> 224</a></span><span class="preprocessor">#define SDRAMC_DLL0_REF0RSTV_LSB (18u)</span></div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a6bf9af5f9de2d3c521a8ab38a5815a83"> 225</a></span><span class="preprocessor">#define SDRAMC_DLL0_REFSEL1_LSB (16u)</span></div>
<div class="line"><a id="l00226" name="l00226"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abb03b41a62211559a0a4da4ef3c4186b"> 226</a></span><span class="preprocessor">#define SDRAMC_DLL0_OVRDVAL_LSB (9u)</span></div>
<div class="line"><a id="l00227" name="l00227"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a0c9ad1239cb5709ef1396070f448636e"> 227</a></span><span class="preprocessor">#define SDRAMC_DLL0_OVRDEN BIT(8)</span></div>
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a57bd5b34a741142b98845ba115be7cfd"> 228</a></span><span class="preprocessor">#define SDRAMC_DLL0_SLVTGRT_LSB (1u)</span></div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad56f4cfab7cd2098e89ca9a193423503"> 229</a></span><span class="preprocessor">#define SDRAMC_DLL0_DLLEN BIT(0)</span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno"> 230</span> </div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aebb0778826e16acb19e791f94fe0af43"> 231</a></span><span class="preprocessor">#define SDRAMC_DLL1 (0x9Cu)</span></div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a883b5acbee937d5052fe32513b69afeb"> 232</a></span><span class="preprocessor">#define SDRAMC_DLL1_SLVUPDGATE BIT(31)</span></div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad7f646b52f2630a4a02262f2413c11b4"> 233</a></span><span class="preprocessor">#define SDRAMC_DLL1_REFUPDINT1_LSB (28u)</span></div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a3f5351c271f073b2d00bf15483e9d12f"> 234</a></span><span class="preprocessor">#define SDRAMC_DLL1_REFUPDINT0_LSB (25u)</span></div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a63d2841ea842bd154d23a96aa39b2f7c"> 235</a></span><span class="preprocessor">#define SDRAMC_DLL1_REF0RSTV_LSB (18u)</span></div>
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae2753a1fcd0e1dc9ffa95778f33b05f4"> 236</a></span><span class="preprocessor">#define SDRAMC_DLL1_REFSEL1_LSB (16u)</span></div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a4cbe7722c70e0b17810acba7c8edec29"> 237</a></span><span class="preprocessor">#define SDRAMC_DLL1_OVRDVAL_LSB (9u)</span></div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ab18baa16d88cd64f33e309d321f23e4d"> 238</a></span><span class="preprocessor">#define SDRAMC_DLL1_OVRDEN BIT(8)</span></div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa5c3deea6df396ca56e9eeeeaf614f6a"> 239</a></span><span class="preprocessor">#define SDRAMC_DLL1_SLVTGRT_LSB (1u)</span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae6dd25b94b15449cbdb0096e82ba40a9"> 240</a></span><span class="preprocessor">#define SDRAMC_DLL1_DLLEN BIT(0)</span></div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno"> 241</span> </div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ab866ceb27861ec73435339d25255489f"> 242</a></span><span class="preprocessor">#define SDRAMC_DLL2 (0xA0u)</span></div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a454b0e98bb3c0bb1c228019d89ce0a67"> 243</a></span><span class="preprocessor">#define SDRAMC_DLL2_SLVUPDGATE BIT(31)</span></div>
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abd5f3333d74fa89267abe0e4f641a486"> 244</a></span><span class="preprocessor">#define SDRAMC_DLL2_REFUPDINT1_LSB (28u)</span></div>
<div class="line"><a id="l00245" name="l00245"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aef3e82a28d3eb473a428393bd1274ca8"> 245</a></span><span class="preprocessor">#define SDRAMC_DLL2_REFUPDINT0_LSB (25u)</span></div>
<div class="line"><a id="l00246" name="l00246"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa9c0448db69253a603f8c5f91e97596d"> 246</a></span><span class="preprocessor">#define SDRAMC_DLL2_REF0RSTV_LSB (18u)</span></div>
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aba136158aae41ead0966f4aa5c096162"> 247</a></span><span class="preprocessor">#define SDRAMC_DLL2_REFSEL1_LSB (16u)</span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a181e8a536d50751302205e4e6503e90b"> 248</a></span><span class="preprocessor">#define SDRAMC_DLL2_OVRDVAL_LSB (9u)</span></div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#abfd3f854870c87c9b0bae5a15b271609"> 249</a></span><span class="preprocessor">#define SDRAMC_DLL2_OVRDEN BIT(8)</span></div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ac1822eb188ab70439837da8f22169bba"> 250</a></span><span class="preprocessor">#define SDRAMC_DLL2_SLVTGRT_LSB (1u)</span></div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a04f265b02aa9c7c043a36f8dd63a6e73"> 251</a></span><span class="preprocessor">#define SDRAMC_DLL2_DLLEN BIT(0)</span></div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno"> 252</span> </div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a670249350c8b6abca841c5ad4b701143"> 253</a></span><span class="preprocessor">#define SDRAMC_DLL3 (0xA4u)</span></div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a516a97a964c84c407915374cc1dbb2ef"> 254</a></span><span class="preprocessor">#define SDRAMC_DLL3_SLVUPDGATE BIT(31)</span></div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa95b34be882cac1554ff9f9dcc7b9475"> 255</a></span><span class="preprocessor">#define SDRAMC_DLL3_REFUPDINT1_LSB (28u)</span></div>
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a76be45287a0e3e038d050be60da02dbd"> 256</a></span><span class="preprocessor">#define SDRAMC_DLL3_REFUPDINT0_LSB (25u)</span></div>
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a5616e7b583a35fd1b4cd451d57834f71"> 257</a></span><span class="preprocessor">#define SDRAMC_DLL3_REF0RSTV_LSB (18u)</span></div>
<div class="line"><a id="l00258" name="l00258"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ade98982df8a08d50db3148e17058248d"> 258</a></span><span class="preprocessor">#define SDRAMC_DLL3_REFSEL1_LSB (16u)</span></div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a4e0f18211b1a8f554d2761c61c7fcca3"> 259</a></span><span class="preprocessor">#define SDRAMC_DLL3_OVRDVAL_LSB (9u)</span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae12abc3cf0e714dbe343088684b48d3f"> 260</a></span><span class="preprocessor">#define SDRAMC_DLL3_OVRDEN BIT(8)</span></div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a8c6b78e5d0ffdd79940fa07208785d4e"> 261</a></span><span class="preprocessor">#define SDRAMC_DLL3_SLVTGRT_LSB (1u)</span></div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a0a0be76234deec7f1e8e302d9a041d1c"> 262</a></span><span class="preprocessor">#define SDRAMC_DLL3_DLLEN BIT(0)</span></div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno"> 263</span> </div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a5c26f63f8ec9ed2899ff658980665c08"> 264</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS0 (0xA8u)</span></div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a0130349b2d08cb0c5fec9449aab0bf70"> 265</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS0_SLVSEL_LSB (9u)</span></div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a3c24881b0bc309e651f869920d43a22b"> 266</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS0_SLVLOCK BIT(8)</span></div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a0b9d8257df1cc88920f277042d99fac8"> 267</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS0_REFSEL_LSB (1u)</span></div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a6acfc30045ea15735652742334ad50fd"> 268</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS0_REFLOCK BIT(0)</span></div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno"> 269</span> </div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a29af98a04a9bce4c6d943bbb24030eb8"> 270</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS1 (0xACu)</span></div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a7ed3a31c2f34ae8d81db058a1a9549cf"> 271</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS1_SLVSEL_LSB (9u)</span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1c6bc111e8fa660d89ddf82ebb2ef4a7"> 272</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS1_SLVLOCK BIT(8)</span></div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa2a26e51f583d88bb4dcdab73f367fe1"> 273</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS1_REFSEL_LSB (1u)</span></div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#afa541c7f88995a5460ee158bfbda2b7d"> 274</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS1_REFLOCK BIT(0)</span></div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno"> 275</span> </div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ab8af5a7ad6454864691ec46601a95230"> 276</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS2 (0xB0u)</span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aac95ddccd232d6a768cab37a8cd3d439"> 277</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS2_SLVSEL_LSB (9u)</span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#afb8f4480d4387bd845c9cffea03bf4a9"> 278</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS2_SLVLOCK BIT(8)</span></div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa43fde85b7d9b207da4a2735dcca6a08"> 279</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS2_REFSEL_LSB (1u)</span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acf457a259a61af09c58d1cc33154f41f"> 280</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS2_REFLOCK BIT(0)</span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno"> 281</span> </div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a2d146c4ffe20a4c38f2f024e1cecba58"> 282</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS3 (0xB4u)</span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a9538c8667eb9442fd10bb92fa80c3f4e"> 283</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS3_SLVSEL_LSB (9u)</span></div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a72ea7ca98bb8b74c19e453296461da3b"> 284</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS3_SLVLOCK BIT(8)</span></div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#af91320b0784f274b5895f5697ebefa94"> 285</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS3_REFSEL_LSB (1u)</span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a21fea379dcb3da3f234ce51f5c6a0ec7"> 286</a></span><span class="preprocessor">#define SDRAMC_DLL_STATUS3_REFLOCK BIT(0)</span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno"> 287</span> </div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a2a6ab00ca2fd6d7917f2c3c23fdd7e58"> 288</a></span><span class="preprocessor">#define SDRAMC_DQS_QE_SET (0xB8u)</span></div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a013de983e5733b0df5bc56e2aced0309"> 289</a></span><span class="preprocessor">#define SDRAMC_DQS_QE_SET_VAL BIT(1)</span></div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ac5739eedaa78203b3a670111796a677e"> 290</a></span><span class="preprocessor">#define SDRAMC_DQS_QE_SET_EN BIT(0)</span></div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno"> 291</span> </div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a6fec966d6da8ce9466c1c76da7f14424"> 292</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT (0xC0u)</span></div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a8e3d5b4d1914f9da313e041d8dd20d8f"> 293</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_GATE_FORCE_TIE1 BIT(31)</span></div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a668255a8295f7fb6f90ae43640ab05a6"> 294</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM3NEG_LSB (28u)</span></div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aad15f8c39f4f782a822f8ef9fed9798c"> 295</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM2NEG_LSB (24u)</span></div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ae984afc8834753dc728dc499d4549bd1"> 296</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM1NEG_LSB (20u)</span></div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a1143120c88b65f272e2867df908f5ead"> 297</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM0NEG_LSB (16u)</span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ab1da51af4f1dbe4384b528ee710e7053"> 298</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM3_LSB (12u)</span></div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aee32e4b75a4cb053e2c01c42097b0632"> 299</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM2_LSB (8u)</span></div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ab335b84fef41ae24921e28d2293d8883"> 300</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM1_LSB (4u)</span></div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a510b7b32f46a65f556bf039d684752ce"> 301</a></span><span class="preprocessor">#define SDRAMC_DDR_DQS_SHIFT_NUM0_LSB (0u)</span></div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno"> 302</span> </div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a90bf9623f0c052f6ca9b35b9ca4d2a73"> 303</a></span><span class="preprocessor">#define SDRAMC_SDR_DQS_SHIFT (0xC4u)</span></div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad5769418552ac13fb0a23012fadd47db"> 304</a></span><span class="preprocessor">#define SDRAMC_SDR_DQS_SHIFT_NUM_LSB (0u)</span></div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno"> 305</span> </div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno"> 306</span> </div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecf"> 310</a></span><span class="keyword">enum</span> <a class="code hl_enumeration" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecf">sdrv_sdramc_error</a> {</div>
<div class="line"><a id="l00311" name="l00311"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfaf55eb463034830e9b5597a52efeac6b3"> 311</a></span> <a class="code hl_enumvalue" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfaf55eb463034830e9b5597a52efeac6b3">SDRV_STATUS_SDRAMC_DLL_LOCK_ERR</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(<a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6aba05ef4807a5d70e736d831458a25a5e">SDRV_STATUS_GROUP_SDRAMC</a>, 1), <span class="comment">/* sdramc dll lock error */</span></div>
<div class="line"><a id="l00312" name="l00312"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfa7e6c2fdd24e17ce31eb4c7b86b2833c5"> 312</a></span> <a class="code hl_enumvalue" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfa7e6c2fdd24e17ce31eb4c7b86b2833c5">SDRV_STATUS_SDRAMC_DLL_WAYS_ERR</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(<a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6aba05ef4807a5d70e736d831458a25a5e">SDRV_STATUS_GROUP_SDRAMC</a>, 2), <span class="comment">/* sdramc dll ways error */</span></div>
<div class="line"><a id="l00313" name="l00313"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfad3a0b62bdb2afbe9d289b5e2e7606357"> 313</a></span> <a class="code hl_enumvalue" href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfad3a0b62bdb2afbe9d289b5e2e7606357">SDRV_STATUS_SDRAMC_SET_DDR_CLK_ERR</a> = <a class="code hl_define" href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a>(<a class="code hl_enumvalue" href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6aba05ef4807a5d70e736d831458a25a5e">SDRV_STATUS_GROUP_SDRAMC</a>, 3), <span class="comment">/* sdramc set clk error */</span></div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno"> 314</span>};</div>
<div class="line"><a id="l00315" name="l00315"></a><span class="lineno"> 315</span> </div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html"> 317</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdram__comm__config.html">sdram_comm_config</a> {</div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#a281a3b1477b8d04ec3202dbba5547b06"> 318</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#a281a3b1477b8d04ec3202dbba5547b06">mrd_cycle</a>; </div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#a028b13a45e3cf4afdb264a2b98af028f"> 319</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#a028b13a45e3cf4afdb264a2b98af028f">t_wtr_cycle</a>; </div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#aa4784102451cd7d23a310b3aaa8d08da"> 320</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#aa4784102451cd7d23a310b3aaa8d08da">t_rcd_ns</a>; </div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#ae6575c49d991980e51e0f27b2f3e25ef"> 321</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#ae6575c49d991980e51e0f27b2f3e25ef">t_rfc_ns</a>; </div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#ab2bd3da7fd508fe2fc4c01ec09d6d781"> 322</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#ab2bd3da7fd508fe2fc4c01ec09d6d781">t_rc_ns</a>; </div>
<div class="line"><a id="l00323" name="l00323"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#a3d94068edf1778f4376f5261e975c4b1"> 323</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#a3d94068edf1778f4376f5261e975c4b1">t_ras_ns</a>; </div>
<div class="line"><a id="l00324" name="l00324"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#a17c2dee7dae9094c93c2420d682ffe56"> 324</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#a17c2dee7dae9094c93c2420d682ffe56">t_wr_ns</a>; </div>
<div class="line"><a id="l00325" name="l00325"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#a164ffe8c4325b5e60d21f09de6966ed4"> 325</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#a164ffe8c4325b5e60d21f09de6966ed4">t_rrd_ns</a>; </div>
<div class="line"><a id="l00326" name="l00326"></a><span class="lineno"><a class="line" href="structsdram__comm__config.html#a0bae3537097c03b8ff16eb878f121658"> 326</a></span> uint32_t <a class="code hl_variable" href="structsdram__comm__config.html#a0bae3537097c03b8ff16eb878f121658">t_rp_ns</a>; </div>
<div class="line"><a id="l00327" name="l00327"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa225910c51d3693ac960af7053019fa7"> 327</a></span>} <a class="code hl_typedef" href="sdrv__sdramc_8h.html#aa225910c51d3693ac960af7053019fa7">sdram_comm_config_t</a>;</div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno"> 328</span> </div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno"><a class="line" href="structsdram__config.html"> 330</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsdram__config.html">sdram_config</a> {</div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno"><a class="line" href="structsdram__config.html#a8f8f80d37794cde9472343e4487ba3eb"> 331</a></span> <span class="keyword">const</span> <span class="keywordtype">char</span> *<a class="code hl_variable" href="structsdram__config.html#a8f8f80d37794cde9472343e4487ba3eb">name</a>;</div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno"><a class="line" href="structsdram__config.html#a809e07601b0219d20e7b109967bc2b81"> 332</a></span> <span class="keywordtype">bool</span> <a class="code hl_variable" href="structsdram__config.html#a809e07601b0219d20e7b109967bc2b81">ddr_mode</a>; </div>
<div class="line"><a id="l00333" name="l00333"></a><span class="lineno"><a class="line" href="structsdram__config.html#a82fc06f8b9fc94fd529b4e1943dc5b55"> 333</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#a82fc06f8b9fc94fd529b4e1943dc5b55">row_num</a>; </div>
<div class="line"><a id="l00334" name="l00334"></a><span class="lineno"><a class="line" href="structsdram__config.html#a32e404f889a62bf4f55fa2b0905c8d4c"> 334</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#a32e404f889a62bf4f55fa2b0905c8d4c">column_num</a>; </div>
<div class="line"><a id="l00335" name="l00335"></a><span class="lineno"><a class="line" href="structsdram__config.html#ab097cbde801a8082f408a082139b22df"> 335</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#ab097cbde801a8082f408a082139b22df">bank_num</a>; </div>
<div class="line"><a id="l00336" name="l00336"></a><span class="lineno"><a class="line" href="structsdram__config.html#a1111838917c97c60c35190470cf5e5fd"> 336</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#a1111838917c97c60c35190470cf5e5fd">cs_num</a>; </div>
<div class="line"><a id="l00337" name="l00337"></a><span class="lineno"><a class="line" href="structsdram__config.html#a508834771d3b7e0e21ee32c5bc6d65e5"> 337</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#a508834771d3b7e0e21ee32c5bc6d65e5">dq_width</a>; </div>
<div class="line"><a id="l00338" name="l00338"></a><span class="lineno"><a class="line" href="structsdram__config.html#ac79a207bffa2705f9fefe67b178d17e0"> 338</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#ac79a207bffa2705f9fefe67b178d17e0">clock</a>; </div>
<div class="line"><a id="l00339" name="l00339"></a><span class="lineno"><a class="line" href="structsdram__config.html#a9c12078292ebf5405a670a9cdc67cfa8"> 339</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#a9c12078292ebf5405a670a9cdc67cfa8">cas_latency_x2</a>; </div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno"><a class="line" href="structsdram__config.html#ad1c816490d96fd39c0cecd6426b31ec8"> 340</a></span> uint32_t <a class="code hl_variable" href="structsdram__config.html#ad1c816490d96fd39c0cecd6426b31ec8">burst_length</a>; </div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno"><a class="line" href="structsdram__config.html#aea4c890dce438b23abf02de76a2ee165"> 341</a></span> <a class="code hl_struct" href="structsdram__comm__config.html">sdram_comm_config_t</a> *<a class="code hl_variable" href="structsdram__config.html#aea4c890dce438b23abf02de76a2ee165">comm_config</a>; </div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#ad8761366a62d5df169161656e803e9e8"> 342</a></span>} <a class="code hl_typedef" href="sdrv__sdramc_8h.html#ad8761366a62d5df169161656e803e9e8">sdram_config_t</a>;</div>
<div class="line"><a id="l00343" name="l00343"></a><span class="lineno"> 343</span> </div>
<div class="line"><a id="l00345" name="l00345"></a><span class="lineno"><a class="line" href="structsd__para.html"> 345</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsd__para.html">sd_para</a> {</div>
<div class="line"><a id="l00346" name="l00346"></a><span class="lineno"><a class="line" href="structsd__para.html#a2902bcb3ee6712d1efa1e0bebf226246"> 346</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#a2902bcb3ee6712d1efa1e0bebf226246">column_start</a>; </div>
<div class="line"><a id="l00347" name="l00347"></a><span class="lineno"><a class="line" href="structsd__para.html#a68df596aedbbee54e0fd620db2364735"> 347</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#a68df596aedbbee54e0fd620db2364735">column_bits</a>; </div>
<div class="line"><a id="l00348" name="l00348"></a><span class="lineno"><a class="line" href="structsd__para.html#aa6e07037fdf02829068ac6cf24812f60"> 348</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#aa6e07037fdf02829068ac6cf24812f60">cs_start</a>; </div>
<div class="line"><a id="l00349" name="l00349"></a><span class="lineno"><a class="line" href="structsd__para.html#a92b2d8a41db53371d3d59f7ba0d1b270"> 349</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#a92b2d8a41db53371d3d59f7ba0d1b270">cs_bits</a>; </div>
<div class="line"><a id="l00350" name="l00350"></a><span class="lineno"><a class="line" href="structsd__para.html#ad63b5c27f674a246f75bdf746aab22ed"> 350</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#ad63b5c27f674a246f75bdf746aab22ed">bank_start</a>; </div>
<div class="line"><a id="l00351" name="l00351"></a><span class="lineno"><a class="line" href="structsd__para.html#a0a1ad13db67ea5e12c68282253bfcf31"> 351</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#a0a1ad13db67ea5e12c68282253bfcf31">bank_bits</a>; </div>
<div class="line"><a id="l00352" name="l00352"></a><span class="lineno"><a class="line" href="structsd__para.html#a91f4b44299546e7bea8da7a89cff344e"> 352</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#a91f4b44299546e7bea8da7a89cff344e">row_start</a>; </div>
<div class="line"><a id="l00353" name="l00353"></a><span class="lineno"><a class="line" href="structsd__para.html#a54cd39e9e343ca89edf11274b58296eb"> 353</a></span> uint32_t <a class="code hl_variable" href="structsd__para.html#a54cd39e9e343ca89edf11274b58296eb">row_bits</a>; </div>
<div class="line"><a id="l00354" name="l00354"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a61aed96ad53365aad2b45431a2aa8df0"> 354</a></span>} <a class="code hl_typedef" href="sdrv__sdramc_8h.html#a61aed96ad53365aad2b45431a2aa8df0">sd_para_s</a>;</div>
<div class="line"><a id="l00355" name="l00355"></a><span class="lineno"> 355</span> </div>
<div class="line"><a id="l00357" name="l00357"></a><span class="lineno"><a class="line" href="structgate__record.html"> 357</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgate__record.html">gate_record</a> {</div>
<div class="line"><a id="l00358" name="l00358"></a><span class="lineno"><a class="line" href="structgate__record.html#aa06a6307497952a2fbd127c86b3ed9d0"> 358</a></span> uint32_t <a class="code hl_variable" href="structgate__record.html#aa06a6307497952a2fbd127c86b3ed9d0">gate_val</a>; </div>
<div class="line"><a id="l00359" name="l00359"></a><span class="lineno"><a class="line" href="structgate__record.html#a2ff7fa258d5f377199684bb46c65d6ff"> 359</a></span> uint32_t <a class="code hl_variable" href="structgate__record.html#a2ff7fa258d5f377199684bb46c65d6ff">gate_index</a>; </div>
<div class="line"><a id="l00360" name="l00360"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a24c1afd09b8e443b2f596f0f76063ba5"> 360</a></span>} <a class="code hl_typedef" href="sdrv__sdramc_8h.html#a24c1afd09b8e443b2f596f0f76063ba5">gate_record_s</a>;</div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno"> 361</span> </div>
<div class="line"><a id="l00362" name="l00362"></a><span class="lineno"> 362</span><span class="keyword">extern</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsd__para.html">sd_para</a> <a class="code hl_variable" href="sdrv__sdramc_8h.html#ab8cfb02b0841d9f9f253c3a9fe5a4786">cs_p</a>;</div>
<div class="line"><a id="l00363" name="l00363"></a><span class="lineno"> 363</span> </div>
<div class="line"><a id="l00368" name="l00368"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#aa5fab942944733ef52eac9d5487acbdd"> 368</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structsd__para.html">sd_para</a> *<a class="code hl_function" href="sdrv__sdramc_8h.html#aa5fab942944733ef52eac9d5487acbdd">sdrv_get_sd_para</a>(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00369" name="l00369"></a><span class="lineno"> 369</span> </div>
<div class="line"><a id="l00374" name="l00374"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#a45f337cc3c24f84d88f1b368b554bbca"> 374</a></span><span class="keywordtype">void</span> <a class="code hl_function" href="sdrv__sdramc_8h.html#a45f337cc3c24f84d88f1b368b554bbca">sdrv_set_sd_para</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structsd__para.html">sd_para</a> *cs);</div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno"> 375</span> </div>
<div class="line"><a id="l00388" name="l00388"></a><span class="lineno"><a class="line" href="sdrv__sdramc_8h.html#acccd9b31bef23839ca24bfb0e4871481"> 388</a></span>int32_t <a class="code hl_function" href="sdrv__sdramc_8h.html#acccd9b31bef23839ca24bfb0e4871481">sdrv_sdramc_init</a>(addr_t base, <a class="code hl_struct" href="structsdram__config.html">sdram_config_t</a> *conf);</div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno"> 389</span> </div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno"> 390</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno"> 391</span>}</div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno"> 392</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno"> 393</span><span class="preprocessor">#endif </span><span class="comment">/* SDRV_SDRAMC_H_ */</span><span class="preprocessor"></span></div>
<div class="ttc" id="asdrv__common_8h_html"><div class="ttname"><a href="sdrv__common_8h.html">sdrv_common.h</a></div><div class="ttdoc">SemiDrive driver common header file.</div></div>
<div class="ttc" id="asdrv__common_8h_html_a19e0f226537905b9e022007ff40c57c6aba05ef4807a5d70e736d831458a25a5e"><div class="ttname"><a href="sdrv__common_8h.html#a19e0f226537905b9e022007ff40c57c6aba05ef4807a5d70e736d831458a25a5e">SDRV_STATUS_GROUP_SDRAMC</a></div><div class="ttdeci">@ SDRV_STATUS_GROUP_SDRAMC</div><div class="ttdef"><b>Definition:</b> sdrv_common.h:56</div></div>
<div class="ttc" id="asdrv__common_8h_html_aef8aef2653fac9cb1b5fbe2a5976314c"><div class="ttname"><a href="sdrv__common_8h.html#aef8aef2653fac9cb1b5fbe2a5976314c">SDRV_ERROR_STATUS</a></div><div class="ttdeci">#define SDRV_ERROR_STATUS(group, code)</div><div class="ttdoc">Construct a status code value from a group and code number. All the error statuses are negetive numbe...</div><div class="ttdef"><b>Definition:</b> sdrv_common.h:17</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html"><div class="ttname"><a href="sdrv__sdramc_8h.html">sdrv_sdramc.h</a></div><div class="ttdoc">SemiDrive SDRAM driver header file.</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_a24c1afd09b8e443b2f596f0f76063ba5"><div class="ttname"><a href="sdrv__sdramc_8h.html#a24c1afd09b8e443b2f596f0f76063ba5">gate_record_s</a></div><div class="ttdeci">struct gate_record gate_record_s</div><div class="ttdoc">gate value record</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_a45f337cc3c24f84d88f1b368b554bbca"><div class="ttname"><a href="sdrv__sdramc_8h.html#a45f337cc3c24f84d88f1b368b554bbca">sdrv_set_sd_para</a></div><div class="ttdeci">void sdrv_set_sd_para(struct sd_para *cs)</div><div class="ttdoc">save sdram para</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_a61aed96ad53365aad2b45431a2aa8df0"><div class="ttname"><a href="sdrv__sdramc_8h.html#a61aed96ad53365aad2b45431a2aa8df0">sd_para_s</a></div><div class="ttdeci">struct sd_para sd_para_s</div><div class="ttdoc">sdramc row column cs bank configuration</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_aa225910c51d3693ac960af7053019fa7"><div class="ttname"><a href="sdrv__sdramc_8h.html#aa225910c51d3693ac960af7053019fa7">sdram_comm_config_t</a></div><div class="ttdeci">struct sdram_comm_config sdram_comm_config_t</div><div class="ttdoc">sdramc commom configuration</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_aa5fab942944733ef52eac9d5487acbdd"><div class="ttname"><a href="sdrv__sdramc_8h.html#aa5fab942944733ef52eac9d5487acbdd">sdrv_get_sd_para</a></div><div class="ttdeci">struct sd_para * sdrv_get_sd_para(void)</div><div class="ttdoc">get sdram para</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_ab8cfb02b0841d9f9f253c3a9fe5a4786"><div class="ttname"><a href="sdrv__sdramc_8h.html#ab8cfb02b0841d9f9f253c3a9fe5a4786">cs_p</a></div><div class="ttdeci">struct sd_para cs_p</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_acccd9b31bef23839ca24bfb0e4871481"><div class="ttname"><a href="sdrv__sdramc_8h.html#acccd9b31bef23839ca24bfb0e4871481">sdrv_sdramc_init</a></div><div class="ttdeci">int32_t sdrv_sdramc_init(addr_t base, sdram_config_t *conf)</div><div class="ttdoc">sdramc init main function</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_acd7c2f43c67522b2a23bf520722e5ecf"><div class="ttname"><a href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecf">sdrv_sdramc_error</a></div><div class="ttdeci">sdrv_sdramc_error</div><div class="ttdoc">sdramc status error code.</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:310</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_acd7c2f43c67522b2a23bf520722e5ecfa7e6c2fdd24e17ce31eb4c7b86b2833c5"><div class="ttname"><a href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfa7e6c2fdd24e17ce31eb4c7b86b2833c5">SDRV_STATUS_SDRAMC_DLL_WAYS_ERR</a></div><div class="ttdeci">@ SDRV_STATUS_SDRAMC_DLL_WAYS_ERR</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:312</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_acd7c2f43c67522b2a23bf520722e5ecfad3a0b62bdb2afbe9d289b5e2e7606357"><div class="ttname"><a href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfad3a0b62bdb2afbe9d289b5e2e7606357">SDRV_STATUS_SDRAMC_SET_DDR_CLK_ERR</a></div><div class="ttdeci">@ SDRV_STATUS_SDRAMC_SET_DDR_CLK_ERR</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:313</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_acd7c2f43c67522b2a23bf520722e5ecfaf55eb463034830e9b5597a52efeac6b3"><div class="ttname"><a href="sdrv__sdramc_8h.html#acd7c2f43c67522b2a23bf520722e5ecfaf55eb463034830e9b5597a52efeac6b3">SDRV_STATUS_SDRAMC_DLL_LOCK_ERR</a></div><div class="ttdeci">@ SDRV_STATUS_SDRAMC_DLL_LOCK_ERR</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:311</div></div>
<div class="ttc" id="asdrv__sdramc_8h_html_ad8761366a62d5df169161656e803e9e8"><div class="ttname"><a href="sdrv__sdramc_8h.html#ad8761366a62d5df169161656e803e9e8">sdram_config_t</a></div><div class="ttdeci">struct sdram_config sdram_config_t</div><div class="ttdoc">sdramc private configuration</div></div>
<div class="ttc" id="astructgate__record_html"><div class="ttname"><a href="structgate__record.html">gate_record</a></div><div class="ttdoc">gate value record</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:357</div></div>
<div class="ttc" id="astructgate__record_html_a2ff7fa258d5f377199684bb46c65d6ff"><div class="ttname"><a href="structgate__record.html#a2ff7fa258d5f377199684bb46c65d6ff">gate_record::gate_index</a></div><div class="ttdeci">uint32_t gate_index</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:359</div></div>
<div class="ttc" id="astructgate__record_html_aa06a6307497952a2fbd127c86b3ed9d0"><div class="ttname"><a href="structgate__record.html#aa06a6307497952a2fbd127c86b3ed9d0">gate_record::gate_val</a></div><div class="ttdeci">uint32_t gate_val</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:358</div></div>
<div class="ttc" id="astructsd__para_html"><div class="ttname"><a href="structsd__para.html">sd_para</a></div><div class="ttdoc">sdramc row column cs bank configuration</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:345</div></div>
<div class="ttc" id="astructsd__para_html_a0a1ad13db67ea5e12c68282253bfcf31"><div class="ttname"><a href="structsd__para.html#a0a1ad13db67ea5e12c68282253bfcf31">sd_para::bank_bits</a></div><div class="ttdeci">uint32_t bank_bits</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:351</div></div>
<div class="ttc" id="astructsd__para_html_a2902bcb3ee6712d1efa1e0bebf226246"><div class="ttname"><a href="structsd__para.html#a2902bcb3ee6712d1efa1e0bebf226246">sd_para::column_start</a></div><div class="ttdeci">uint32_t column_start</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:346</div></div>
<div class="ttc" id="astructsd__para_html_a54cd39e9e343ca89edf11274b58296eb"><div class="ttname"><a href="structsd__para.html#a54cd39e9e343ca89edf11274b58296eb">sd_para::row_bits</a></div><div class="ttdeci">uint32_t row_bits</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:353</div></div>
<div class="ttc" id="astructsd__para_html_a68df596aedbbee54e0fd620db2364735"><div class="ttname"><a href="structsd__para.html#a68df596aedbbee54e0fd620db2364735">sd_para::column_bits</a></div><div class="ttdeci">uint32_t column_bits</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:347</div></div>
<div class="ttc" id="astructsd__para_html_a91f4b44299546e7bea8da7a89cff344e"><div class="ttname"><a href="structsd__para.html#a91f4b44299546e7bea8da7a89cff344e">sd_para::row_start</a></div><div class="ttdeci">uint32_t row_start</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:352</div></div>
<div class="ttc" id="astructsd__para_html_a92b2d8a41db53371d3d59f7ba0d1b270"><div class="ttname"><a href="structsd__para.html#a92b2d8a41db53371d3d59f7ba0d1b270">sd_para::cs_bits</a></div><div class="ttdeci">uint32_t cs_bits</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:349</div></div>
<div class="ttc" id="astructsd__para_html_aa6e07037fdf02829068ac6cf24812f60"><div class="ttname"><a href="structsd__para.html#aa6e07037fdf02829068ac6cf24812f60">sd_para::cs_start</a></div><div class="ttdeci">uint32_t cs_start</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:348</div></div>
<div class="ttc" id="astructsd__para_html_ad63b5c27f674a246f75bdf746aab22ed"><div class="ttname"><a href="structsd__para.html#ad63b5c27f674a246f75bdf746aab22ed">sd_para::bank_start</a></div><div class="ttdeci">uint32_t bank_start</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:350</div></div>
<div class="ttc" id="astructsdram__comm__config_html"><div class="ttname"><a href="structsdram__comm__config.html">sdram_comm_config</a></div><div class="ttdoc">sdramc commom configuration</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:317</div></div>
<div class="ttc" id="astructsdram__comm__config_html_a028b13a45e3cf4afdb264a2b98af028f"><div class="ttname"><a href="structsdram__comm__config.html#a028b13a45e3cf4afdb264a2b98af028f">sdram_comm_config::t_wtr_cycle</a></div><div class="ttdeci">uint32_t t_wtr_cycle</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:319</div></div>
<div class="ttc" id="astructsdram__comm__config_html_a0bae3537097c03b8ff16eb878f121658"><div class="ttname"><a href="structsdram__comm__config.html#a0bae3537097c03b8ff16eb878f121658">sdram_comm_config::t_rp_ns</a></div><div class="ttdeci">uint32_t t_rp_ns</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:326</div></div>
<div class="ttc" id="astructsdram__comm__config_html_a164ffe8c4325b5e60d21f09de6966ed4"><div class="ttname"><a href="structsdram__comm__config.html#a164ffe8c4325b5e60d21f09de6966ed4">sdram_comm_config::t_rrd_ns</a></div><div class="ttdeci">uint32_t t_rrd_ns</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:325</div></div>
<div class="ttc" id="astructsdram__comm__config_html_a17c2dee7dae9094c93c2420d682ffe56"><div class="ttname"><a href="structsdram__comm__config.html#a17c2dee7dae9094c93c2420d682ffe56">sdram_comm_config::t_wr_ns</a></div><div class="ttdeci">uint32_t t_wr_ns</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:324</div></div>
<div class="ttc" id="astructsdram__comm__config_html_a281a3b1477b8d04ec3202dbba5547b06"><div class="ttname"><a href="structsdram__comm__config.html#a281a3b1477b8d04ec3202dbba5547b06">sdram_comm_config::mrd_cycle</a></div><div class="ttdeci">uint32_t mrd_cycle</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:318</div></div>
<div class="ttc" id="astructsdram__comm__config_html_a3d94068edf1778f4376f5261e975c4b1"><div class="ttname"><a href="structsdram__comm__config.html#a3d94068edf1778f4376f5261e975c4b1">sdram_comm_config::t_ras_ns</a></div><div class="ttdeci">uint32_t t_ras_ns</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:323</div></div>
<div class="ttc" id="astructsdram__comm__config_html_aa4784102451cd7d23a310b3aaa8d08da"><div class="ttname"><a href="structsdram__comm__config.html#aa4784102451cd7d23a310b3aaa8d08da">sdram_comm_config::t_rcd_ns</a></div><div class="ttdeci">uint32_t t_rcd_ns</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:320</div></div>
<div class="ttc" id="astructsdram__comm__config_html_ab2bd3da7fd508fe2fc4c01ec09d6d781"><div class="ttname"><a href="structsdram__comm__config.html#ab2bd3da7fd508fe2fc4c01ec09d6d781">sdram_comm_config::t_rc_ns</a></div><div class="ttdeci">uint32_t t_rc_ns</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:322</div></div>
<div class="ttc" id="astructsdram__comm__config_html_ae6575c49d991980e51e0f27b2f3e25ef"><div class="ttname"><a href="structsdram__comm__config.html#ae6575c49d991980e51e0f27b2f3e25ef">sdram_comm_config::t_rfc_ns</a></div><div class="ttdeci">uint32_t t_rfc_ns</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:321</div></div>
<div class="ttc" id="astructsdram__config_html"><div class="ttname"><a href="structsdram__config.html">sdram_config</a></div><div class="ttdoc">sdramc private configuration</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:330</div></div>
<div class="ttc" id="astructsdram__config_html_a1111838917c97c60c35190470cf5e5fd"><div class="ttname"><a href="structsdram__config.html#a1111838917c97c60c35190470cf5e5fd">sdram_config::cs_num</a></div><div class="ttdeci">uint32_t cs_num</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:336</div></div>
<div class="ttc" id="astructsdram__config_html_a32e404f889a62bf4f55fa2b0905c8d4c"><div class="ttname"><a href="structsdram__config.html#a32e404f889a62bf4f55fa2b0905c8d4c">sdram_config::column_num</a></div><div class="ttdeci">uint32_t column_num</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:334</div></div>
<div class="ttc" id="astructsdram__config_html_a508834771d3b7e0e21ee32c5bc6d65e5"><div class="ttname"><a href="structsdram__config.html#a508834771d3b7e0e21ee32c5bc6d65e5">sdram_config::dq_width</a></div><div class="ttdeci">uint32_t dq_width</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:337</div></div>
<div class="ttc" id="astructsdram__config_html_a809e07601b0219d20e7b109967bc2b81"><div class="ttname"><a href="structsdram__config.html#a809e07601b0219d20e7b109967bc2b81">sdram_config::ddr_mode</a></div><div class="ttdeci">bool ddr_mode</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:332</div></div>
<div class="ttc" id="astructsdram__config_html_a82fc06f8b9fc94fd529b4e1943dc5b55"><div class="ttname"><a href="structsdram__config.html#a82fc06f8b9fc94fd529b4e1943dc5b55">sdram_config::row_num</a></div><div class="ttdeci">uint32_t row_num</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:333</div></div>
<div class="ttc" id="astructsdram__config_html_a8f8f80d37794cde9472343e4487ba3eb"><div class="ttname"><a href="structsdram__config.html#a8f8f80d37794cde9472343e4487ba3eb">sdram_config::name</a></div><div class="ttdeci">const char * name</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:331</div></div>
<div class="ttc" id="astructsdram__config_html_a9c12078292ebf5405a670a9cdc67cfa8"><div class="ttname"><a href="structsdram__config.html#a9c12078292ebf5405a670a9cdc67cfa8">sdram_config::cas_latency_x2</a></div><div class="ttdeci">uint32_t cas_latency_x2</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:339</div></div>
<div class="ttc" id="astructsdram__config_html_ab097cbde801a8082f408a082139b22df"><div class="ttname"><a href="structsdram__config.html#ab097cbde801a8082f408a082139b22df">sdram_config::bank_num</a></div><div class="ttdeci">uint32_t bank_num</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:335</div></div>
<div class="ttc" id="astructsdram__config_html_ac79a207bffa2705f9fefe67b178d17e0"><div class="ttname"><a href="structsdram__config.html#ac79a207bffa2705f9fefe67b178d17e0">sdram_config::clock</a></div><div class="ttdeci">uint32_t clock</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:338</div></div>
<div class="ttc" id="astructsdram__config_html_ad1c816490d96fd39c0cecd6426b31ec8"><div class="ttname"><a href="structsdram__config.html#ad1c816490d96fd39c0cecd6426b31ec8">sdram_config::burst_length</a></div><div class="ttdeci">uint32_t burst_length</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:340</div></div>
<div class="ttc" id="astructsdram__config_html_aea4c890dce438b23abf02de76a2ee165"><div class="ttname"><a href="structsdram__config.html#aea4c890dce438b23abf02de76a2ee165">sdram_config::comm_config</a></div><div class="ttdeci">sdram_comm_config_t * comm_config</div><div class="ttdef"><b>Definition:</b> sdrv_sdramc.h:341</div></div>
</div><!-- fragment --></div><!-- contents -->
<!-- start footer part -->
<hr class="footer"/><address class="footer"><small>
Generated by&#160;<a href="https://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.9.4
</small></address>
</body>
</html>
Reference in New Issue View Git Blame Copy Permalink