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<div class="textblock"><code>#include &lt;<a class="el" href="sdrv__common_8h_source.html">sdrv_common.h</a>&gt;</code><br />
<code>#include &lt;types.h&gt;</code><br />
<code>#include &lt;part.h&gt;</code><br />
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__edge__filter.html">sdrv_pmu_edge_filter</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__level__filter.html">sdrv_pmu_level_filter</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__level__filter__enable.html">sdrv_pmu_level_filter_enable</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__wakeup__pin__config.html">sdrv_pmu_wakeup_pin_config</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__wakeuppins__config.html">sdrv_pmu_wakeuppins_config</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__buttonctrl__config.html">sdrv_pmu_buttonctrl_config</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__pwron__wdt__config.html">sdrv_pmu_pwron_wdt_config</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__pwron__wdt__enable.html">sdrv_pmu_pwron_wdt_enable</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__pmu__pwrctrl__config.html">sdrv_pmu_pwrctrl_config</a></td></tr>
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<tr class="memitem:a342923c9b84ec3a29dec25a71f92a34e"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__pmu_8h.html#a342923c9b84ec3a29dec25a71f92a34e">sdrv_pmu_get_state</a> (void)</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><dl class="section copyright"><dt>Copyright</dt><dd>Copyright (c) 2022 Semidrive Semiconductor. All rights reserved. </dd></dl>
</div><h2 class="groupheader">Macro Definition Documentation</h2>
<a id="add6d9983e5e19dfe96b18ae6be03e1b4" name="add6d9983e5e19dfe96b18ae6be03e1b4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#add6d9983e5e19dfe96b18ae6be03e1b4">&#9670;&nbsp;</a></span>SDRV_PMU_WAKEUP_BC_MASK</h2>
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<td class="memname">#define SDRV_PMU_WAKEUP_BC_MASK&#160;&#160;&#160;(0X8U)</td>
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<a id="abcc377f9163fff67d3cf41d2df8fb27b" name="abcc377f9163fff67d3cf41d2df8fb27b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abcc377f9163fff67d3cf41d2df8fb27b">&#9670;&nbsp;</a></span>SDRV_PMU_WAKEUP_PIN0_MASK</h2>
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<td class="memname">#define SDRV_PMU_WAKEUP_PIN0_MASK&#160;&#160;&#160;(0X1U)</td>
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<a id="a39af9a860cfcf22bae01605348d68650" name="a39af9a860cfcf22bae01605348d68650"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a39af9a860cfcf22bae01605348d68650">&#9670;&nbsp;</a></span>SDRV_PMU_WAKEUP_PIN1_MASK</h2>
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<td class="memname">#define SDRV_PMU_WAKEUP_PIN1_MASK&#160;&#160;&#160;(0X2U)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a87ba9b114b369ac1e02625e1164970bf">&#9670;&nbsp;</a></span>SDRV_PMU_WAKEUP_RTC_MASK</h2>
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<td class="memname">#define SDRV_PMU_WAKEUP_RTC_MASK&#160;&#160;&#160;(0X4U)</td>
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<h2 class="groupheader">Typedef Documentation</h2>
<a id="a15ccec33d89b7ca5d0e0254ccd314905" name="a15ccec33d89b7ca5d0e0254ccd314905"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a15ccec33d89b7ca5d0e0254ccd314905">&#9670;&nbsp;</a></span>sdrv_pmu_bc_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__bc__config.html">sdrv_pmu_bc_config</a> <a class="el" href="sdrv__pmu_8h.html#a15ccec33d89b7ca5d0e0254ccd314905">sdrv_pmu_bc_config_t</a></td>
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<p>Definition for button config active level or pulse to enter/exit rtc mode. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa2aa1897b6da63a32bffc817fd2af69d">&#9670;&nbsp;</a></span>sdrv_pmu_buttonctrl_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__buttonctrl__config.html">sdrv_pmu_buttonctrl_config</a> <a class="el" href="sdrv__pmu_8h.html#aa2aa1897b6da63a32bffc817fd2af69d">sdrv_pmu_buttonctrl_config_t</a></td>
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<p>Definition for button control config parameters. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa31a8ca2b44ea341c0f59e7af4d343cf">&#9670;&nbsp;</a></span>sdrv_pmu_ctrl_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a95f06c3d54fc475cd22dd4d8217d7cf7">sdrv_pmu_ctrl</a> <a class="el" href="sdrv__pmu_8h.html#aa31a8ca2b44ea341c0f59e7af4d343cf">sdrv_pmu_ctrl_e</a></td>
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<p>Definition for pmu pwr_ctrl and pwr_on enable or disable. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a71692c62b2e5aee56cb2aea1e79310ae">&#9670;&nbsp;</a></span>sdrv_pmu_delay_period_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a30d4ff4e004de1a3d80befe6f73c2aaa">sdrv_pmu_delay_period</a> <a class="el" href="sdrv__pmu_8h.html#a71692c62b2e5aee56cb2aea1e79310ae">sdrv_pmu_delay_period_e</a></td>
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<p>Definition for config pwrctrl and pwron delay setting in different period. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a7176e58f6979982b8ef6954518dec089">&#9670;&nbsp;</a></span>sdrv_pmu_edge_filter_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a2a6cfa6bb1438e4eec465c79e6b13b94">sdrv_pmu_edge_filter_enum</a> <a class="el" href="sdrv__pmu_8h.html#a7176e58f6979982b8ef6954518dec089">sdrv_pmu_edge_filter_e</a></td>
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<p>Definition for pmu select which edge needs to apply the filter. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a6fa4420fec8a72ef0c79143079091e25">&#9670;&nbsp;</a></span>sdrv_pmu_edge_filter_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__edge__filter.html">sdrv_pmu_edge_filter</a> <a class="el" href="sdrv__pmu_8h.html#a6fa4420fec8a72ef0c79143079091e25">sdrv_pmu_edge_filter_t</a></td>
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<p>Definition for PMU Wakeup pin and BC edge filter config. filter time = 32K cycle * (2 ^ sample interval) * (counter + 2) </p>
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<h2 class="memtitle"><span class="permalink"><a href="#ab3684b05f542e3c48134fdb76cfdc207">&#9670;&nbsp;</a></span>sdrv_pmu_hw_power_down_req_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a38576bf961292eaf9de59b2b9033f336">sdrv_pmu_hw_power_down_req</a> <a class="el" href="sdrv__pmu_8h.html#ab3684b05f542e3c48134fdb76cfdc207">sdrv_pmu_hw_power_down_req_e</a></td>
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<p>Definition for hardware power down request. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a7f762772e10bcc64d124b7077f84ed5e">&#9670;&nbsp;</a></span>sdrv_pmu_int_type_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#adc0c6318ecbe2907cf3b3de17224d3cc">sdrv_pmu_int_type</a> <a class="el" href="sdrv__pmu_8h.html#a7f762772e10bcc64d124b7077f84ed5e">sdrv_pmu_int_type_e</a></td>
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<p>Definition for PMU interrupt type. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a0f05d2b08795a33c9856997b6bd99363">&#9670;&nbsp;</a></span>sdrv_pmu_level_filter_enable_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__level__filter__enable.html">sdrv_pmu_level_filter_enable</a> <a class="el" href="sdrv__pmu_8h.html#a0f05d2b08795a33c9856997b6bd99363">sdrv_pmu_level_filter_enable_t</a></td>
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<p>Definition for PMU BC level filter enable config. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a32d7d99593635b0674ef35d81ceb033f">&#9670;&nbsp;</a></span>sdrv_pmu_level_filter_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__level__filter.html">sdrv_pmu_level_filter</a> <a class="el" href="sdrv__pmu_8h.html#a32d7d99593635b0674ef35d81ceb033f">sdrv_pmu_level_filter_t</a></td>
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<p>Definition for PMU BC level filter config. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#add0e25cf28d1ca00c420f229f28a3f7a">&#9670;&nbsp;</a></span>sdrv_pmu_mode_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a6b71374344b726090e93dada7f489cf5">sdrv_pmu_mode</a> <a class="el" href="sdrv__pmu_8h.html#add0e25cf28d1ca00c420f229f28a3f7a">sdrv_pmu_mode_e</a></td>
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<p>Definition for PMU work mode. </p>
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<a id="a634a900a69e84107cf09778283d5fb41" name="a634a900a69e84107cf09778283d5fb41"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a634a900a69e84107cf09778283d5fb41">&#9670;&nbsp;</a></span>sdrv_pmu_operate_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#aed77a582ed339369ff06981e2a1818d9">sdrv_pmu_operate</a> <a class="el" href="sdrv__pmu_8h.html#a634a900a69e84107cf09778283d5fb41">sdrv_pmu_operate_e</a></td>
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<p>Definition for pmu pwr_ctrl and pwr_on operate by hardware or software override. </p>
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<a id="a33001fb3afa4a19e6111207d98c80dc8" name="a33001fb3afa4a19e6111207d98c80dc8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a33001fb3afa4a19e6111207d98c80dc8">&#9670;&nbsp;</a></span>sdrv_pmu_pg_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a3cc1489ac84fa48da8f2fbe3466ce06e">sdrv_pmu_pg</a> <a class="el" href="sdrv__pmu_8h.html#a33001fb3afa4a19e6111207d98c80dc8">sdrv_pmu_pg_e</a></td>
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<p>Definition for pmu power good config. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a279009fe9d29a3f7fbaaf663f74724ab">&#9670;&nbsp;</a></span>sdrv_pmu_polarity_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#abf2e776dcfd5fb12be0b9227df961672">sdrv_pmu_polarity</a> <a class="el" href="sdrv__pmu_8h.html#a279009fe9d29a3f7fbaaf663f74724ab">sdrv_pmu_polarity_e</a></td>
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<p>Definition for pmu wakeup pin and button control active level or pulse. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a8b67d9a564f1b2ac64fc8f866680fab3">&#9670;&nbsp;</a></span>sdrv_pmu_power_down_reason_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a08d09195b2883b87c34383eebb6454ac">sdrv_pmu_power_down_reason</a> <a class="el" href="sdrv__pmu_8h.html#a8b67d9a564f1b2ac64fc8f866680fab3">sdrv_pmu_power_down_reason_e</a></td>
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<p>Definition for power down reason. </p>
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<a id="acdd9333c7bb86d91198bd3e4f0d05d94" name="acdd9333c7bb86d91198bd3e4f0d05d94"></a>
<h2 class="memtitle"><span class="permalink"><a href="#acdd9333c7bb86d91198bd3e4f0d05d94">&#9670;&nbsp;</a></span>sdrv_pmu_pwr_ctrl_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#af9643252117830e6868a76888b8397f3">sdrv_pmu_pwr_ctrl</a> <a class="el" href="sdrv__pmu_8h.html#acdd9333c7bb86d91198bd3e4f0d05d94">sdrv_pmu_pwr_ctrl_e</a></td>
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<p>Definition for pmu pwr_ctrl. </p>
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<a id="a557a790aa893dadce044323a6bef17e0" name="a557a790aa893dadce044323a6bef17e0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a557a790aa893dadce044323a6bef17e0">&#9670;&nbsp;</a></span>sdrv_pmu_pwr_ctrl_polarity_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#afe1aca1cdb02f27edb4b050c35863dc4">sdrv_pmu_pwr_ctrl_polarity</a> <a class="el" href="sdrv__pmu_8h.html#a557a790aa893dadce044323a6bef17e0">sdrv_pmu_pwr_ctrl_polarity_e</a></td>
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<p>Definition for PWRCTRL active level. </p>
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<a id="ab3381584abc515686e94c53649369d60" name="ab3381584abc515686e94c53649369d60"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab3381584abc515686e94c53649369d60">&#9670;&nbsp;</a></span>sdrv_pmu_pwr_on_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#affbd66794543b20bd60990c9d0a5f74c">sdrv_pmu_pwr_on</a> <a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a></td>
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<p>Definition for pmu pwr_on, now pwr_on_0 use for internal DCDC, pwr_on_2 use for internal LDO. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a6af89e3f490c141e8c0c770742f3e35c">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__pwrctrl__config.html">sdrv_pmu_pwrctrl_config</a> <a class="el" href="sdrv__pmu_8h.html#a6af89e3f490c141e8c0c770742f3e35c">sdrv_pmu_pwrctrl_config_t</a></td>
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<p>Definition for pmu pwr ctrl config. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a12e6150d15242c22b5e742569607c4a6">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_min_delay_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__pwrctrl__min__delay__config.html">sdrv_pmu_pwrctrl_min_delay_config</a> <a class="el" href="sdrv__pmu_8h.html#a12e6150d15242c22b5e742569607c4a6">sdrv_pmu_pwrctrl_min_delay_config_t</a></td>
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<p>Definition for setting for pwrctrl0-3 minimal delay enable config. </p>
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<a id="a41996fb3f2103b60227b370d82a920cb" name="a41996fb3f2103b60227b370d82a920cb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a41996fb3f2103b60227b370d82a920cb">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__pwron__config.html">sdrv_pmu_pwron_config</a> <a class="el" href="sdrv__pmu_8h.html#a41996fb3f2103b60227b370d82a920cb">sdrv_pmu_pwron_config_t</a></td>
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<p>Definition for pmu pwr on config. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#aeddc38d0dc57c9ba11566faf3ddc5a8d">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_wdt_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__pwron__wdt__config.html">sdrv_pmu_pwron_wdt_config</a> <a class="el" href="sdrv__pmu_8h.html#aeddc38d0dc57c9ba11566faf3ddc5a8d">sdrv_pmu_pwron_wdt_config_t</a></td>
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<p>Definition for power good watchdog on pwron. </p>
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<a id="a7c53ff4368be815a9afb4f465811353b" name="a7c53ff4368be815a9afb4f465811353b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7c53ff4368be815a9afb4f465811353b">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_wdt_enable_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__pwron__wdt__enable.html">sdrv_pmu_pwron_wdt_enable</a> <a class="el" href="sdrv__pmu_8h.html#a7c53ff4368be815a9afb4f465811353b">sdrv_pmu_pwron_wdt_enable_t</a></td>
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<p>Definition for WDT counter and enable config. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#acd3ee7cfb492d7e5040b4f64d551060a">&#9670;&nbsp;</a></span>sdrv_pmu_state_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#ab7ae4ddc744ebe4cfa410c4c7b496366">sdrv_pmu_state</a> <a class="el" href="sdrv__pmu_8h.html#acd3ee7cfb492d7e5040b4f64d551060a">sdrv_pmu_state_e</a></td>
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<p>Definition for config minimal delay for state transition. </p>
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<a id="abb637b9d9515b88905431e88bbf7f036" name="abb637b9d9515b88905431e88bbf7f036"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abb637b9d9515b88905431e88bbf7f036">&#9670;&nbsp;</a></span>sdrv_pmu_target_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a9a98d6d23c181d6766d9399190cc970a">sdrv_pmu_target</a> <a class="el" href="sdrv__pmu_8h.html#abb637b9d9515b88905431e88bbf7f036">sdrv_pmu_target_e</a></td>
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<p>Definition for pmu pwr_on control target. It use for hardware power on sequence. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a86d17a300018d7a7724b44cca38d5d94">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_glitch_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#aa4d8fc29b5efd80f46df265b5f74b043">sdrv_pmu_wakeup_glitch</a> <a class="el" href="sdrv__pmu_8h.html#a86d17a300018d7a7724b44cca38d5d94">sdrv_pmu_wakeup_glitch_e</a></td>
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<p>Definition for wakeup pin glitch, glitch is enable if wakeup edge &lt; 32K cycle. </p>
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<a id="a9028557b852733a0d27558ee9ecac450" name="a9028557b852733a0d27558ee9ecac450"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9028557b852733a0d27558ee9ecac450">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_in_rtc_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a384ffa29e3653fafb5f366b16863891a">sdrv_pmu_wakeup_in_rtc</a> <a class="el" href="sdrv__pmu_8h.html#a9028557b852733a0d27558ee9ecac450">sdrv_pmu_wakeup_in_rtc_e</a></td>
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<p>Definition for pmu action when receive wakeup during rtc state. </p>
<p >PMU has RTC and OFF state. During RTC state, pmu doesn't respond to wakeup event. It only responds to wakeup event in OFF state. </p>
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<a id="af101f7346600b3022849c38b88af0a06" name="af101f7346600b3022849c38b88af0a06"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af101f7346600b3022849c38b88af0a06">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__wakeup__pin__config.html">sdrv_pmu_wakeup_pin_config</a> <a class="el" href="sdrv__pmu_8h.html#af101f7346600b3022849c38b88af0a06">sdrv_pmu_wakeup_pin_config_t</a></td>
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<p>Definition for wakeup pin active level or pulse to wakeup. </p>
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<a id="a750fd6b274bfb2212a679cdb45667114" name="a750fd6b274bfb2212a679cdb45667114"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a750fd6b274bfb2212a679cdb45667114">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a4951594b8b635052d3838c92fdd73485">sdrv_pmu_wakeup_pin</a> <a class="el" href="sdrv__pmu_8h.html#a750fd6b274bfb2212a679cdb45667114">sdrv_pmu_wakeup_pin_e</a></td>
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<p>Definition for pmu wakeup pin. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a2a9d0619bd3aafdaddebf0936cfbc304">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_logic_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#aaef5050902ef9f85deea14daa573082f">sdrv_pmu_wakeup_pin_logic</a> <a class="el" href="sdrv__pmu_8h.html#a2a9d0619bd3aafdaddebf0936cfbc304">sdrv_pmu_wakeup_pin_logic_e</a></td>
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<p>Definition for pmu wakeup pin logic. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a282783cef9be208b5782ec9f68342b1d">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_src_e</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__pmu_8h.html#a69f2bd1786febcc6675f8dc2b0f28544">sdrv_pmu_wakeup_src</a> <a class="el" href="sdrv__pmu_8h.html#a282783cef9be208b5782ec9f68342b1d">sdrv_pmu_wakeup_src_e</a></td>
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<p>Definition for wakeup source. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#afc6ec4520fd00e5a385c0edd7a273de5">&#9670;&nbsp;</a></span>sdrv_pmu_wakeuppins_config_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__pmu__wakeuppins__config.html">sdrv_pmu_wakeuppins_config</a> <a class="el" href="sdrv__pmu_8h.html#afc6ec4520fd00e5a385c0edd7a273de5">sdrv_pmu_wakeuppins_config_t</a></td>
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<p>Definition for wakeup pins config parameters. </p>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a95f06c3d54fc475cd22dd4d8217d7cf7">&#9670;&nbsp;</a></span>sdrv_pmu_ctrl</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a95f06c3d54fc475cd22dd4d8217d7cf7">sdrv_pmu_ctrl</a></td>
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<p>Definition for pmu pwr_ctrl and pwr_on enable or disable. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a95f06c3d54fc475cd22dd4d8217d7cf7af4456c73a828aa8bc894183b55c2fabb" name="a95f06c3d54fc475cd22dd4d8217d7cf7af4456c73a828aa8bc894183b55c2fabb"></a>SDRV_PMU_CTRL_OFF&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a95f06c3d54fc475cd22dd4d8217d7cf7ad2c0dd2b409e788661f9928cd1793b02" name="a95f06c3d54fc475cd22dd4d8217d7cf7ad2c0dd2b409e788661f9928cd1793b02"></a>SDRV_PMU_CTRL_ON&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a30d4ff4e004de1a3d80befe6f73c2aaa">&#9670;&nbsp;</a></span>sdrv_pmu_delay_period</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a30d4ff4e004de1a3d80befe6f73c2aaa">sdrv_pmu_delay_period</a></td>
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<p>Definition for config pwrctrl and pwron delay setting in different period. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a30d4ff4e004de1a3d80befe6f73c2aaaa0f7bec66045ebac06faa4b6d2176ba37" name="a30d4ff4e004de1a3d80befe6f73c2aaaa0f7bec66045ebac06faa4b6d2176ba37"></a>SDRV_PMU_PWRUP_DELAY&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a30d4ff4e004de1a3d80befe6f73c2aaaab0b84689f5505f8abda40d0aa89538fa" name="a30d4ff4e004de1a3d80befe6f73c2aaaab0b84689f5505f8abda40d0aa89538fa"></a>SDRV_PMU_RUN_DELAY&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a30d4ff4e004de1a3d80befe6f73c2aaaa1c5426b2cb375cc92fa38ef84bf86a79" name="a30d4ff4e004de1a3d80befe6f73c2aaaa1c5426b2cb375cc92fa38ef84bf86a79"></a>SDRV_PMU_SLEEP_DELAY&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a30d4ff4e004de1a3d80befe6f73c2aaaa6fce47d4ee87dda352ee5eee64e3b717" name="a30d4ff4e004de1a3d80befe6f73c2aaaa6fce47d4ee87dda352ee5eee64e3b717"></a>SDRV_PMU_HIB_DELAY&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a30d4ff4e004de1a3d80befe6f73c2aaaa236d22ce0dbd1e61ce4f641858991682" name="a30d4ff4e004de1a3d80befe6f73c2aaaa236d22ce0dbd1e61ce4f641858991682"></a>SDRV_PMU_RTC_DELAY&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a2a6cfa6bb1438e4eec465c79e6b13b94">&#9670;&nbsp;</a></span>sdrv_pmu_edge_filter_enum</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a2a6cfa6bb1438e4eec465c79e6b13b94">sdrv_pmu_edge_filter_enum</a></td>
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<p>Definition for pmu select which edge needs to apply the filter. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a2a6cfa6bb1438e4eec465c79e6b13b94a9ef2524d9ebc9beb9325e217a5706d42" name="a2a6cfa6bb1438e4eec465c79e6b13b94a9ef2524d9ebc9beb9325e217a5706d42"></a>SDRV_PMU_FILTER_RISING&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a2a6cfa6bb1438e4eec465c79e6b13b94a0e689cf40ea550745c52d93938aece8e" name="a2a6cfa6bb1438e4eec465c79e6b13b94a0e689cf40ea550745c52d93938aece8e"></a>SDRV_PMU_FILTER_FALLING&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a2a6cfa6bb1438e4eec465c79e6b13b94a574804864c0dea614277f8d526a112aa" name="a2a6cfa6bb1438e4eec465c79e6b13b94a574804864c0dea614277f8d526a112aa"></a>SDRV_PMU_FILTER_BOTH_EDGE&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a0b34178145eb8e30b0e05df06b98bc59">&#9670;&nbsp;</a></span>sdrv_pmu_error</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a0b34178145eb8e30b0e05df06b98bc59">sdrv_pmu_error</a></td>
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<p>PMU status error code. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a0b34178145eb8e30b0e05df06b98bc59a69081c1813d884d8638c9c07109c845e" name="a0b34178145eb8e30b0e05df06b98bc59a69081c1813d884d8638c9c07109c845e"></a>SDRV_PMU_CONFIG_TYPE_WRONG&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a0b34178145eb8e30b0e05df06b98bc59a5817c8ce96e5ad526de278593ad0e317" name="a0b34178145eb8e30b0e05df06b98bc59a5817c8ce96e5ad526de278593ad0e317"></a>SDRV_PMU_CONFIG_NOT_SUPPORT&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a38576bf961292eaf9de59b2b9033f336">&#9670;&nbsp;</a></span>sdrv_pmu_hw_power_down_req</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a38576bf961292eaf9de59b2b9033f336">sdrv_pmu_hw_power_down_req</a></td>
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<p>Definition for hardware power down request. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336ace2a87344928f46a6bfcaddb618a365b" name="a38576bf961292eaf9de59b2b9033f336ace2a87344928f46a6bfcaddb618a365b"></a>SDRV_PMU_SEM_INT_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336a69f46f2dff4695f09e34a402019efb0d" name="a38576bf961292eaf9de59b2b9033f336a69f46f2dff4695f09e34a402019efb0d"></a>SDRV_PMU_RESERVED_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336ab34c472e8ffab0700e9e0cdefbe85ab0" name="a38576bf961292eaf9de59b2b9033f336ab34c472e8ffab0700e9e0cdefbe85ab0"></a>SDRV_PMU_FS32K_LVPG_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336a06a47db24bc1804fb1acf46dac8f95e2" name="a38576bf961292eaf9de59b2b9033f336a06a47db24bc1804fb1acf46dac8f95e2"></a>SDRV_PMU_VD_SF_INT_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336a3c432eb8221d3500f0cf9b67fd6d55e5" name="a38576bf961292eaf9de59b2b9033f336a3c432eb8221d3500f0cf9b67fd6d55e5"></a>SDRV_PMU_VD_AP_INT_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336aa9f4a62a03e4de3d5094c77dc25f3060" name="a38576bf961292eaf9de59b2b9033f336aa9f4a62a03e4de3d5094c77dc25f3060"></a>SDRV_PMU_SF_PT_SENSOR_INT_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336a3bbf6b408f38cbd439c87033c52beae9" name="a38576bf961292eaf9de59b2b9033f336a3bbf6b408f38cbd439c87033c52beae9"></a>SDRV_PMU_AP_PT_SENSOR_INT_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a38576bf961292eaf9de59b2b9033f336a680a270db96ecaa1fc522a7eebe9b24b" name="a38576bf961292eaf9de59b2b9033f336a680a270db96ecaa1fc522a7eebe9b24b"></a>SDRV_PMU_EFUSE_VIO_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#adc0c6318ecbe2907cf3b3de17224d3cc">&#9670;&nbsp;</a></span>sdrv_pmu_int_type</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#adc0c6318ecbe2907cf3b3de17224d3cc">sdrv_pmu_int_type</a></td>
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<p>Definition for PMU interrupt type. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3ccabd82e38c50b36f6ab3606316222e41d2" name="adc0c6318ecbe2907cf3b3de17224d3ccabd82e38c50b36f6ab3606316222e41d2"></a>SDRV_PMU_INT_PWRON0_RDY_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3ccaeb4fea8ef4a1f828f5f5d86dce6ff2f4" name="adc0c6318ecbe2907cf3b3de17224d3ccaeb4fea8ef4a1f828f5f5d86dce6ff2f4"></a>SDRV_PMU_INT_PWRON2_RDY_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3cca1ff1b7f6884880bc143b679ce6c8e4ca" name="adc0c6318ecbe2907cf3b3de17224d3cca1ff1b7f6884880bc143b679ce6c8e4ca"></a>SDRV_PMU_INT_PWRUP_TO_RUN_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3cca4c1ec4247cc35b025defba0bac14c9fb" name="adc0c6318ecbe2907cf3b3de17224d3cca4c1ec4247cc35b025defba0bac14c9fb"></a>SDRV_PMU_INT_SLEEP_TO_RUN_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3cca843f26b84e6423cfd31b4701a55e0541" name="adc0c6318ecbe2907cf3b3de17224d3cca843f26b84e6423cfd31b4701a55e0541"></a>SDRV_PMU_INT_HIBERNATE_TO_RUN_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3ccae344b7aa680a3749958e54369982ae23" name="adc0c6318ecbe2907cf3b3de17224d3ccae344b7aa680a3749958e54369982ae23"></a>SDRV_PMU_INT_LOCKSTEP_ERR&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3cca91dd38cc8f83cf97f62d1b2d0c4eda89" name="adc0c6318ecbe2907cf3b3de17224d3cca91dd38cc8f83cf97f62d1b2d0c4eda89"></a>SDRV_PMU_INT_SWM_WARN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3ccaa3cd7dc685925a29883c21d00dc146c0" name="adc0c6318ecbe2907cf3b3de17224d3ccaa3cd7dc685925a29883c21d00dc146c0"></a>SDRV_PMU_INT_SWM_FATAL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adc0c6318ecbe2907cf3b3de17224d3cca3d1a04357c59ad6cb92f63a468939f97" name="adc0c6318ecbe2907cf3b3de17224d3cca3d1a04357c59ad6cb92f63a468939f97"></a>SDRV_PMU_INT_POWER_DOWN_REQ&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a6b71374344b726090e93dada7f489cf5">&#9670;&nbsp;</a></span>sdrv_pmu_mode</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a6b71374344b726090e93dada7f489cf5">sdrv_pmu_mode</a></td>
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<p>Definition for PMU work mode. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a6b71374344b726090e93dada7f489cf5aa13d79e1a9a3fd8ee393a1357d7f2266" name="a6b71374344b726090e93dada7f489cf5aa13d79e1a9a3fd8ee393a1357d7f2266"></a>SDRV_PMU_RUN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a6b71374344b726090e93dada7f489cf5aa6b2f8999ba712639637c89b277fb2e2" name="a6b71374344b726090e93dada7f489cf5aa6b2f8999ba712639637c89b277fb2e2"></a>SDRV_PMU_SLEEP&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a6b71374344b726090e93dada7f489cf5ad293a7c25c6c5baef8aa5049d43a07e1" name="a6b71374344b726090e93dada7f489cf5ad293a7c25c6c5baef8aa5049d43a07e1"></a>SDRV_PMU_HIBERNATE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a6b71374344b726090e93dada7f489cf5a90499eacc20f58d5d49d5535c6a97c6f" name="a6b71374344b726090e93dada7f489cf5a90499eacc20f58d5d49d5535c6a97c6f"></a>SDRV_PMU_RTC&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#aed77a582ed339369ff06981e2a1818d9">&#9670;&nbsp;</a></span>sdrv_pmu_operate</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#aed77a582ed339369ff06981e2a1818d9">sdrv_pmu_operate</a></td>
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<p>Definition for pmu pwr_ctrl and pwr_on operate by hardware or software override. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="aed77a582ed339369ff06981e2a1818d9ad634df2367a3089ac5e520a53126daa6" name="aed77a582ed339369ff06981e2a1818d9ad634df2367a3089ac5e520a53126daa6"></a>SDRV_PMU_MANUAL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aed77a582ed339369ff06981e2a1818d9ac0d5bc5dcc57f6eba866c11486a17af3" name="aed77a582ed339369ff06981e2a1818d9ac0d5bc5dcc57f6eba866c11486a17af3"></a>SDRV_PMU_AUTO&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a3cc1489ac84fa48da8f2fbe3466ce06e">&#9670;&nbsp;</a></span>sdrv_pmu_pg</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a3cc1489ac84fa48da8f2fbe3466ce06e">sdrv_pmu_pg</a></td>
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<p>Definition for pmu power good config. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a3cc1489ac84fa48da8f2fbe3466ce06eac57c15cd013204202eaa0a49673a11cc" name="a3cc1489ac84fa48da8f2fbe3466ce06eac57c15cd013204202eaa0a49673a11cc"></a>SDRV_PMU_POWER_GOOD_ENABLE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a3cc1489ac84fa48da8f2fbe3466ce06ea153bae754ac70f39caceb61dcac85a32" name="a3cc1489ac84fa48da8f2fbe3466ce06ea153bae754ac70f39caceb61dcac85a32"></a>SDRV_PMU_POWER_GOOD_DISABLE&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#abf2e776dcfd5fb12be0b9227df961672">&#9670;&nbsp;</a></span>sdrv_pmu_polarity</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#abf2e776dcfd5fb12be0b9227df961672">sdrv_pmu_polarity</a></td>
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<p>Definition for pmu wakeup pin and button control active level or pulse. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="abf2e776dcfd5fb12be0b9227df961672a0fa96ab3d6b68aed67c64002348e43ed" name="abf2e776dcfd5fb12be0b9227df961672a0fa96ab3d6b68aed67c64002348e43ed"></a>SDRV_PMU_HIGH_LEVEL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="abf2e776dcfd5fb12be0b9227df961672aaecc81e81cd0c5eb4c373a320c003b3b" name="abf2e776dcfd5fb12be0b9227df961672aaecc81e81cd0c5eb4c373a320c003b3b"></a>SDRV_PMU_LOW_LEVEL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="abf2e776dcfd5fb12be0b9227df961672a9efbea761865b9986d4ead5e786c3963" name="abf2e776dcfd5fb12be0b9227df961672a9efbea761865b9986d4ead5e786c3963"></a>SDRV_PMU_RISING_EDGE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="abf2e776dcfd5fb12be0b9227df961672accd0ec0c603f24f1a031eb5bc1b27fba" name="abf2e776dcfd5fb12be0b9227df961672accd0ec0c603f24f1a031eb5bc1b27fba"></a>SDRV_PMU_FALLING_EDGE&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a08d09195b2883b87c34383eebb6454ac">&#9670;&nbsp;</a></span>sdrv_pmu_power_down_reason</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a08d09195b2883b87c34383eebb6454ac">sdrv_pmu_power_down_reason</a></td>
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<p>Definition for power down reason. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca145c4d58c045608ffb43691521563fce" name="a08d09195b2883b87c34383eebb6454aca145c4d58c045608ffb43691521563fce"></a>SDRV_PMU_POWER_DOWN_SMC_CHECK_FAIL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca4de9506b665fe1bab95a97f1f033df9b" name="a08d09195b2883b87c34383eebb6454aca4de9506b665fe1bab95a97f1f033df9b"></a>SDRV_PMU_POWER_DOWN_RESERVED&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca972ccf9057363b0044063a98b4ae95b9" name="a08d09195b2883b87c34383eebb6454aca972ccf9057363b0044063a98b4ae95b9"></a>SDRV_PMU_POWER_DOWN_SEM_INT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca2cbc3973c754e5544fba335b2924e2ad" name="a08d09195b2883b87c34383eebb6454aca2cbc3973c754e5544fba335b2924e2ad"></a>SDRV_PMU_POWER_DOWN_RESERVED_1&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca932da5373200ca30f4194bab157300b0" name="a08d09195b2883b87c34383eebb6454aca932da5373200ca30f4194bab157300b0"></a>SDRV_PMU_POWER_DOWN_FS32K_LVPG&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca6bd823f865facecca382e3a0dfb05859" name="a08d09195b2883b87c34383eebb6454aca6bd823f865facecca382e3a0dfb05859"></a>SDRV_PMU_POWER_DOWN_VD_SF_INT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca648b67963bab654785d85ef23d88ba53" name="a08d09195b2883b87c34383eebb6454aca648b67963bab654785d85ef23d88ba53"></a>SDRV_PMU_POWER_DOWN_VD_AP_INT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca00817a235b3ec0344dad26b3e7e0f860" name="a08d09195b2883b87c34383eebb6454aca00817a235b3ec0344dad26b3e7e0f860"></a>SDRV_PMU_POWER_DOWN_SF_PT_SENSOR_INT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454acac3e8285a12c26518d57200958ab4ef68" name="a08d09195b2883b87c34383eebb6454acac3e8285a12c26518d57200958ab4ef68"></a>SDRV_PMU_POWER_DOWN_AP_PT_SENSOR_INT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454acab825e1dcfabc4e3c0a833dff0a1ed5e4" name="a08d09195b2883b87c34383eebb6454acab825e1dcfabc4e3c0a833dff0a1ed5e4"></a>SDRV_PMU_POWER_DOWN_EFUSE_VIO&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca0b0caf9e746470abcc610ae399836eab" name="a08d09195b2883b87c34383eebb6454aca0b0caf9e746470abcc610ae399836eab"></a>SDRV_PMU_POWER_DOWN_SOFTWARE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a08d09195b2883b87c34383eebb6454aca2a42770be8bab8d8fda37da68c4a3540" name="a08d09195b2883b87c34383eebb6454aca2a42770be8bab8d8fda37da68c4a3540"></a>SDRV_PMU_POWER_DOWN_BC&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#af9643252117830e6868a76888b8397f3">&#9670;&nbsp;</a></span>sdrv_pmu_pwr_ctrl</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#af9643252117830e6868a76888b8397f3">sdrv_pmu_pwr_ctrl</a></td>
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<p>Definition for pmu pwr_ctrl. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="af9643252117830e6868a76888b8397f3a8916b630eeda01ef792cca3f1ab778e1" name="af9643252117830e6868a76888b8397f3a8916b630eeda01ef792cca3f1ab778e1"></a>SDRV_PMU_PWR_CTRL_0&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="af9643252117830e6868a76888b8397f3aaddf4a83cdd405dd48ca35735949c97b" name="af9643252117830e6868a76888b8397f3aaddf4a83cdd405dd48ca35735949c97b"></a>SDRV_PMU_PWR_CTRL_1&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="af9643252117830e6868a76888b8397f3ad1ea46c7616f63c928e1ba99bbab515a" name="af9643252117830e6868a76888b8397f3ad1ea46c7616f63c928e1ba99bbab515a"></a>SDRV_PMU_PWR_CTRL_2&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="af9643252117830e6868a76888b8397f3a247680856a08d9da84fe549cf42320f6" name="af9643252117830e6868a76888b8397f3a247680856a08d9da84fe549cf42320f6"></a>SDRV_PMU_PWR_CTRL_3&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#afe1aca1cdb02f27edb4b050c35863dc4">&#9670;&nbsp;</a></span>sdrv_pmu_pwr_ctrl_polarity</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#afe1aca1cdb02f27edb4b050c35863dc4">sdrv_pmu_pwr_ctrl_polarity</a></td>
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<p>Definition for PWRCTRL active level. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="afe1aca1cdb02f27edb4b050c35863dc4a90b116eb2f8b0ceb5766deed81caba02" name="afe1aca1cdb02f27edb4b050c35863dc4a90b116eb2f8b0ceb5766deed81caba02"></a>SDRV_PMU_PWR_CTRL_HIGH_ACTIVE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="afe1aca1cdb02f27edb4b050c35863dc4ae958fab894ea4bfedea6336b2f934b5d" name="afe1aca1cdb02f27edb4b050c35863dc4ae958fab894ea4bfedea6336b2f934b5d"></a>SDRV_PMU_PWR_CTRL_LOW_ACTIVE&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#affbd66794543b20bd60990c9d0a5f74c">&#9670;&nbsp;</a></span>sdrv_pmu_pwr_on</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#affbd66794543b20bd60990c9d0a5f74c">sdrv_pmu_pwr_on</a></td>
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<p>Definition for pmu pwr_on, now pwr_on_0 use for internal DCDC, pwr_on_2 use for internal LDO. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="affbd66794543b20bd60990c9d0a5f74ca0ece6b668b10dc207ca9263ce0f6cf95" name="affbd66794543b20bd60990c9d0a5f74ca0ece6b668b10dc207ca9263ce0f6cf95"></a>SDRV_PMU_PWR_ON_0&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="affbd66794543b20bd60990c9d0a5f74cae116e0d9aee471bea9debd3bcb04b4fd" name="affbd66794543b20bd60990c9d0a5f74cae116e0d9aee471bea9debd3bcb04b4fd"></a>SDRV_PMU_PWR_ON_1&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="affbd66794543b20bd60990c9d0a5f74ca8e49224082281eff53bca45022090984" name="affbd66794543b20bd60990c9d0a5f74ca8e49224082281eff53bca45022090984"></a>SDRV_PMU_PWR_ON_2&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="affbd66794543b20bd60990c9d0a5f74caed24a3adc570e1dedb11cd107aa3db57" name="affbd66794543b20bd60990c9d0a5f74caed24a3adc570e1dedb11cd107aa3db57"></a>SDRV_PMU_PWR_ON_3&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#ab7ae4ddc744ebe4cfa410c4c7b496366">&#9670;&nbsp;</a></span>sdrv_pmu_state</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#ab7ae4ddc744ebe4cfa410c4c7b496366">sdrv_pmu_state</a></td>
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<p>Definition for config minimal delay for state transition. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ab7ae4ddc744ebe4cfa410c4c7b496366abacd9c1b2e2ebbc3089502ca08fb07f9" name="ab7ae4ddc744ebe4cfa410c4c7b496366abacd9c1b2e2ebbc3089502ca08fb07f9"></a>SDRV_PMU_STATE_PWR_ON&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ab7ae4ddc744ebe4cfa410c4c7b496366a8b98bdf70c892cafe478d04c2a78ee5d" name="ab7ae4ddc744ebe4cfa410c4c7b496366a8b98bdf70c892cafe478d04c2a78ee5d"></a>SDRV_PMU_STATE_PWRUP_RUN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ab7ae4ddc744ebe4cfa410c4c7b496366ae937a3c7e188af6650bf3e1b44775f1a" name="ab7ae4ddc744ebe4cfa410c4c7b496366ae937a3c7e188af6650bf3e1b44775f1a"></a>SDRV_PMU_STATE_SLEEP_RUN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ab7ae4ddc744ebe4cfa410c4c7b496366a5f91465ae22f657fedd492d81b249113" name="ab7ae4ddc744ebe4cfa410c4c7b496366a5f91465ae22f657fedd492d81b249113"></a>SDRV_PMU_STATE_HIBERNATE_RUN&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a9a98d6d23c181d6766d9399190cc970a">&#9670;&nbsp;</a></span>sdrv_pmu_target</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a9a98d6d23c181d6766d9399190cc970a">sdrv_pmu_target</a></td>
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<p>Definition for pmu pwr_on control target. It use for hardware power on sequence. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a9a98d6d23c181d6766d9399190cc970aaa2a133ba96dd351098c97e8aec0b7ec2" name="a9a98d6d23c181d6766d9399190cc970aaa2a133ba96dd351098c97e8aec0b7ec2"></a>SDRV_PMU_SAF&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a9a98d6d23c181d6766d9399190cc970aae6e064ead30cf12c014580b4234ee5be" name="a9a98d6d23c181d6766d9399190cc970aae6e064ead30cf12c014580b4234ee5be"></a>SDRV_PMU_AP&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a9a98d6d23c181d6766d9399190cc970aa88f20464c3e5ee18eb8ef8d5400d5f24" name="a9a98d6d23c181d6766d9399190cc970aa88f20464c3e5ee18eb8ef8d5400d5f24"></a>SDRV_PMU_OTHER&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#aa4d8fc29b5efd80f46df265b5f74b043">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_glitch</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#aa4d8fc29b5efd80f46df265b5f74b043">sdrv_pmu_wakeup_glitch</a></td>
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<p>Definition for wakeup pin glitch, glitch is enable if wakeup edge &lt; 32K cycle. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="aa4d8fc29b5efd80f46df265b5f74b043a9146943f318caccff4869139c6252168" name="aa4d8fc29b5efd80f46df265b5f74b043a9146943f318caccff4869139c6252168"></a>SDRV_PMU_GLITCH_NONE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa4d8fc29b5efd80f46df265b5f74b043a3e14d56af9b3ba43f40e4ea80a0e6059" name="aa4d8fc29b5efd80f46df265b5f74b043a3e14d56af9b3ba43f40e4ea80a0e6059"></a>SDRV_PMU_GLITCH_RISING&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa4d8fc29b5efd80f46df265b5f74b043a06d1013b3c82f3d48c5cba206810cc8c" name="aa4d8fc29b5efd80f46df265b5f74b043a06d1013b3c82f3d48c5cba206810cc8c"></a>SDRV_PMU_GLITCH_FALLING&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa4d8fc29b5efd80f46df265b5f74b043aae9616cfbc5cbec8d07b5dd5e339ebee" name="aa4d8fc29b5efd80f46df265b5f74b043aae9616cfbc5cbec8d07b5dd5e339ebee"></a>SDRV_PMU_GLITCH_BOTH&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a384ffa29e3653fafb5f366b16863891a">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_in_rtc</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a384ffa29e3653fafb5f366b16863891a">sdrv_pmu_wakeup_in_rtc</a></td>
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<p>Definition for pmu action when receive wakeup during rtc state. </p>
<p >PMU has RTC and OFF state. During RTC state, pmu doesn't respond to wakeup event. It only responds to wakeup event in OFF state. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a384ffa29e3653fafb5f366b16863891aa6e69f0b2df396501dec3a235e84ab6b5" name="a384ffa29e3653fafb5f366b16863891aa6e69f0b2df396501dec3a235e84ab6b5"></a>SDRV_PMU_WAKEUP_IN_RTC_IGNORE&#160;</td><td class="fielddoc"><p >ignore wakeup event in rtc state </p>
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<tr><td class="fieldname"><a id="a384ffa29e3653fafb5f366b16863891aa88e61c6df4793c6a3e3813a728cadf1a" name="a384ffa29e3653fafb5f366b16863891aa88e61c6df4793c6a3e3813a728cadf1a"></a>SDRV_PMU_WAKEUP_IN_RTC_LATCH&#160;</td><td class="fielddoc"><p >latch wakeup event in rtc state </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a4951594b8b635052d3838c92fdd73485">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a4951594b8b635052d3838c92fdd73485">sdrv_pmu_wakeup_pin</a></td>
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<p>Definition for pmu wakeup pin. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a4951594b8b635052d3838c92fdd73485a4239db6273171ae873a8e61f526c8f7c" name="a4951594b8b635052d3838c92fdd73485a4239db6273171ae873a8e61f526c8f7c"></a>SDRV_PMU_WAKEUP_PIN_0&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4951594b8b635052d3838c92fdd73485ac4b99d80d67b91bc71ddffa95d3b630c" name="a4951594b8b635052d3838c92fdd73485ac4b99d80d67b91bc71ddffa95d3b630c"></a>SDRV_PMU_WAKEUP_PIN_1&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#aaef5050902ef9f85deea14daa573082f">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_logic</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#aaef5050902ef9f85deea14daa573082f">sdrv_pmu_wakeup_pin_logic</a></td>
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<p>Definition for pmu wakeup pin logic. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="aaef5050902ef9f85deea14daa573082fa471a1ddcf488aa54ad930783198aa42b" name="aaef5050902ef9f85deea14daa573082fa471a1ddcf488aa54ad930783198aa42b"></a>SDRV_PMU_WAKEUP_PIN_OR&#160;</td><td class="fielddoc"><p >generate wakeup event either pin0 or pin1 active. </p>
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<tr><td class="fieldname"><a id="aaef5050902ef9f85deea14daa573082fa4e388c48571051071c1ad9a631892c51" name="aaef5050902ef9f85deea14daa573082fa4e388c48571051071c1ad9a631892c51"></a>SDRV_PMU_WAKEUP_PIN_AND&#160;</td><td class="fielddoc"><p >generate wakeup event both pin0/1 active. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a69f2bd1786febcc6675f8dc2b0f28544">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_src</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#a69f2bd1786febcc6675f8dc2b0f28544">sdrv_pmu_wakeup_src</a></td>
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<p>Definition for wakeup source. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a69f2bd1786febcc6675f8dc2b0f28544ab5fa1dac98f9d54b8922b3ef5dbaa1f0" name="a69f2bd1786febcc6675f8dc2b0f28544ab5fa1dac98f9d54b8922b3ef5dbaa1f0"></a>SDRV_PMU_WAKEUP_BY_BC&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a69f2bd1786febcc6675f8dc2b0f28544ab063e2a7bd003bd9f48d93a9c7e999f6" name="a69f2bd1786febcc6675f8dc2b0f28544ab063e2a7bd003bd9f48d93a9c7e999f6"></a>SDRV_PMU_WAKEUP_BY_RTC&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a69f2bd1786febcc6675f8dc2b0f28544ab0bbf2cdd09e866620fdbdd3f21c68be" name="a69f2bd1786febcc6675f8dc2b0f28544ab0bbf2cdd09e866620fdbdd3f21c68be"></a>SDRV_PMU_WAKEUP_BY_PIN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a69f2bd1786febcc6675f8dc2b0f28544afcdf47af45413be377af873de2538fc4" name="a69f2bd1786febcc6675f8dc2b0f28544afcdf47af45413be377af873de2538fc4"></a>SDRV_PMU_WAKEUP_BY_HW_RESET&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#ac335415a1e869f295b44c629a9484fd8">&#9670;&nbsp;</a></span>srcs_bit</h2>
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<td class="memname">enum <a class="el" href="sdrv__pmu_8h.html#ac335415a1e869f295b44c629a9484fd8">srcs_bit</a></td>
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<p>Description for SRCS_BITS each bit. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8aa185ff0060e95025df56a6d4c1921402" name="ac335415a1e869f295b44c629a9484fd8aa185ff0060e95025df56a6d4c1921402"></a>SRCS_RSTGEN_SF_I_IST_EN_RTC_OVRD&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a342a12a657b96756209d7662b81033ef" name="ac335415a1e869f295b44c629a9484fd8a342a12a657b96756209d7662b81033ef"></a>SRCS_RSTGEN_SF_I_IST_EN_RTC_OVVAL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8aaa838c8bff181a6a00ed44cd382cef5a" name="ac335415a1e869f295b44c629a9484fd8aaa838c8bff181a6a00ed44cd382cef5a"></a>SRCS_ISTC_RTC_SS_POST_EN_OVVAL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a6ecb316c51f8f3407f47e8ef3a473ea2" name="ac335415a1e869f295b44c629a9484fd8a6ecb316c51f8f3407f47e8ef3a473ea2"></a>SRCS_ISTC_RTC_SS_POST_EN_OVRD&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a8b7eabda9480e3b5987880e31252343d" name="ac335415a1e869f295b44c629a9484fd8a8b7eabda9480e3b5987880e31252343d"></a>SRCS_ISTC_PLL_CFG_POST_EN_OVVAL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8ad52ef22e744bbedf3bebd0abd8482303" name="ac335415a1e869f295b44c629a9484fd8ad52ef22e744bbedf3bebd0abd8482303"></a>SRCS_ISTC_PLL_CFG_POST_EN_OVRD&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a81d4822ba5db9e516a4dd34ff9d3c5d6" name="ac335415a1e869f295b44c629a9484fd8a81d4822ba5db9e516a4dd34ff9d3c5d6"></a>SRCS_ISTC_POWER_CFG_POST_EN_OVVAL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a4ceaffc66d255a2ed0d64d6960bb7609" name="ac335415a1e869f295b44c629a9484fd8a4ceaffc66d255a2ed0d64d6960bb7609"></a>SRCS_ISTC_POWER_CFG_POST_EN_OVRD&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a8274a41352fcbdf386914c5c616bb3ca" name="ac335415a1e869f295b44c629a9484fd8a8274a41352fcbdf386914c5c616bb3ca"></a>SRCS_PT_SNS_SF_PT_SNS_AP_CVEN33_FORCE_OFF&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a18f340fc6df1d9f8762ca054c2b174bd" name="ac335415a1e869f295b44c629a9484fd8a18f340fc6df1d9f8762ca054c2b174bd"></a>SRCS_ANA_SF_ANALOG_IP_CVEN33_FORCE_OFF&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a8aa08f1e639a80829587f285b0e10de8" name="ac335415a1e869f295b44c629a9484fd8a8aa08f1e639a80829587f285b0e10de8"></a>SRCS_DCDC_ISO_EN_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a2de4afa773138cb7c80eb2ff8052cdbd" name="ac335415a1e869f295b44c629a9484fd8a2de4afa773138cb7c80eb2ff8052cdbd"></a>SRCS_LDO_ISO_EN_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a74e68bd7a634bd1aa5042b7d3d71c81c" name="ac335415a1e869f295b44c629a9484fd8a74e68bd7a634bd1aa5042b7d3d71c81c"></a>SRCS_BGR_LDO_AUTO_DISABLE_BY_PMU_EN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8ac6cb1ff5a72438e59111a9a1c03a4c9c" name="ac335415a1e869f295b44c629a9484fd8ac6cb1ff5a72438e59111a9a1c03a4c9c"></a>SRCS_BGR_SF_AUTO_DISABLE_BY_SMC_EN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a8ef53b13b2d37fe951c2cf752cabdf37" name="ac335415a1e869f295b44c629a9484fd8a8ef53b13b2d37fe951c2cf752cabdf37"></a>SRCS_WAKEUP0_FALL_EDGE_TO_PULSE_EN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a9774ed4492c0655d54561dff0b08147d" name="ac335415a1e869f295b44c629a9484fd8a9774ed4492c0655d54561dff0b08147d"></a>SRCS_POR_SF_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a538998a6378869680e3c0a5cfd46df3a" name="ac335415a1e869f295b44c629a9484fd8a538998a6378869680e3c0a5cfd46df3a"></a>SRCS_RC24M_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a8490ae6d94db1040d5dbd65c22298a7d" name="ac335415a1e869f295b44c629a9484fd8a8490ae6d94db1040d5dbd65c22298a7d"></a>SRCS_VD_SF_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a75f629f46a607ece74682ba8e7a5fd49" name="ac335415a1e869f295b44c629a9484fd8a75f629f46a607ece74682ba8e7a5fd49"></a>SRCS_BGR_ANA_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a3de74d4c7967c813e56f3fddefb620ec" name="ac335415a1e869f295b44c629a9484fd8a3de74d4c7967c813e56f3fddefb620ec"></a>SRCS_BGR_SF_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a3b7dfcde865947d80ccbffb6e22435e0" name="ac335415a1e869f295b44c629a9484fd8a3b7dfcde865947d80ccbffb6e22435e0"></a>SRCS_BGR_LDO_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8ab54df3efe794f4edac1a2d7da8b9c81c" name="ac335415a1e869f295b44c629a9484fd8ab54df3efe794f4edac1a2d7da8b9c81c"></a>SRCS_POR_AP_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8adeb378a1f2dcc5adb6804ab2d9b0ca38" name="ac335415a1e869f295b44c629a9484fd8adeb378a1f2dcc5adb6804ab2d9b0ca38"></a>SRCS_VD_AP_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8adadd75d4316513ef09cf79bfc3c02d24" name="ac335415a1e869f295b44c629a9484fd8adadd75d4316513ef09cf79bfc3c02d24"></a>SRCS_BGR_AP_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a36ab5ca2d2e1178350f3fee226013743" name="ac335415a1e869f295b44c629a9484fd8a36ab5ca2d2e1178350f3fee226013743"></a>SRCS_BGR_DISP_PU33_B&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac335415a1e869f295b44c629a9484fd8a59da738f22ccdcc813c8d9727fa64a21" name="ac335415a1e869f295b44c629a9484fd8a59da738f22ccdcc813c8d9727fa64a21"></a>SRCS_WAKEUP0_RISE_EDGE_TO_PULSE_EN&#160;</td><td class="fielddoc"></td></tr>
</table>
</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a id="a20e6a5cb006db98d4fe735ea2355e1d5" name="a20e6a5cb006db98d4fe735ea2355e1d5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a20e6a5cb006db98d4fe735ea2355e1d5">&#9670;&nbsp;</a></span>sdrv_pmu_ana_sf_analog_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_ana_sf_analog_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
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<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control ana_sf analog IP cven33 power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a168faa768914505dbf538681d4d99b46">&#9670;&nbsp;</a></span>sdrv_pmu_analog_cven33_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_analog_cven33_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control pt_sns_sf/pt_sns_ap, analog ip, such as adc, acmp cven33 power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a279e9d5d986fb75ba5716a6dc7e8843d">&#9670;&nbsp;</a></span>sdrv_pmu_ap_domain_power_good_monitor()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_ap_domain_power_good_monitor </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a33001fb3afa4a19e6111207d98c80dc8">sdrv_pmu_pg_e</a>&#160;</td>
<td class="paramname"><em>cfg</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Config ap domain 3.3v and 0.8v power good monitor. </p>
<p >This function config ap domain power monitor , when enabled, once 3.3v or 0.8v is not good, ap isolate and sf_por_b is assert. After power is good, ap isolate and sf_por_b deassert.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">cfg</td><td>SDRV_PMU_POWER_GOOD_ENABLE/SDRV_PMU_POWER_GOOD_DISABLE </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#adfe4790b451ec77888ea68ea39dd6ee3">&#9670;&nbsp;</a></span>sdrv_pmu_bgr_ana_sf1_sf2_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_bgr_ana_sf1_sf2_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control bgr ana sf1 sf2 power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a7544d8f8b0971f2fb21295ad45adf6df">&#9670;&nbsp;</a></span>sdrv_pmu_bgr_ap_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_bgr_ap_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
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</table>
</div><div class="memdoc">
<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control bgr ap power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
<a id="a617f26ff657ec62493837ddc1afff3e5" name="a617f26ff657ec62493837ddc1afff3e5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a617f26ff657ec62493837ddc1afff3e5">&#9670;&nbsp;</a></span>sdrv_pmu_bgr_disp_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_bgr_disp_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control bgr display power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a7d71529c62b85d4a2f9e8dfb4a6ced7e">&#9670;&nbsp;</a></span>sdrv_pmu_bgr_ldo_auto_disable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_bgr_ldo_auto_disable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
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<p>Config bgr_ldo auto-disable. </p>
<p >This function config whether bgr_ldo auto-disable with rc24m/xtal24m when enter low power mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents auto-disable with rc24m/xtal24m, false represents not. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ac1ceaf24df259206d5246478f763b9fe">&#9670;&nbsp;</a></span>sdrv_pmu_bgr_ldo_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_bgr_ldo_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control bgr ldo power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a9eed53c304a12c540dabac890e49db87">&#9670;&nbsp;</a></span>sdrv_pmu_bgr_sf_auto_disable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_bgr_sf_auto_disable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Config bgr_sf auto-disable. </p>
<p >This function config whether bgr_sf auto-disable with rc24m/xtal24m when enter low power mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents auto-disable with rc24m/xtal24m, false represents not. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a3b8e9ec9a99927184dd7a227a41d65be">&#9670;&nbsp;</a></span>sdrv_pmu_bgr_sf_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_bgr_sf_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
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<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control bgr_sf power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a70b06221640274101d172d6527465f70">&#9670;&nbsp;</a></span>sdrv_pmu_button_control_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_button_control_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#aa2aa1897b6da63a32bffc817fd2af69d">sdrv_pmu_buttonctrl_config_t</a> *&#160;</td>
<td class="paramname"><em>config</em></td><td>)</td>
<td></td>
</tr>
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<p>Initialize button control parameter config. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">config</td><td>bc config parameter. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a7471d57bb13689905391326624067b85">&#9670;&nbsp;</a></span>sdrv_pmu_button_control_edge_filter_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_button_control_edge_filter_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a6fa4420fec8a72ef0c79143079091e25">sdrv_pmu_edge_filter_t</a> *&#160;</td>
<td class="paramname"><em>filter_config</em></td><td>)</td>
<td></td>
</tr>
</table>
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<p>Config edge filter for button control. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">filter_config</td><td>edge filter parameters. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aa89c588d33d5392fc5d05e1cec3b2fbe">&#9670;&nbsp;</a></span>sdrv_pmu_button_control_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_button_control_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
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<p>Enable or Disable button control function. </p>
<p >This function config whether use button control or not.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents enable, false represents disable. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#af43caa532a1ca1af4186769e5af4dc0e">&#9670;&nbsp;</a></span>sdrv_pmu_button_control_fsm_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_button_control_fsm_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
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<p>Enable status monitor for button control. </p>
<p >This function enable satus monitor for button control. When enabled, only responds the valid power on request in BC_OFF state, and only respond the valid power off request in BC_ON state.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents enable fsm check, false represents disable fsm check. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aae103f9a2dd61c47af5dcf8e6a4cb124">&#9670;&nbsp;</a></span>sdrv_pmu_button_control_init()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_button_control_init </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a15ccec33d89b7ca5d0e0254ccd314905">sdrv_pmu_bc_config_t</a> *&#160;</td>
<td class="paramname"><em>bc_config</em></td><td>)</td>
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<p>Config button control register. </p>
<p >This function config button control enter/exit rtc mode active level or pulse.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">bc_config</td><td>button control config. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a37aa957a1bffbc898b8771fc3653083b">&#9670;&nbsp;</a></span>sdrv_pmu_button_control_level_filter_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_button_control_level_filter_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a0f05d2b08795a33c9856997b6bd99363">sdrv_pmu_level_filter_enable_t</a> *&#160;</td>
<td class="paramname"><em>filter_config</em></td><td>)</td>
<td></td>
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<p>Enable level filter for button control. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">filter_config</td><td>level filter config. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a5eaa22c65d713b877b1d6db23b62bc46">&#9670;&nbsp;</a></span>sdrv_pmu_button_control_level_filter_para()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_button_control_level_filter_para </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a32d7d99593635b0674ef35d81ceb033f">sdrv_pmu_level_filter_t</a> *&#160;</td>
<td class="paramname"><em>filter_config</em></td><td>)</td>
<td></td>
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</table>
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<p>Config level filter parameters for button control. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">filter_config</td><td>level filter parameters. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ab28f5a1bbb93a42c2fb16b6845eec3ed">&#9670;&nbsp;</a></span>sdrv_pmu_clear_interrupt_status()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_clear_interrupt_status </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>bitmap</em></td><td>)</td>
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<p>Clear PMU internal interrupt status. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">bitmap</td><td>OR'Value defined in sdrv_pmu_int_type_e. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a40ef730d787ac17e46f877638df81529">&#9670;&nbsp;</a></span>sdrv_pmu_clear_power_down_reason()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_clear_power_down_reason </td>
<td>(</td>
<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
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<p>Clear system power down reason. </p>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a619699bad1c0a3f800c397f6d48a9d63">&#9670;&nbsp;</a></span>sdrv_pmu_clear_wakeup_source()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_clear_wakeup_source </td>
<td>(</td>
<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
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<p>Clear system wakeup source. </p>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ab28a06f6cca54f8767390891fc6970d9">&#9670;&nbsp;</a></span>sdrv_pmu_get_interrupt_status()</h2>
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<td class="memname">uint32_t sdrv_pmu_get_interrupt_status </td>
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<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
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<p>Get PMU internal interrupt status. </p>
<dl class="section return"><dt>Returns</dt><dd>OR'Value defined in sdrv_pmu_int_type_e. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a01836a6ae03da16d09cb5c5a0bb32a2d">&#9670;&nbsp;</a></span>sdrv_pmu_get_power_down_reason()</h2>
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<td class="memname">uint32_t sdrv_pmu_get_power_down_reason </td>
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<td class="paramname"></td><td>)</td>
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<p>Get system power down reason. </p>
<p >This function return last power down reason, each bit represent reason see sdrv_pmu_power_down_reason_e.</p>
<dl class="section return"><dt>Returns</dt><dd>uint32_t power down reason. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a342923c9b84ec3a29dec25a71f92a34e">&#9670;&nbsp;</a></span>sdrv_pmu_get_state()</h2>
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<td class="memname">uint32_t sdrv_pmu_get_state </td>
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<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
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<p>Get PMU internal state. </p>
<dl class="section return"><dt>Returns</dt><dd>PMU_STATE register value. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a736b4a5db49f8395020f582c50a9259d">&#9670;&nbsp;</a></span>sdrv_pmu_get_wakeup_source()</h2>
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<td class="memname">uint32_t sdrv_pmu_get_wakeup_source </td>
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<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
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<p>Get system wakeup source. </p>
<p >This function read pmu wakeup source, return value is OR'ed value of sdrv_pmu_wakeup_src_e</p>
<dl class="section return"><dt>Returns</dt><dd>uint32_t OR'ed value of sdrv_pmu_wakeup_src_e </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a400f4c58a9048ec58ceade6a59ae9603">&#9670;&nbsp;</a></span>sdrv_pmu_hardware_power_down_request_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_hardware_power_down_request_enable </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>enable_bitmap</em>, </td>
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<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em>&#160;</td>
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<p>Config hardware power down request enable. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable_bitmap</td><td>OR' value defined in sdrv_pmu_hw_power_down_req_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>enable or disable. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a7a287142773a285df069c2f40a205d1b">&#9670;&nbsp;</a></span>sdrv_pmu_interrupt_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_interrupt_enable </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>bitmap</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em>&#160;</td>
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<td></td>
<td>)</td>
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<p>Enable PMU internal interrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">bitmap</td><td>OR'Value defined in sdrv_pmu_int_type_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true or false. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ac2b074b4bce3046ebef1f6456e4d07a2">&#9670;&nbsp;</a></span>sdrv_pmu_minimal_delay_for_state_transition()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_minimal_delay_for_state_transition </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#acd3ee7cfb492d7e5040b4f64d551060a">sdrv_pmu_state_e</a>&#160;</td>
<td class="paramname"><em>state</em>, </td>
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<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>delay</em>, </td>
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<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>delay_adj</em>&#160;</td>
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<p>Config minimal delay for pmu state transition. </p>
<p >Delay time = 32Kcycle * (2^delay) * (delay_adj * 2 + 1)</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">state</td><td>state defined in sdrv_pmu_state_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">delay</td><td>delay value. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">delay_adj</td><td>delay adjust. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#af3297664962e091ba0a729b71648a7a7">&#9670;&nbsp;</a></span>sdrv_pmu_por_ap_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_por_ap_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control AP POR analog power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a6512e1ea03777a0a1f19a55aa7d22d5b">&#9670;&nbsp;</a></span>sdrv_pmu_por_sf_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_por_sf_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
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<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control SF POR analog power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ad050bea8abf7ff681f90b4f3fcd7e953">&#9670;&nbsp;</a></span>sdrv_pmu_power_down()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_power_down </td>
<td>(</td>
<td class="paramtype">void&#160;</td>
<td class="paramname"></td><td>)</td>
<td></td>
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<p>Software trigger power down. </p>
<p >This function write register to trigger power down request. After call this function, system will enter RTC mode at once. </p><dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a2540b56de89857fba62b3d3ac4a75766">&#9670;&nbsp;</a></span>sdrv_pmu_pt_sns_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pt_sns_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control pt_sns_sf/pt_sns_ap cven33 power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#af205b7dca6ee15bfc87c01544b6f240b">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> <a class="el" href="structsdrv__pmu__pwrctrl__config.html">sdrv_pmu_pwrctrl_config</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#acdd9333c7bb86d91198bd3e4f0d05d94">sdrv_pmu_pwr_ctrl_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#add0e25cf28d1ca00c420f229f28a3f7a">sdrv_pmu_mode_e</a>&#160;</td>
<td class="paramname"><em>mode</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a6af89e3f490c141e8c0c770742f3e35c">sdrv_pmu_pwrctrl_config_t</a> *&#160;</td>
<td class="paramname"><em>config</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<p>Config pwr ctrl output level for different mode. </p>
<p >This function config pwr ctrl output level under run/sleep/hibernate/rtc mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr ctrl pin defined in sdrv_pmu_pwr_ctrl_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">mode</td><td>pmu work mode defined in sdrv_pmu_mode_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">config</td><td>config parameters. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a4fc6526be895d6955cef951942c52d5b">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_delay_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwrctrl_delay_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a71692c62b2e5aee56cb2aea1e79310ae">sdrv_pmu_delay_period_e</a>&#160;</td>
<td class="paramname"><em>period</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#acdd9333c7bb86d91198bd3e4f0d05d94">sdrv_pmu_pwr_ctrl_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>delay</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>delay_adj</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<p>Config pwrctrl delay setting in different period. </p>
<p >Delay time = 32Kcycle * (2^delay) * (delay_adj * 2 + 1)</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">period</td><td>period defined in sdrv_pmu_delay_period_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr ctrl pin defined in sdrv_pmu_pwr_ctrl_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">delay</td><td>delay value. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">delay_adj</td><td>delay adjust value. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a63522e8cd6e263cd382cc6838db4b3d9">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_min_delay_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> <a class="el" href="structsdrv__pmu__pwrctrl__min__delay__config.html">sdrv_pmu_pwrctrl_min_delay_config</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a12e6150d15242c22b5e742569607c4a6">sdrv_pmu_pwrctrl_min_delay_config_t</a> *&#160;</td>
<td class="paramname"><em>config</em></td><td>)</td>
<td></td>
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<p>Config pwrctrl0-3 minimal delay enable config during pwrup/sleep/hibernate to run mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">config</td><td>minimal delay enable config. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a6c64fe2007766d0c216fae698504e0af">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_polarity_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwrctrl_polarity_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#acdd9333c7bb86d91198bd3e4f0d05d94">sdrv_pmu_pwr_ctrl_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a557a790aa893dadce044323a6bef17e0">sdrv_pmu_pwr_ctrl_polarity_e</a>&#160;</td>
<td class="paramname"><em>pol</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<p>Config pwrctrl0-3 active level. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr ctrl pin defined in sdrv_pmu_pwr_ctrl_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">pol</td><td>high or low level represents pwrctrl on. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aafb7984c2e9d91425ba96a9f7e0404cf">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_software_override_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwrctrl_software_override_enable </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#acdd9333c7bb86d91198bd3e4f0d05d94">sdrv_pmu_pwr_ctrl_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<p>Enable software override pwrctrl. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr ctrl pin defined in sdrv_pmu_pwr_ctrl_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true or false. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ad515666fbfeba577b7a05d0efa633cde">&#9670;&nbsp;</a></span>sdrv_pmu_pwrctrl_software_override_value()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwrctrl_software_override_value </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#acdd9333c7bb86d91198bd3e4f0d05d94">sdrv_pmu_pwr_ctrl_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>value</em>&#160;</td>
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<td></td>
<td>)</td>
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<p>Software override pwrctrl value. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr ctrl pin defined in sdrv_pmu_pwr_ctrl_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>true or false. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ad77d27d7854478d64a3b793032807925">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> <a class="el" href="structsdrv__pmu__pwron__config.html">sdrv_pmu_pwron_config</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#add0e25cf28d1ca00c420f229f28a3f7a">sdrv_pmu_mode_e</a>&#160;</td>
<td class="paramname"><em>mode</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a41996fb3f2103b60227b370d82a920cb">sdrv_pmu_pwron_config_t</a> *&#160;</td>
<td class="paramname"><em>config</em>&#160;</td>
</tr>
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<td>)</td>
<td></td><td></td>
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<p>Config pwr on whether work for different mode. </p>
<p >This function config pwr on whether work under run/sleep/hibernate/rtc mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr on defined in sdrv_pmu_pwr_on_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">mode</td><td>pmu work mode defined in sdrv_pmu_mode_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">config</td><td>config parameters. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a76ab1be0a03a8525e55601423251a64e">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_delay_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwron_delay_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a71692c62b2e5aee56cb2aea1e79310ae">sdrv_pmu_delay_period_e</a>&#160;</td>
<td class="paramname"><em>period</em>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>delay</em>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>delay_adj</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
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<p>Config pwron delay setting in different period. </p>
<p >Delay time = 32Kcycle * (2^delay) * (delay_adj * 2 + 1)</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">period</td><td>period defined in sdrv_pmu_delay_period_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwron defined in sdrv_pmu_pwr_on_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">delay</td><td>delay value. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">delay_adj</td><td>delay adjust value. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a7f464d61d898a1605b989da8355cb2a1">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_software_override_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwron_software_override_enable </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
</tr>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em>&#160;</td>
</tr>
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<td></td>
<td>)</td>
<td></td><td></td>
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<p>Enable software override pwron. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwron defined in sdrv_pmu_pwr_on_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true or false. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ae2f7a854ab4b39b73a8851fd60616a34">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_software_override_value()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwron_software_override_value </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
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<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>value</em>&#160;</td>
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<p>Software override pwron value. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwron defined in sdrv_pmu_pwr_on_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>true or false. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ab39205a42abd5affd549414036f3f811">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_target_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwron_target_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#abb637b9d9515b88905431e88bbf7f036">sdrv_pmu_target_e</a>&#160;</td>
<td class="paramname"><em>target</em>&#160;</td>
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<p>Config internal DCDC/LDO power supply. </p>
<p >This function config internal DCDC/LDO power supply to SAF/AP/Others. It will effect hardware power on sequence.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr on defined in sdrv_pmu_pwr_on_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">target</td><td>target defined in sdrv_pmu_target_e. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#adaaefd93b78a31bc7ee5e3828730081d">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_target_config_with_mode()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwron_target_config_with_mode </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a>&#160;</td>
<td class="paramname"><em>ctrl</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#add0e25cf28d1ca00c420f229f28a3f7a">sdrv_pmu_mode_e</a>&#160;</td>
<td class="paramname"><em>mode</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#abb637b9d9515b88905431e88bbf7f036">sdrv_pmu_target_e</a>&#160;</td>
<td class="paramname"><em>target</em>&#160;</td>
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<td>)</td>
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<p>Config pwron power supply target under different mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">ctrl</td><td>pwr on defined in sdrv_pmu_pwr_on_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">mode</td><td>pmu work mode defined in sdrv_pmu_mode_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">target</td><td>target defined in sdrv_pmu_target_e. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ac9ac02b94ce7cf2b6ddeced0c4bffcaf">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_watchdog_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwron_watchdog_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#aeddc38d0dc57c9ba11566faf3ddc5a8d">sdrv_pmu_pwron_wdt_config_t</a> *&#160;</td>
<td class="paramname"><em>wdt_config</em></td><td>)</td>
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<p>Config power good watchdog parameters for pwron. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">wdt_config</td><td>pwron watchdog config parameters. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a3ae0059ed969a4d255f7956d314bedc2">&#9670;&nbsp;</a></span>sdrv_pmu_pwron_watchdog_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_pwron_watchdog_enable </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#ab3381584abc515686e94c53649369d60">sdrv_pmu_pwr_on_e</a>&#160;</td>
<td class="paramname"><em>pwron</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a7c53ff4368be815a9afb4f465811353b">sdrv_pmu_pwron_wdt_enable_t</a> *&#160;</td>
<td class="paramname"><em>enable_config</em>&#160;</td>
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<p>Enable power good watchdog counter for specific pwron. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">pwron</td><td>pwron defined in sdrv_pmu_pwr_on_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable_config</td><td>enable config. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a17be5ec5afbe72b009feaed49fd4b72c">&#9670;&nbsp;</a></span>sdrv_pmu_rc24m_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_rc24m_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
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<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control rc24m analog power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a714f87c656c8c109003bc7e544275433">&#9670;&nbsp;</a></span>sdrv_pmu_rtc_to_off_ap_domain_power_good()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_rtc_to_off_ap_domain_power_good </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a33001fb3afa4a19e6111207d98c80dc8">sdrv_pmu_pg_e</a>&#160;</td>
<td class="paramname"><em>cfg</em></td><td>)</td>
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<p>Config ap domain power good consider or ignore when switching from RTC state to OFF state. </p>
<p >This function config ap domain power good whether consider when enter RTC mode. If enabled, switching from RTC state to OFF state only when the power down counter is done and ap domain power are not good. If disabled, switching from RTC state to OFF state only when the power down counter is done, but ignore ap domain power good.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">cfg</td><td>SDRV_PMU_POWER_GOOD_ENABLE/SDRV_PMU_POWER_GOOD_DISABLE </td></tr>
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</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a63ae92f3e3f740f3b5f9993f400b67c1">&#9670;&nbsp;</a></span>sdrv_pmu_rtc_to_off_saf_domain_power_good()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_rtc_to_off_saf_domain_power_good </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a33001fb3afa4a19e6111207d98c80dc8">sdrv_pmu_pg_e</a>&#160;</td>
<td class="paramname"><em>cfg</em></td><td>)</td>
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<p>Config saf domain power good consider or ignore when switching from RTC state to OFF state. </p>
<p >This function config saf domain power good whether consider when enter RTC mode. If enabled, switching from RTC state to OFF state only when the power down counter is done and saf domain power are not good. If disabled, switching from RTC state to OFF state only when the power down counter is done, but ignore saf domain power good.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">cfg</td><td>SDRV_PMU_POWER_GOOD_ENABLE/SDRV_PMU_POWER_GOOD_DISABLE </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a3c67ee849438854bfa30dc0dab7e32a4">&#9670;&nbsp;</a></span>sdrv_pmu_saf_domain_power_good_monitor()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_saf_domain_power_good_monitor </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a33001fb3afa4a19e6111207d98c80dc8">sdrv_pmu_pg_e</a>&#160;</td>
<td class="paramname"><em>cfg</em></td><td>)</td>
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<p>Config saf domain 3.3v and 0.8v power good monitor. </p>
<p >This function config saf domain power monitor , when enabled, once 3.3v or 0.8v is not good, saf isolate and sf_por_b is assert. After power is good, saf isolate and sf_por_b deassert.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">cfg</td><td>SDRV_PMU_POWER_GOOD_ENABLE/SDRV_PMU_POWER_GOOD_DISABLE </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ae7bbb4f2dbfced91a6e593d7b88c1f64">&#9670;&nbsp;</a></span>sdrv_pmu_srcs_clear()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_srcs_clear </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>bitmap</em></td><td>)</td>
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<p>Clear corresponding bit to 0 for 32bit state retention bits register. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">bitmap</td><td>each bit description in enum srcs_bit </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#afd6a76025dc2064f46cb594a24f31fc0">&#9670;&nbsp;</a></span>sdrv_pmu_srcs_set()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_srcs_set </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>bitmap</em></td><td>)</td>
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<p>Set corresponding bit to 1 for 32bit state retention bits register. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">bitmap</td><td>each bit description in enum srcs_bit </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ab65ff47e383587f4b4a2e0bf59df5d50">&#9670;&nbsp;</a></span>sdrv_pmu_target_power_on_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_target_power_on_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#abb637b9d9515b88905431e88bbf7f036">sdrv_pmu_target_e</a>&#160;</td>
<td class="paramname"><em>target</em>, </td>
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<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#add0e25cf28d1ca00c420f229f28a3f7a">sdrv_pmu_mode_e</a>&#160;</td>
<td class="paramname"><em>mode</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>powered</em>&#160;</td>
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<td></td>
<td>)</td>
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<p>Config SAF/AP domain whether powered under different mode. </p>
<p >This function config SAF/AP domain whether powered in run/sleep/hibernate/rtc mode. For example, if AP domain config powered in run mode and not powered in hibernate mode, after wakeup from hibernate to run, hardware will auto reset ap domain.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">target</td><td>target defined in sdrv_pmu_target_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">mode</td><td>mode defined in sdrv_pmu_mode_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">powered</td><td>true represents powered, false represents not powered. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a26ba034e2854612384ee244f82c7b88d">&#9670;&nbsp;</a></span>sdrv_pmu_vd_ap_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_vd_ap_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
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<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control AP voltage detect analog power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a2fcc669b8808dcf21b51f28f09ddca56">&#9670;&nbsp;</a></span>sdrv_pmu_vd_sf_ana_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_vd_sf_ana_enable </td>
<td>(</td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em></td><td>)</td>
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<p>Enable or disable analog IP power. </p>
<p >This function config PMU to control SF voltage detect analog power. Default is power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents power on, false represents power down. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#add434b42e9af951b076a7227ab9cb3ea">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup0_glitch_disable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup0_glitch_disable </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>mask</em></td><td>)</td>
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<p>Disable glitch circle for wakeup pin 0. </p>
<p >This function disable glitch circle for wakeup pin 0, in this case, it can't glitch &lt; 32khz pulse. When both edge disabled, filter for wakeup 0 will be re-enabled.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">mask</td><td>OR'ed value, bit0: rising edge, bit1: falling edge. for example: (1&lt;&lt;0) | (1&lt;&lt;1) means both edge. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ad46e965fdc7b3b59effd0a2434d92d55">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup0_glitch_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup0_glitch_enable </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>mask</em></td><td>)</td>
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<p>Enable glitch circle for wakeup pin 0. </p>
<p >This function enable glitch circle for wakeup pin 0, in this case, it can glitch &lt; 32khz pulse. When enable this feature, filter for wakeup 0 will be disabled.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">mask</td><td>OR'ed value, bit0: rising edge, bit1: falling edge. for example: (1&lt;&lt;0) | (1&lt;&lt;1) means both edge. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a93921bdbea2cfa3773c3f03b800035dd">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_disable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_disable </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>disable_bitmap</em></td><td>)</td>
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<p>Disable wakeup source when in RTC mode. </p>
<p >This function disable which source can use to wakeup from RTC mode. Source are: SDRV_PMU_WAKEUP_PIN0_MASK, SDRV_PMU_WAKEUP_PIN1_MASK SDRV_PMU_WAKEUP_RTC_MASK, SDRV_PMU_WAKEUP_BC_MASK</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">disable_bitmap</td><td>OR'ed value of the source. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ac8326c42f241d468bb2e693d78779d59">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_enable </td>
<td>(</td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>enable_bitmap</em></td><td>)</td>
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<p>Enable wakeup source when in RTC mode. </p>
<p >This function enable which source can use to wakeup from RTC mode. Source are: SDRV_PMU_WAKEUP_PIN0_MASK, SDRV_PMU_WAKEUP_PIN1_MASK SDRV_PMU_WAKEUP_RTC_MASK, SDRV_PMU_WAKEUP_BC_MASK</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">enable_bitmap</td><td>OR'ed value of the source. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a14ca66843978d7437a1f276cdd0ecd0c">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_latch_set()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_latch_set </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a9028557b852733a0d27558ee9ecac450">sdrv_pmu_wakeup_in_rtc_e</a>&#160;</td>
<td class="paramname"><em>latch</em></td><td>)</td>
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<p>Config pmu action when receive wakeup event during rtc state. </p>
<p >PMU has RTC and OFF state. During RTC state, pmu doesn't respond to wakeup event. It only responds to wakeup event in OFF state. This function config whether pmu ignore rtc state wakeup event or latch wakeup when enter off state.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">latch</td><td>defined in sdrv_pmu_wakeup_in_rtc_e. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a079e3a26415c89f6cfc80e6ea61e275a">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_enable()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_pin_enable </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a750fd6b274bfb2212a679cdb45667114">sdrv_pmu_wakeup_pin_e</a>&#160;</td>
<td class="paramname"><em>wakeup_pin</em>, </td>
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<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em>&#160;</td>
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<td>)</td>
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<p>Enable or Disable specific system wakeup pin. </p>
<p >This function config whether specific wakeup pin use or not.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">wakeup_pin</td><td>wakeup pin defined in sdrv_pmu_wakeup_pin_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>true represents enable, false represents disable. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a96031aa56a2940bd97b6ced7dbfc734e">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_filter_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_pin_filter_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a750fd6b274bfb2212a679cdb45667114">sdrv_pmu_wakeup_pin_e</a>&#160;</td>
<td class="paramname"><em>wakeup_pin</em>, </td>
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<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a6fa4420fec8a72ef0c79143079091e25">sdrv_pmu_edge_filter_t</a> *&#160;</td>
<td class="paramname"><em>filter_config</em>&#160;</td>
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<p>Config edge filter for wakeup pin. </p>
<p >This function config edge filter parameters for specific wakeup pin.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">wakeup_pin</td><td>wakeup pin defined in sdrv_pmu_wakeup_pin_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">filter_config</td><td>wakeup pin filter parameters. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a3b5f50c2bf306de79d2e425cf7ee0522">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_init()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_pin_init </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a750fd6b274bfb2212a679cdb45667114">sdrv_pmu_wakeup_pin_e</a>&#160;</td>
<td class="paramname"><em>wakeup_pin</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#af101f7346600b3022849c38b88af0a06">sdrv_pmu_wakeup_pin_config_t</a> *&#160;</td>
<td class="paramname"><em>pin_config</em>&#160;</td>
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<p>Config specific wakeup pin. </p>
<p >This function config wakeup pin active level or pulse.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">wakeup_pin</td><td>wakeup pin defined in sdrv_pmu_wakeup_pin_e. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">pin_config</td><td>wakeup pin config parameters. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a4ebc69dcc34d60094e1760f0471169e3">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pin_logic_set()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_pin_logic_set </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#a2a9d0619bd3aafdaddebf0936cfbc304">sdrv_pmu_wakeup_pin_logic_e</a>&#160;</td>
<td class="paramname"><em>logic</em></td><td>)</td>
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<p>Config wakeup pin 0/1 generate wakeup event logic. </p>
<p >This function config whether generate wakeup event needs both wakeup pins active or not.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">logic</td><td>defined in sdrv_pmu_wakeup_pin_logic_e. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a2124846408775e6b508a016244240e81">&#9670;&nbsp;</a></span>sdrv_pmu_wakeup_pins_config()</h2>
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<td class="memname"><a class="el" href="sdrv__common_8h.html#aaabdaf7ee58ca7269bd4bf24efcde092">status_t</a> sdrv_pmu_wakeup_pins_config </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__pmu_8h.html#afc6ec4520fd00e5a385c0edd7a273de5">sdrv_pmu_wakeuppins_config_t</a> *&#160;</td>
<td class="paramname"><em>config</em></td><td>)</td>
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<p>Config Wake pin 0 and 1 enable and active level. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">config</td><td>config parameters defined in sdrv_pmu_wakeuppins_config_t. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SDRV_STATUS_OK or error code. </dd></dl>
</div>
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