293 lines
8.1 KiB
C
293 lines
8.1 KiB
C
/**
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* @file hash_basic.h
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* @brief Semidrive CRYPTO hash basic header file.
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*
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* @copyright Copyright (c) 2021 Semidrive Semiconductor.
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* All rights reserved.
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*/
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#ifndef HASH_BASIC_H
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#define HASH_BASIC_H
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#include "register_base_addr.h"
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#include "sdrv_crypto_utility.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SUPPORT_HASH_SM3
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#define SUPPORT_HASH_MD5
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#define SUPPORT_HASH_SHA256
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#define SUPPORT_HASH_SHA384
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#define SUPPORT_HASH_SHA512
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#define SUPPORT_HASH_SHA1
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#define SUPPORT_HASH_SHA224
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#define SUPPORT_HASH_SHA512_224
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#define SUPPORT_HASH_SHA512_256
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#define SUPPORT_HASH_SHA3_224
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#define SUPPORT_HASH_SHA3_256
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#define SUPPORT_HASH_SHA3_384
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#define SUPPORT_HASH_SHA3_512
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#define HASH_DMA_FUNCTION
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#define HMAC_SECURE_PORT_FUNCTION
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#ifdef HMAC_SECURE_PORT_FUNCTION
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#define HMAC_MAX_KEY_IDX \
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(8) /* if key is from secure port, the max key index(or the number of \
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keys) */
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#define HMAC_MAX_SP_KEY_SIZE \
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(64) /* for secure port key, max bytes of one key */
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#endif
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/* some register offset */
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#define HASH_HMAC_OFFSET (4)
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#define HASH_REVERSE_BYTE_ORDER_IN_WORD_OFFSET (8)
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#define HASH_LAST_BLOCK_OFFSET (16)
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#define HASH_DMA_OFFSET (16)
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/* HASH register struct */
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typedef struct hash_reg {
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uint32_t hash_ctrl; /* Offset: 0x000 (R/W) Control register */
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uint32_t hash_cfg; /* Offset: 0x004 (R/W) Config register */
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uint32_t rev_1[2];
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uint32_t hash_risr; /* Offset: 0x010 (W0C) Resource of Interrupt Status
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register */
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uint32_t hash_imcr; /* Offset: 0x014 (R/W) Interrupt Management and Control
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register */
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uint32_t
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hash_misr; /* Offset: 0x018 (R) Multiple Interrupt Status register */
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uint32_t rev_2[5];
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uint32_t hash_msg_len[4]; /* Offset: 0x030 (R/W) message total length
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register */
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uint32_t hash_msg_cnt[4]; /* Offset: 0x040 (R/W) message been handled
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length register */
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uint32_t rev_3[4];
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uint32_t
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hash_key_len; /* Offset: 0x060 (R/W) HMAC KEY total length register */
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uint32_t rev_4[3];
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uint32_t hash_key_cnt; /* Offset: 0x070 (R/W) HMAC KEY been handled length
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register */
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uint32_t rev_5[15];
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uint32_t hash_mdin_cr; /* Offset: 0x0B0 (R/W) Data flag register */
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uint32_t rev_6[3];
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uint32_t hash_m_din; /* Offset: 0x0C0 (W) Hash message Input register */
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uint32_t rev_7[14];
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uint32_t hash_version; /* Offset: 0x0FC (R) Version register */
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uint32_t
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hash_in[50]; /* Offset: 0x100 (W) Hash iterator Input register */
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uint32_t rev_8[14];
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uint32_t hash_out[50]; /* Offset: 0x200 (R) Output register */
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uint32_t rev_9[14];
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uint32_t dma_cr; /* Offset: 0x300 (R) DMA config register */
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uint32_t dma_sr; /* Offset: 0x304 (R/W) DMA Status register */
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uint32_t dma_to; /* Offset: 0x308 (R/W) DMA Status register */
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uint32_t rev_10[1];
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uint32_t dma_sa_l; /* Offset: 0x310 (R/W) DMA Source Address Low part
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register */
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uint32_t dma_sa_h; /* Offset: 0x314 (R/W) DMA Source Address High part
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register */
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uint32_t rev_11[2];
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uint32_t dma_da_l; /* Offset: 0x320 (R/W) DMA Destination Address Low part
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register */
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uint32_t dma_da_h; /* Offset: 0x324 (R/W) DMA Destination Address High part
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register */
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uint32_t rev_12[2];
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uint32_t dma_rlen; /* Offset: 0x330 (R/W) DMA read data length register */
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uint32_t dma_wlen; /* Offset: 0x334 (R/W) DMA write data length register */
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} hash_reg_t;
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/* HASH max length */
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#if (defined(SUPPORT_HASH_SHA3_224) || defined(SUPPORT_HASH_SHA3_256) || \
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defined(SUPPORT_HASH_SHA3_384) || defined(SUPPORT_HASH_SHA3_512))
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#define HASH_DIGEST_MAX_WORD_LEN (16)
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#define HASH_BLOCK_MAX_WORD_LEN (36)
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#elif (defined(SUPPORT_HASH_SHA384) || defined(SUPPORT_HASH_SHA512) || \
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defined(SUPPORT_HASH_SHA512_224) || defined(SUPPORT_HASH_SHA512_256))
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#define HASH_DIGEST_MAX_WORD_LEN (16)
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#define HASH_BLOCK_MAX_WORD_LEN (32)
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#else
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#define HASH_DIGEST_MAX_WORD_LEN (8)
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#define HASH_BLOCK_MAX_WORD_LEN (16)
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#endif
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#define HASH_BLOCK_MAX_BYTE_LEN (HASH_BLOCK_MAX_WORD_LEN << 2)
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#if (defined(SUPPORT_HASH_SHA3_224) || defined(SUPPORT_HASH_SHA3_256) || \
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defined(SUPPORT_HASH_SHA3_384) || defined(SUPPORT_HASH_SHA3_512))
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#define HASH_ITERATOR_MAX_WORD_LEN (50)
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#else
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#define HASH_ITERATOR_MAX_WORD_LEN HASH_DIGEST_MAX_WORD_LEN
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#endif
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#if (defined(SUPPORT_HASH_SHA384) || defined(SUPPORT_HASH_SHA512) || \
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defined(SUPPORT_HASH_SHA512_224) || defined(SUPPORT_HASH_SHA512_256))
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#define HASH_TOTAL_LEN_MAX_WORD_LEN (4)
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#else
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#define HASH_TOTAL_LEN_MAX_WORD_LEN (2)
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#endif
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/* HASH algorithm definition */
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typedef enum {
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#ifdef SUPPORT_HASH_SM3
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HASH_SM3 = 0,
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#endif
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#ifdef SUPPORT_HASH_MD5
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HASH_MD5 = 1,
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#endif
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#ifdef SUPPORT_HASH_SHA256
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HASH_SHA256 = 2,
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#endif
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#ifdef SUPPORT_HASH_SHA384
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HASH_SHA384 = 3,
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#endif
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#ifdef SUPPORT_HASH_SHA512
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HASH_SHA512 = 4,
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#endif
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#ifdef SUPPORT_HASH_SHA1
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HASH_SHA1 = 5,
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#endif
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#ifdef SUPPORT_HASH_SHA224
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HASH_SHA224 = 6,
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#endif
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#ifdef SUPPORT_HASH_SHA512_224
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HASH_SHA512_224 = 7,
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#endif
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#ifdef SUPPORT_HASH_SHA512_256
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HASH_SHA512_256 = 8,
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#endif
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#ifdef SUPPORT_HASH_SHA3_224
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HASH_SHA3_224 = 9,
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#endif
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#ifdef SUPPORT_HASH_SHA3_256
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HASH_SHA3_256 = 10,
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#endif
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#ifdef SUPPORT_HASH_SHA3_384
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HASH_SHA3_384 = 11,
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#endif
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#ifdef SUPPORT_HASH_SHA3_512
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HASH_SHA3_512 = 12,
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#endif
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} HASH_ALG;
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/* HASH return code */
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enum HASH_RET_CODE {
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HASH_SUCCESS = 0,
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HASH_BUFFER_NULL,
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HASH_CONFIG_INVALID,
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HASH_INPUT_INVALID,
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HASH_LEN_OVERFLOW,
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HASH_ERROR,
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};
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typedef void (*HASH_CALLBACK)(void);
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uint32_t hash_get_version(void);
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void hash_set_cpu_mode(void);
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void hash_set_dma_mode(void);
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void hash_set_hash_mode(void);
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void hash_set_hmac_mode(void);
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void hash_set_hmac_key_mode(void);
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void hash_clear_hmac_key_mode(void);
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void hash_clear_risp(void);
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void hash_set_hmac_key_cnt(uint32_t bitlen);
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void hash_set_hmac_key_len(uint32_t bitlen);
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void hash_hmac_key_opr_one_block(uint32_t *key, uint32_t block_byte_len);
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void hash_hmac_key_opr(uint8_t *key, uint32_t key_bytes);
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void hash_hmac_disable_secure_port(void);
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void hash_hmac_enable_secure_port(uint16_t sp_key_idx);
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void hash_hmac_sp_key_opr(uint32_t key_bits);
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void hash_set_alg(HASH_ALG hash_alg);
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uint32_t hash_check_whether_sha3_alg(HASH_ALG hash_alg);
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void hash_update_config(void);
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void hash_enable_cpu_interruption(void);
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void hash_disable_cpu_interruption(void);
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void hash_enable_dma_interruption(void);
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void hash_disable_dma_interruption(void);
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void hash_clear_dma_ch_en(void);
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void hash_set_last_block(uint8_t tag);
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void hash_set_endian_uint32(void);
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void hash_get_iterator(uint8_t *iterator, uint8_t hash_iterator_words);
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void hash_set_iterator(uint32_t *iterator, uint8_t hash_iterator_words);
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void hash_clear_msg_len(void);
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void hash_set_msg_len(uint32_t bytelen);
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void hash_set_msg_total_bit_len(uint32_t *msg_total_bits,
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uint32_t block_byte_len);
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void hash_start(void);
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void hash_wait_till_done(void);
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void hash_input_msg(uint8_t *msg, uint32_t msg_words);
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void hash_input_msg_u8(uint8_t *msg, uint32_t msg_bytes);
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void hash_set_dma_ctl0(uint32_t ctl0);
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void hash_set_dma_ctl1(uint32_t ctl1);
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void hash_set_dma_ch_ctl(uint32_t ch_ctl);
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void hash_set_dma_sublen(uint32_t sublen);
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void hash_set_dma_ch_rctl(uint32_t ch_rctl);
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void hash_set_dma_ch_wctl(uint32_t ch_wctl);
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void hash_set_dma_wlen(uint32_t wlen);
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void hash_clear_dma_sa_da(void);
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#ifdef HASH_DMA_FUNCTION
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void hash_dma_operate(uint32_t *msg, uint32_t *iterator, uint32_t msgBitLen,
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HASH_CALLBACK callback);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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