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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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</head>
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<tbody>
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</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.9.4 -->
<script type="text/javascript">
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
var searchBox = new SearchBox("searchBox", "search",'Search','.html');
/* @license-end */
</script>
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
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/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
$(function() {
initMenu('',true,false,'search.php','Search');
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});
/* @license-end */
</script>
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onmouseover="return searchBox.OnSearchSelectShow()"
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</div>
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<div class="contents">
<p><code>#include &lt;<a class="el" href="sdrv__dma_8h_source.html">sdrv_dma.h</a>&gt;</code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a9f7d0e3914a9155461f0247699193731"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a8398793befd907d68bc1b103b1ea1080">sdrv_dma_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a9f7d0e3914a9155461f0247699193731">instance</a></td></tr>
<tr class="separator:a9f7d0e3914a9155461f0247699193731"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a403ab1f93ff4d46e3dabe3ef49436c23"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a2fce8b449dfda53bb26afae8dea00c9f">sdrv_dma_channel_id_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a403ab1f93ff4d46e3dabe3ef49436c23">channel_id</a></td></tr>
<tr class="separator:a403ab1f93ff4d46e3dabe3ef49436c23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad1dc3fb85c1450ab157ea27623c0bebe"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a7516e48738a553c409c0d7f7f3b302bb">sdrv_dma_xfer_mode_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#ad1dc3fb85c1450ab157ea27623c0bebe">xfer_mode</a></td></tr>
<tr class="separator:ad1dc3fb85c1450ab157ea27623c0bebe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a41b5fa1b142f17feebf7e22efff16a54"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a4b2f1e33ab3153f5b47ff3d1d305a53e">sdrv_dma_xfer_type_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a41b5fa1b142f17feebf7e22efff16a54">xfer_type</a></td></tr>
<tr class="separator:a41b5fa1b142f17feebf7e22efff16a54"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abe5ba28875288835c46ed695634cc139"><td class="memItemLeft" align="right" valign="top">paddr_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#abe5ba28875288835c46ed695634cc139">src_addr</a></td></tr>
<tr class="separator:abe5ba28875288835c46ed695634cc139"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a54ba6d4e3d0c30a78039522415200df7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a274159adbb399be5ca569555c1b39aab">sdrv_dma_bus_width_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a54ba6d4e3d0c30a78039522415200df7">src_width</a></td></tr>
<tr class="separator:a54ba6d4e3d0c30a78039522415200df7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a08a70323f7167f70424ccada2cfde440"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a6389d60619bc0fbbb010f89c29036927">sdrv_dma_addr_inc_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a08a70323f7167f70424ccada2cfde440">src_inc</a></td></tr>
<tr class="separator:a08a70323f7167f70424ccada2cfde440"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4bf550e9f7c20ae15c1775d13b3f51a7"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a4bf550e9f7c20ae15c1775d13b3f51a7">src_burst_len</a></td></tr>
<tr class="separator:a4bf550e9f7c20ae15c1775d13b3f51a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9d953d48b17f1f2a1cfe6ac6b11a80ea"><td class="memItemLeft" align="right" valign="top">paddr_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a9d953d48b17f1f2a1cfe6ac6b11a80ea">dst_addr</a></td></tr>
<tr class="separator:a9d953d48b17f1f2a1cfe6ac6b11a80ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a176aee82a1d2af99758549a8b438eec8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a274159adbb399be5ca569555c1b39aab">sdrv_dma_bus_width_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a176aee82a1d2af99758549a8b438eec8">dst_width</a></td></tr>
<tr class="separator:a176aee82a1d2af99758549a8b438eec8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a033e4652dfa9a873e331f43f93aa50c8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a6389d60619bc0fbbb010f89c29036927">sdrv_dma_addr_inc_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a033e4652dfa9a873e331f43f93aa50c8">dst_inc</a></td></tr>
<tr class="separator:a033e4652dfa9a873e331f43f93aa50c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8698408f19d1051c60e35503ede28188"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a8698408f19d1051c60e35503ede28188">dst_burst_len</a></td></tr>
<tr class="separator:a8698408f19d1051c60e35503ede28188"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a49ead040118be61a7b9b7649b57cb33e"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a49ead040118be61a7b9b7649b57cb33e">xfer_bytes</a></td></tr>
<tr class="separator:a49ead040118be61a7b9b7649b57cb33e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9e332f53012e98034f6704cfb06a8c25"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a9e332f53012e98034f6704cfb06a8c25">mux_id</a></td></tr>
<tr class="separator:a9e332f53012e98034f6704cfb06a8c25"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a86c1d095014570ad87e9c9d8d5148675"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a9d0cf1f599920228c33c952a30d92c01">sdrv_dma_port_sel_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a86c1d095014570ad87e9c9d8d5148675">src_port_sel</a></td></tr>
<tr class="separator:a86c1d095014570ad87e9c9d8d5148675"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4775ea6b36a198735b8484dc257f57c9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a9d0cf1f599920228c33c952a30d92c01">sdrv_dma_port_sel_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a4775ea6b36a198735b8484dc257f57c9">dst_port_sel</a></td></tr>
<tr class="separator:a4775ea6b36a198735b8484dc257f57c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1334e71299b933061215aa1cdaa9f1af"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a1334e71299b933061215aa1cdaa9f1af">src_cache</a></td></tr>
<tr class="separator:a1334e71299b933061215aa1cdaa9f1af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3687a562ed0b02c896f6a703273952c7"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a3687a562ed0b02c896f6a703273952c7">dst_cache</a></td></tr>
<tr class="separator:a3687a562ed0b02c896f6a703273952c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a66d883a54efa08bddb56175e3500e32b"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a66d883a54efa08bddb56175e3500e32b">interrupt_type</a></td></tr>
<tr class="separator:a66d883a54efa08bddb56175e3500e32b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a225128fc8564132a96bd19502eb0428c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#af223f52b0b99738e3384a3c1f7a3d526">sdrv_dma_buffer_mode_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a225128fc8564132a96bd19502eb0428c">buffer_mode</a></td></tr>
<tr class="separator:a225128fc8564132a96bd19502eb0428c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad37fc9d39f17f4b6eed5feddb46e901f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a3cf1f3daf3f457f629ecdfc46e090308">sdrv_dma_loop_mode_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#ad37fc9d39f17f4b6eed5feddb46e901f">loop_mode</a></td></tr>
<tr class="separator:ad37fc9d39f17f4b6eed5feddb46e901f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a354821661b15f1e78ea2915ca044afe8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a3a1413e4588936959d4c1b1efcd4a03c">sdrv_dma_switch_event_ctrl_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a354821661b15f1e78ea2915ca044afe8">switch_event_ctrl</a></td></tr>
<tr class="separator:a354821661b15f1e78ea2915ca044afe8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad5d81adac00cd3652635b08a874b37b3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a95f065bec1af860620ef897fec9f868d">sdrv_dma_trigger_mode_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#ad5d81adac00cd3652635b08a874b37b3">trig_mode</a></td></tr>
<tr class="separator:ad5d81adac00cd3652635b08a874b37b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7c5423e094d23a28337b230af1570a57"><td class="memItemLeft" align="right" valign="top">paddr_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a7c5423e094d23a28337b230af1570a57">linklist_addr</a></td></tr>
<tr class="separator:a7c5423e094d23a28337b230af1570a57"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aab651d71ffb0072ade54242277034753"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#ad007163ad39d5ef99e8dd4f85f390a07">sdrv_dma_linklist_type_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#aab651d71ffb0072ade54242277034753">linklist_mad_type</a></td></tr>
<tr class="separator:aab651d71ffb0072ade54242277034753"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a80b5b84d741bf4afaaf514eef28d25ad"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a7e5e385f109e1f40f780b40245d5df29">sdrv_dma_mad_crc_mode_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a80b5b84d741bf4afaaf514eef28d25ad">mad_crc_mode</a></td></tr>
<tr class="separator:a80b5b84d741bf4afaaf514eef28d25ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1d7d34ae0ef1ecb3203c2188fc6a5b39"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__dma_8h.html#a5d5575a82a6c15f0fbe010542041ff93">sdrv_dma_data_crc_mode_e</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__dma__channel__config__t.html#a1d7d34ae0ef1ecb3203c2188fc6a5b39">data_crc_mode</a></td></tr>
<tr class="separator:a1d7d34ae0ef1ecb3203c2188fc6a5b39"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Field Documentation</h2>
<a id="a225128fc8564132a96bd19502eb0428c" name="a225128fc8564132a96bd19502eb0428c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a225128fc8564132a96bd19502eb0428c">&#9670;&nbsp;</a></span>buffer_mode</h2>
<div class="memitem">
<div class="memproto">
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#af223f52b0b99738e3384a3c1f7a3d526">sdrv_dma_buffer_mode_e</a> buffer_mode</td>
</tr>
</table>
</div><div class="memdoc">
<p >Handshake request mode </p>
</div>
</div>
<a id="a403ab1f93ff4d46e3dabe3ef49436c23" name="a403ab1f93ff4d46e3dabe3ef49436c23"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a403ab1f93ff4d46e3dabe3ef49436c23">&#9670;&nbsp;</a></span>channel_id</h2>
<div class="memitem">
<div class="memproto">
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<tr>
<td class="memname"><a class="el" href="sdrv__dma_8h.html#a2fce8b449dfda53bb26afae8dea00c9f">sdrv_dma_channel_id_e</a> channel_id</td>
</tr>
</table>
</div><div class="memdoc">
<p >Transfer mode </p>
</div>
</div>
<a id="a1d7d34ae0ef1ecb3203c2188fc6a5b39" name="a1d7d34ae0ef1ecb3203c2188fc6a5b39"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1d7d34ae0ef1ecb3203c2188fc6a5b39">&#9670;&nbsp;</a></span>data_crc_mode</h2>
<div class="memitem">
<div class="memproto">
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a5d5575a82a6c15f0fbe010542041ff93">sdrv_dma_data_crc_mode_e</a> data_crc_mode</td>
</tr>
</table>
</div><div class="memdoc">
<p >Data CRC sel </p>
</div>
</div>
<a id="ada207a49c978e9ac6e1a67eb101870bf" name="ada207a49c978e9ac6e1a67eb101870bf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ada207a49c978e9ac6e1a67eb101870bf">&#9670;&nbsp;</a></span>data_crc_sel</h2>
<div class="memitem">
<div class="memproto">
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<tr>
<td class="memname"><a class="el" href="sdrv__dma_8h.html#a0a2c840114bacc40ca37a5c47ae70e32">sdrv_dma_data_crc_sel_e</a> data_crc_sel</td>
</tr>
</table>
</div><div class="memdoc">
</div>
</div>
<a id="a9d953d48b17f1f2a1cfe6ac6b11a80ea" name="a9d953d48b17f1f2a1cfe6ac6b11a80ea"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9d953d48b17f1f2a1cfe6ac6b11a80ea">&#9670;&nbsp;</a></span>dst_addr</h2>
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">paddr_t dst_addr</td>
</tr>
</table>
</div><div class="memdoc">
<p >Target port bus width </p>
</div>
</div>
<a id="a8698408f19d1051c60e35503ede28188" name="a8698408f19d1051c60e35503ede28188"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8698408f19d1051c60e35503ede28188">&#9670;&nbsp;</a></span>dst_burst_len</h2>
<div class="memitem">
<div class="memproto">
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<td class="memname">uint32_t dst_burst_len</td>
</tr>
</table>
</div><div class="memdoc">
<p >Number of bytes to transfer. </p>
</div>
</div>
<a id="a3687a562ed0b02c896f6a703273952c7" name="a3687a562ed0b02c896f6a703273952c7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3687a562ed0b02c896f6a703273952c7">&#9670;&nbsp;</a></span>dst_cache</h2>
<div class="memitem">
<div class="memproto">
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<td class="memname">uint32_t dst_cache</td>
</tr>
</table>
</div><div class="memdoc">
<p >DMA interrupt type </p>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a033e4652dfa9a873e331f43f93aa50c8">&#9670;&nbsp;</a></span>dst_inc</h2>
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<p >Target port burst length </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a4775ea6b36a198735b8484dc257f57c9">&#9670;&nbsp;</a></span>dst_port_sel</h2>
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<p >DMA source cache enable </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a176aee82a1d2af99758549a8b438eec8">&#9670;&nbsp;</a></span>dst_width</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a274159adbb399be5ca569555c1b39aab">sdrv_dma_bus_width_e</a> dst_width</td>
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<p >Increase target address after each transaction? </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a9f7d0e3914a9155461f0247699193731">&#9670;&nbsp;</a></span>instance</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a8398793befd907d68bc1b103b1ea1080">sdrv_dma_t</a>* instance</td>
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<p >&lt; DMA controller ID of this channel </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a66d883a54efa08bddb56175e3500e32b">&#9670;&nbsp;</a></span>interrupt_type</h2>
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<td class="memname">uint32_t interrupt_type</td>
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<p >Buffer mode </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a7c5423e094d23a28337b230af1570a57">&#9670;&nbsp;</a></span>linklist_addr</h2>
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<td class="memname">paddr_t linklist_addr</td>
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<p >Linklist MAD type </p>
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<h2 class="memtitle"><span class="permalink"><a href="#aab651d71ffb0072ade54242277034753">&#9670;&nbsp;</a></span>linklist_mad_type</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#ad007163ad39d5ef99e8dd4f85f390a07">sdrv_dma_linklist_type_e</a> linklist_mad_type</td>
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<p >MAD CRC type </p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad37fc9d39f17f4b6eed5feddb46e901f">&#9670;&nbsp;</a></span>loop_mode</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a3cf1f3daf3f457f629ecdfc46e090308">sdrv_dma_loop_mode_e</a> loop_mode</td>
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<p >Switch event control </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a80b5b84d741bf4afaaf514eef28d25ad">&#9670;&nbsp;</a></span>mad_crc_mode</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a7e5e385f109e1f40f780b40245d5df29">sdrv_dma_mad_crc_mode_e</a> mad_crc_mode</td>
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<p >Data CRC mode </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a9e332f53012e98034f6704cfb06a8c25">&#9670;&nbsp;</a></span>mux_id</h2>
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<td class="memname">int mux_id</td>
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<p >DMA source port select </p>
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<a id="abe5ba28875288835c46ed695634cc139" name="abe5ba28875288835c46ed695634cc139"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abe5ba28875288835c46ed695634cc139">&#9670;&nbsp;</a></span>src_addr</h2>
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<td class="memname">paddr_t src_addr</td>
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<p >Source port bus width </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a4bf550e9f7c20ae15c1775d13b3f51a7">&#9670;&nbsp;</a></span>src_burst_len</h2>
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<td class="memname">uint32_t src_burst_len</td>
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<p >Target buffer address </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a1334e71299b933061215aa1cdaa9f1af">&#9670;&nbsp;</a></span>src_cache</h2>
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<td class="memname">uint32_t src_cache</td>
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<p >DMA target cache enable </p>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a6389d60619bc0fbbb010f89c29036927">sdrv_dma_addr_inc_e</a> src_inc</td>
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<p >Source port burst length </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a86c1d095014570ad87e9c9d8d5148675">&#9670;&nbsp;</a></span>src_port_sel</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a9d0cf1f599920228c33c952a30d92c01">sdrv_dma_port_sel_e</a> src_port_sel</td>
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<p >DMA target port select </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a54ba6d4e3d0c30a78039522415200df7">&#9670;&nbsp;</a></span>src_width</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a274159adbb399be5ca569555c1b39aab">sdrv_dma_bus_width_e</a> src_width</td>
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<p >Increase source address after each transaction? </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a354821661b15f1e78ea2915ca044afe8">&#9670;&nbsp;</a></span>switch_event_ctrl</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a3a1413e4588936959d4c1b1efcd4a03c">sdrv_dma_switch_event_ctrl_e</a> switch_event_ctrl</td>
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<p >Transfer trigger mode </p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad5d81adac00cd3652635b08a874b37b3">&#9670;&nbsp;</a></span>trig_mode</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a95f065bec1af860620ef897fec9f868d">sdrv_dma_trigger_mode_e</a> trig_mode</td>
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<p >Link address - next MAD address </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a49ead040118be61a7b9b7649b57cb33e">&#9670;&nbsp;</a></span>xfer_bytes</h2>
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<td class="memname">uint32_t xfer_bytes</td>
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<p >DMA Mux ID </p>
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<h2 class="memtitle"><span class="permalink"><a href="#ad1dc3fb85c1450ab157ea27623c0bebe">&#9670;&nbsp;</a></span>xfer_mode</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a7516e48738a553c409c0d7f7f3b302bb">sdrv_dma_xfer_mode_e</a> xfer_mode</td>
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<p >Transfer type - source and target buffer types </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a41b5fa1b142f17feebf7e22efff16a54">&#9670;&nbsp;</a></span>xfer_type</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a4b2f1e33ab3153f5b47ff3d1d305a53e">sdrv_dma_xfer_type_e</a> xfer_type</td>
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<p >Source buffer address </p>
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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/<a class="el" href="sdrv__dma_8h_source.html">sdrv_dma.h</a></li>
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