sdrv_rstgen.h

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#ifndef SDRV_RSTGEN_H_
#define SDRV_RSTGEN_H_
 
#include <types.h>
#include <sdrv_common.h>
 
/* Define the type of rstgen */
#define SDRV_RSTGEN_CORE     1
#define SDRV_RSTGEN_LATENT   2
#define SDRV_RSTGEN_MISSION  3
#define SDRV_RSTGEN_MODULE   4
#define SDRV_RSTGEN_IST      5
#define SDRV_RSTGEN_DEBUG    6
 
#define SDRV_RSTGEN_TYPE_SHIFT  24
 
#define SDRV_RSTGEN_SIG_ID(type, idx) \
    ((uint32_t)((((uint32_t)(type)) << ((uint32_t)SDRV_RSTGEN_TYPE_SHIFT)) | ((uint32_t)(idx))))
 
#define SDRV_RSTGEN_TYPE(id)   ((uint32_t)(((uint32_t)(id)) >> ((uint32_t)SDRV_RSTGEN_TYPE_SHIFT)))
#define SDRV_RSTGEN_INDEX(id)  ((uint32_t)(((uint32_t)(id)) & BIT_MASK(SDRV_RSTGEN_TYPE_SHIFT)))
 
#define SDRV_RSTGEN_GENERAL_REG_NUM  8
 
enum sdrv_reset_error
{
    SDRV_RESET_STATUS_SIGNAL_ASSERT = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_RESET, 1),          /* RESET singal assert. */
    SDRV_RESET_STATUS_LOCK = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_RESET, 2),            /* RESET lock error. */
    SDRV_RESET_STATUS_TIMEOUT = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_RESET, 3),         /* RESET timeout error. */
    SDRV_RESET_STATUS_WRONG_SIGNAL = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_RESET, 4),       /* RESET wrong signal. */
};
 
/* Define lowpower mode */
enum reset_lowpower_mode {
    RESET_LP_HIB   = 0,
    RESET_LP_SLEEP = 1,
};
 
typedef enum reset_wdt_id {
    RESET_WDT1,  /* Trigger global reset or SF core reset */
    RESET_WDT2,  /* Trigger global reset or SF core reset */
    RESET_WDT3,  /* Trigger global reset or SP0/SP1 core reset */
    RESET_WDT4,  /* Trigger global reset or SP0/SP1 core reset */
    RESET_WDT5,  /* Trigger global reset or SX0/SX1 core reset */
    RESET_WDT6,  /* Trigger global reset or SX0/SX1 core reset */
} reset_wdt_id_e;
 
typedef enum reset_core_id {
    RESET_CORE_SF = 1,
    RESET_CORE_SP0,
    RESET_CORE_SP1,
    RESET_CORE_SX0,
    RESET_CORE_SX1,
} reset_core_id_e;
 
typedef void (*sdrv_rstgen_sig_handler)(uint32_t rstgen_sig_id);
 
typedef struct sdrv_rstgen {
    paddr_t        base;
} sdrv_rstgen_t;
 
typedef struct sdrv_rstgen_sig {
    sdrv_rstgen_t    *rst_ctl;
    uint32_t          id;
    bool              need_clr_rst;
    sdrv_rstgen_sig_handler pre_handler;
    sdrv_rstgen_sig_handler post_handler;
} sdrv_rstgen_sig_t;
 
typedef struct sdrv_rstgen_general_reg {
    sdrv_rstgen_t    *rst_ctl;
    uint32_t          id;  /* id 1 ~ 7 */
} sdrv_rstgen_general_reg_t;
 
typedef struct sdrv_rstgen_glb_ctl {
    sdrv_rstgen_t    *rst_sf_ctl;
    sdrv_rstgen_t    *rst_ap_ctl;
} sdrv_rstgen_glb_t;
 
typedef struct sdrv_recovery_btm {
    uint32_t btm_num;  /* btm numbers */
    uint32_t btm_base[];  /* btm base list */
} sdrv_recovery_btm_t;
 
typedef struct sdrv_recovery_etimer {
    uint32_t etimer_num;  /* etimer numbers */
    uint32_t etimer_base[];  /* etimer base list */
} sdrv_recovery_etimer_t;
 
typedef struct sdrv_recovery_epwm {
    uint32_t epwm_num;  /* epwm numbers */
    uint32_t epwm_base[];  /* epwm base list */
} sdrv_recovery_epwm_t;
 
/* semidrive recovery latent module */
typedef struct sdrv_recovery_module {
    sdrv_recovery_btm_t const *btm_list;
    sdrv_recovery_etimer_t const *etimer_list;
    sdrv_recovery_epwm_t const *epwm_list;
} sdrv_recovery_module_t;
 
status_t sdrv_rstgen_assert(sdrv_rstgen_sig_t *rst_sig);
 
status_t sdrv_rstgen_deassert(sdrv_rstgen_sig_t *rst_sig);
 
status_t sdrv_rstgen_reset(sdrv_rstgen_sig_t *rst_sig);
 
status_t sdrv_rstgen_global_reset(sdrv_rstgen_glb_t *rst_glb_ctl);
 
status_t sdrv_rstgen_status(sdrv_rstgen_sig_t *rst_sig);
 
uint32_t sdrv_rstgen_global_status(sdrv_rstgen_glb_t *rst_glb_ctl);
 
status_t sdrv_rstgen_global_status_clear(sdrv_rstgen_glb_t *rst_glb_ctl);
 
uint32_t sdrv_rstgen_current_global_status(sdrv_rstgen_glb_t *rst_glb_ctl);
 
uint32_t sdrv_rstgen_read_general(sdrv_rstgen_general_reg_t *rst_gen_reg);
 
status_t sdrv_rstgen_write_general(sdrv_rstgen_general_reg_t *rst_gen_reg,
                                  uint32_t val);
 
status_t sdrv_rstgen_write_general_bit(sdrv_rstgen_general_reg_t *rst_gen_reg,
                                      uint8_t start, uint8_t width, uint32_t val);
 
status_t sdrv_rstgen_lowpower_set(sdrv_rstgen_sig_t *rst_sig,
                                 enum reset_lowpower_mode mode, uint32_t val);
 
status_t sdrv_rstgen_wdt_reset_enable(reset_wdt_id_e wdt, bool enable);
 
status_t sdrv_rstgen_wdt_core_reset_enable(reset_wdt_id_e wdt, reset_core_id_e core, bool enable);
 
status_t sdrv_recovery_module(sdrv_recovery_module_t* recovery_module);
 
#endif /* SDRV_RSTGEN_RSTGEN_H_ */