sdrv_acmp.h

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#ifndef SDRV_ACMP_H_
#define SDRV_ACMP_H_
 
#include <types.h>
#include <compiler.h>
#include "sdrv_acmp.h"
#include "sdrv_common.h"
 
/* ACMP Chanel Polar */
#define ACMP_CH_POLAR_POS        1U
#define ACMP_CH_POLAR_NEG        0U
 
/* Single-End Mode Channel Select */
#define ACMP_SINGLE_CH_SEL(ch, polar, mux)                            \
            (((mux & 0x7u) << 6) | ((polar & 0x1u) << 3) | (ch & 0x7u))
/* Differential Mode Channel Select */
#define ACMP_DIFF_CH_SEL(ch_p, ch_n, mux)                             \
            (((mux & 0x7u) << 6) | ((ch_p & 0x7u) << 3) | (ch_n & 0x7u))
 
enum sdrv_acmp_error
{
    SDRV_ACMP_STATUS_INVALID_PARAM = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_ACMP, 1),    /* Acmp invalid param. */
    SDRV_ACMP_STATUS_WRONG_MODE = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_ACMP, 2),       /* Acmp wrong mode. */
};
 
/* sdrv acmp dev */
struct sdrv_acmp_dev;
 
/* sdrv acmp mode */
typedef enum {
    ACMP_HT_MODE            = 0x0U,  
    ACMP_IT_MODE,                    
} sdrv_acmp_mode_t;
 
/* sdrv acmp csel num */
typedef enum {
    ACMP_CSEL_0             = 0x0U,   
    ACMP_CSEL_1,                      
    ACMP_CSEL_2,                      
    ACMP_CSEL_3,                      
} sdrv_acmp_csel_t;
 
/* sdrv acmp index num */
typedef enum {
    ACMP_INDEX_0            = 0x0U,    
    ACMP_INDEX_1,
    ACMP_INDEX_2,
    ACMP_INDEX_3,
    ACMP_INDEX_4,
    ACMP_INDEX_5,
    ACMP_INDEX_6,
    ACMP_INDEX_7,
    ACMP_INDEX_8,
    ACMP_INDEX_9,
    ACMP_INDEX_10,
    ACMP_INDEX_11,
    ACMP_INDEX_12,
    ACMP_INDEX_13,
    ACMP_INDEX_14,
    ACMP_INDEX_15,
    ACMP_INDEX_16,
    ACMP_INDEX_17,
    ACMP_INDEX_18,
    ACMP_INDEX_19,
    ACMP_INDEX_20,
    ACMP_INDEX_21,
    ACMP_INDEX_22,
    ACMP_INDEX_23,
    ACMP_INDEX_24,
    ACMP_INDEX_25,
    ACMP_INDEX_26,
    ACMP_INDEX_27,
    ACMP_INDEX_28,
    ACMP_INDEX_29,
    ACMP_INDEX_30,
    ACMP_INDEX_31,
} sdrv_acmp_index_t;
 
/* sdrv acmp pol adjust */
typedef enum {
    ACMP_POL_ADJ_DIRECTLY   = 0x0U,       
    ACMP_POL_ADJ_INVERT,                  
} sdrv_acmp_pol_adj_t;
 
/* sdrv acmp select reference voltage source */
typedef enum {
    ACMP_SEL_REFP1          = 0x0U,       
    ACMP_SEL_REFP2,                       
} sdrv_acmp_reg_sel_t;
 
/* sdrv acmp sd sel */
typedef enum {
    ACMP_SEL_SINGLE         = 0x0U,       
    ACMP_SEL_DIFF,                        
} sdrv_acmp_sd_sel_t;
 
/* sdrv acmp hysteresis window configure */
typedef enum {
    ACMP_HCFG_NO            = 0x0U,       
    ACMP_HCFG_50_mV,                      
    ACMP_HCFG_100_mV        = 0x3U,       
} sdrv_acmp_hcfg_t;
 
/* sdrv acmp csel configurations */
typedef struct sdrv_acmp_csel_cfg {
    sdrv_acmp_csel_t      csel_idx;           
    /* acmp ctrl cfg */
    uint8_t               amux_setup;         
    uint8_t               prop_delay : 5;     
    uint8_t               rbw        : 4;     
    uint8_t               fbw        : 4;     
    bool                  sample_en;          
    bool                  mask_en;            
    bool                  pol_adj;            
    bool                  sync_en;            
    /* acmp analog cfg */
    sdrv_acmp_reg_sel_t   refsel;             
    sdrv_acmp_sd_sel_t    sdsel;              
    sdrv_acmp_hcfg_t      hcfg;               
    uint8_t               dain;               
} sdrv_acmp_csel_cfg_t;
 
/* sdrv acmp index configurations */
typedef struct sdrv_acmp_index_cfg {
    sdrv_acmp_index_t  idx;                   
    uint16_t           amsel : 9;             
    uint8_t            csel  : 2;             
    bool               ie;                    
    bool               uie;                   
} sdrv_acmp_index_cfg_t;
 
/* sdrv acmp callback */
typedef int (*sdrv_acmp_callback)(struct sdrv_acmp_dev *dev, uint32_t state);
 
/* sdrv acmp configurations */
typedef struct sdrv_acmp_config {
    paddr_t                base;              
    int                    irq;               
    sdrv_acmp_mode_t       mode;              
    sdrv_acmp_csel_cfg_t   *csel_cfg;         
    uint8_t                csel_num;          
    sdrv_acmp_index_cfg_t  *index_cfg;        
    uint8_t                index_num;         
    uint8_t                req_n_dly;         
    bool                   qch_dac_en;        
    bool                   qch_cmp_en;        
    /* IT MODE */
    uint8_t                qstart        : 5;      
    uint8_t                qend          : 5;      
    uint8_t                cur_entry_pt  : 5;      
    uint16_t               timer_compare_val;      
    uint16_t               timer_terminal_val;     
} sdrv_acmp_config_t;
 
/* define the type of acmp device */
typedef struct sdrv_acmp_dev {
    paddr_t             base;                 
    int                 irq;                  
    sdrv_acmp_callback  callback;             
    void                *priv;                
} sdrv_acmp_t;
 
status_t sdrv_acmp_init(sdrv_acmp_t *dev, sdrv_acmp_config_t *acmp_cfg, sdrv_acmp_callback callback);
 
status_t sdrv_acmp_start(sdrv_acmp_t *dev, bool start);
 
status_t sdrv_acmp_it_trigger_start(sdrv_acmp_t *dev, uint8_t qstart, uint8_t qend, uint8_t cur_entry_pt,
                           bool trigger_start);
 
status_t sdrv_acmp_it_update_valid_irq(sdrv_acmp_t *dev, uint32_t *state, uint32_t wait_time);
 
status_t sdrv_acmp_power_ctrl(sdrv_acmp_t *dev, bool down);
 
status_t sdrv_acmp_enable_low_power(sdrv_acmp_t *dev, bool cmp_en, bool dac_en, uint8_t req_n_dly);
 
status_t sdrv_acmp_set_callback(sdrv_acmp_t *dev, sdrv_acmp_callback callback);
 
status_t sdrv_acmp_deinit(sdrv_acmp_t *dev);
 
#endif /* SDRV_ACMP_H_ */