第一次提交
This commit is contained in:
30
devices/script/IAR/flashloader_debug.mac
Normal file
30
devices/script/IAR/flashloader_debug.mac
Normal file
@@ -0,0 +1,30 @@
|
||||
tcm_init(tcma_base, tcmb_base)
|
||||
{
|
||||
__var actlr;
|
||||
|
||||
actlr = __jtagCP15ReadReg(1, 0, 0, 1);
|
||||
actlr &= ~((1 << 25) | (1 << 26) | (1 << 27));
|
||||
__jtagCP15WriteReg(1, 0, 0, 1, actlr);
|
||||
__jtagCP15WriteReg(9, 1, 0, 1, tcma_base | 1);
|
||||
__jtagCP15WriteReg(9, 1, 0, 0, tcmb_base | 1);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* execUserReset()
|
||||
*********************************************************************/
|
||||
execUserReset()
|
||||
{
|
||||
__message "------------------------------ execUserReset ---------------------------------";
|
||||
/* Disable MPU*/
|
||||
__jtagCP15WriteReg(1, 0, 0, 0, 0x08E7087A);
|
||||
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* execUserPreload()
|
||||
*********************************************************************/
|
||||
execUserPreload()
|
||||
{
|
||||
__message "------------------------------ execUserPreload ---------------------------------";
|
||||
tcm_init(0x3E0000, 0x3F0000);
|
||||
}
|
||||
231
devices/script/IAR/iram_remap.mac
Normal file
231
devices/script/IAR/iram_remap.mac
Normal file
@@ -0,0 +1,231 @@
|
||||
__param __sf_addr__=0x404000;
|
||||
__param __sp0_addr__=0x700000;
|
||||
__param __sp1_addr__=0x780000;
|
||||
__param __sx0_addr__=0x600000;
|
||||
__param __sx1_addr__=0x680000;
|
||||
|
||||
|
||||
core_remap(addr, start_bit1, start_bit2)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
|
||||
start_bit_val = start_bit1;
|
||||
width = 0x14;
|
||||
val = addr>>12;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
__message reg_addr:%x;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
__message "original ", reg_val :%x;
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val&0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val&0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
__message "new ", reg_val :%x;
|
||||
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = start_bit2;
|
||||
width = 0x1;
|
||||
val = 1;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
__message reg_addr:%x;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
__message "original ", reg_val :%x;
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
__message "new ", reg_val :%x;
|
||||
|
||||
reg_addr = 0xf0670004;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val |= 0x01;
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
sf_remap()
|
||||
{
|
||||
core_remap(__sf_addr__, 0x0, 0x14);
|
||||
}
|
||||
|
||||
sx0_remap()
|
||||
{
|
||||
core_remap(__sx0_addr__, 0x20, 0x34);
|
||||
}
|
||||
|
||||
sx1_remap()
|
||||
{
|
||||
core_remap(__sx1_addr__, 0x40, 0x54);
|
||||
}
|
||||
|
||||
sp0_remap()
|
||||
{
|
||||
core_remap(__sp0_addr__, 0x60, 0x74);
|
||||
}
|
||||
|
||||
sp1_remap()
|
||||
{
|
||||
core_remap(__sp1_addr__, 0x80, 0x94);
|
||||
}
|
||||
|
||||
sf_reset()
|
||||
{
|
||||
__var reg;
|
||||
__var val;
|
||||
reg = 0xf0690000 + 0x1A0C;
|
||||
val = __readMemory32(reg, "Memory");
|
||||
val |= (1<<6);
|
||||
__message val:%x;
|
||||
__writeMemory32(val, reg, "Memory");
|
||||
__delay(1000);
|
||||
}
|
||||
|
||||
core_start(addr_offset)
|
||||
{
|
||||
__var reg;
|
||||
__var val;
|
||||
|
||||
reg = 0xf0690000 + addr_offset;
|
||||
val = __readMemory32(reg, "Memory");
|
||||
val |= (1<<0);
|
||||
__message val:%x;
|
||||
__writeMemory32(val, reg, "Memory");
|
||||
__delay(1000);
|
||||
}
|
||||
|
||||
|
||||
sp0_start()
|
||||
{
|
||||
core_start(0x1A14);
|
||||
}
|
||||
|
||||
sp1_start()
|
||||
{
|
||||
core_start(0x1A1C);
|
||||
}
|
||||
|
||||
sx0_start()
|
||||
{
|
||||
core_start(0x1A24);
|
||||
}
|
||||
|
||||
sx1_start()
|
||||
{
|
||||
core_start(0x1A2C);
|
||||
}
|
||||
|
||||
sp_split_mode()
|
||||
{
|
||||
sp_split(0x1);
|
||||
}
|
||||
|
||||
sp_locksetp_mode()
|
||||
{
|
||||
sp_split(0);
|
||||
}
|
||||
|
||||
sp_split(val_set)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
start_bit_val = 0x160;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1A0;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1A1;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
sx_split_mode()
|
||||
{
|
||||
sx_split(0x1);
|
||||
}
|
||||
|
||||
sx_locksetp_mode()
|
||||
{
|
||||
sx_split(0);
|
||||
}
|
||||
|
||||
sx_split(val_set)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
start_bit_val = 0x180;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1C0;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1C1;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* execUserReset()
|
||||
execUserPreReset()
|
||||
*********************************************************************/
|
||||
execUserPreload()
|
||||
{
|
||||
__message "------------------------------ execUserPreload Remap ---------------------------------";
|
||||
sf_remap();
|
||||
__delay(1000);
|
||||
|
||||
//__message "------------------------------ Reset ---------------------------------";
|
||||
sf_reset();
|
||||
|
||||
__message "------------------------------ Halt CPU by Jlink ---------------------------------";
|
||||
__jlinkExecCommand("Halt");
|
||||
}
|
||||
231
devices/script/IAR/xip_remap.mac
Normal file
231
devices/script/IAR/xip_remap.mac
Normal file
@@ -0,0 +1,231 @@
|
||||
__param __sf_addr__=0x100c1000;
|
||||
__param __sp0_addr__=0x10340000;
|
||||
__param __sp1_addr__=0x103C0000;
|
||||
__param __sx0_addr__=0x10440000;
|
||||
__param __sx1_addr__=0x104C0000;
|
||||
|
||||
|
||||
core_remap(addr, start_bit1, start_bit2)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
|
||||
start_bit_val = start_bit1;
|
||||
width = 0x14;
|
||||
val = addr>>12;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
__message reg_addr:%x;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
__message "original ", reg_val :%x;
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val&0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val&0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
__message "new ", reg_val :%x;
|
||||
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = start_bit2;
|
||||
width = 0x1;
|
||||
val = 1;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
__message reg_addr:%x;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
__message "original ", reg_val :%x;
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
__message "new ", reg_val :%x;
|
||||
|
||||
reg_addr = 0xf0670004;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val |= 0x01;
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
sf_remap()
|
||||
{
|
||||
core_remap(__sf_addr__, 0x0, 0x14);
|
||||
}
|
||||
|
||||
sx0_remap()
|
||||
{
|
||||
core_remap(__sx0_addr__, 0x20, 0x34);
|
||||
}
|
||||
|
||||
sx1_remap()
|
||||
{
|
||||
core_remap(__sx1_addr__, 0x40, 0x54);
|
||||
}
|
||||
|
||||
sp0_remap()
|
||||
{
|
||||
core_remap(__sp0_addr__, 0x60, 0x74);
|
||||
}
|
||||
|
||||
sp1_remap()
|
||||
{
|
||||
core_remap(__sp1_addr__, 0x80, 0x94);
|
||||
}
|
||||
|
||||
sf_reset()
|
||||
{
|
||||
__var reg;
|
||||
__var val;
|
||||
reg = 0xf0690000 + 0x1A0C;
|
||||
val = __readMemory32(reg, "Memory");
|
||||
val |= (1<<6);
|
||||
__message val:%x;
|
||||
__writeMemory32(val, reg, "Memory");
|
||||
__delay(1000);
|
||||
}
|
||||
|
||||
core_start(addr_offset)
|
||||
{
|
||||
__var reg;
|
||||
__var val;
|
||||
|
||||
reg = 0xf0690000 + addr_offset;
|
||||
val = __readMemory32(reg, "Memory");
|
||||
val |= (1<<0);
|
||||
__message val:%x;
|
||||
__writeMemory32(val, reg, "Memory");
|
||||
__delay(1000);
|
||||
}
|
||||
|
||||
|
||||
sp0_start()
|
||||
{
|
||||
core_start(0x1A14);
|
||||
}
|
||||
|
||||
sp1_start()
|
||||
{
|
||||
core_start(0x1A1C);
|
||||
}
|
||||
|
||||
sx0_start()
|
||||
{
|
||||
core_start(0x1A24);
|
||||
}
|
||||
|
||||
sx1_start()
|
||||
{
|
||||
core_start(0x1A2C);
|
||||
}
|
||||
|
||||
sp_split_mode()
|
||||
{
|
||||
sp_split(0x1);
|
||||
}
|
||||
|
||||
sp_locksetp_mode()
|
||||
{
|
||||
sp_split(0);
|
||||
}
|
||||
|
||||
sp_split(val_set)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
start_bit_val = 0x160;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1A0;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1A1;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
sx_split_mode()
|
||||
{
|
||||
sx_split(0x1);
|
||||
}
|
||||
|
||||
sx_locksetp_mode()
|
||||
{
|
||||
sx_split(0);
|
||||
}
|
||||
|
||||
sx_split(val_set)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
start_bit_val = 0x180;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1C0;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1C1;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* execUserReset()
|
||||
execUserPreReset()
|
||||
*********************************************************************/
|
||||
execUserPreload()
|
||||
{
|
||||
__message "------------------------------ execUserPreload Remap ---------------------------------";
|
||||
sf_remap();
|
||||
__delay(1000);
|
||||
|
||||
//__message "------------------------------ Reset ---------------------------------";
|
||||
sf_reset();
|
||||
|
||||
__message "------------------------------ Halt CPU by Jlink ---------------------------------";
|
||||
__jlinkExecCommand("Halt");
|
||||
}
|
||||
231
devices/script/IAR/xip_remap_norflash.mac
Normal file
231
devices/script/IAR/xip_remap_norflash.mac
Normal file
@@ -0,0 +1,231 @@
|
||||
__param __sf_addr__=0x10008000;
|
||||
__param __sp0_addr__=0x10288000;
|
||||
__param __sp1_addr__=0x10308000;
|
||||
__param __sx0_addr__=0x10388000;
|
||||
__param __sx1_addr__=0x10408000;
|
||||
|
||||
|
||||
core_remap(addr, start_bit1, start_bit2)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
|
||||
start_bit_val = start_bit1;
|
||||
width = 0x14;
|
||||
val = addr>>12;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
__message reg_addr:%x;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
__message "original ", reg_val :%x;
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val&0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val&0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
__message "new ", reg_val :%x;
|
||||
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = start_bit2;
|
||||
width = 0x1;
|
||||
val = 1;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
__message reg_addr:%x;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
__message "original ", reg_val :%x;
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
__message "new ", reg_val :%x;
|
||||
|
||||
reg_addr = 0xf0670004;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val |= 0x01;
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
sf_remap()
|
||||
{
|
||||
core_remap(__sf_addr__, 0x0, 0x14);
|
||||
}
|
||||
|
||||
sx0_remap()
|
||||
{
|
||||
core_remap(__sx0_addr__, 0x20, 0x34);
|
||||
}
|
||||
|
||||
sx1_remap()
|
||||
{
|
||||
core_remap(__sx1_addr__, 0x40, 0x54);
|
||||
}
|
||||
|
||||
sp0_remap()
|
||||
{
|
||||
core_remap(__sp0_addr__, 0x60, 0x74);
|
||||
}
|
||||
|
||||
sp1_remap()
|
||||
{
|
||||
core_remap(__sp1_addr__, 0x80, 0x94);
|
||||
}
|
||||
|
||||
sf_reset()
|
||||
{
|
||||
__var reg;
|
||||
__var val;
|
||||
reg = 0xf0690000 + 0x1A0C;
|
||||
val = __readMemory32(reg, "Memory");
|
||||
val |= (1<<6);
|
||||
__message val:%x;
|
||||
__writeMemory32(val, reg, "Memory");
|
||||
__delay(1000);
|
||||
}
|
||||
|
||||
core_start(addr_offset)
|
||||
{
|
||||
__var reg;
|
||||
__var val;
|
||||
|
||||
reg = 0xf0690000 + addr_offset;
|
||||
val = __readMemory32(reg, "Memory");
|
||||
val |= (1<<0);
|
||||
__message val:%x;
|
||||
__writeMemory32(val, reg, "Memory");
|
||||
__delay(1000);
|
||||
}
|
||||
|
||||
|
||||
sp0_start()
|
||||
{
|
||||
core_start(0x1A14);
|
||||
}
|
||||
|
||||
sp1_start()
|
||||
{
|
||||
core_start(0x1A1C);
|
||||
}
|
||||
|
||||
sx0_start()
|
||||
{
|
||||
core_start(0x1A24);
|
||||
}
|
||||
|
||||
sx1_start()
|
||||
{
|
||||
core_start(0x1A2C);
|
||||
}
|
||||
|
||||
sp_split_mode()
|
||||
{
|
||||
sp_split(0x1);
|
||||
}
|
||||
|
||||
sp_locksetp_mode()
|
||||
{
|
||||
sp_split(0);
|
||||
}
|
||||
|
||||
sp_split(val_set)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
start_bit_val = 0x160;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1A0;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1A1;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
sx_split_mode()
|
||||
{
|
||||
sx_split(0x1);
|
||||
}
|
||||
|
||||
sx_locksetp_mode()
|
||||
{
|
||||
sx_split(0);
|
||||
}
|
||||
|
||||
sx_split(val_set)
|
||||
{
|
||||
__var reg_addr;
|
||||
__var reg_val;
|
||||
__var start_bit_val;
|
||||
__var width;
|
||||
__var val;
|
||||
|
||||
start_bit_val = 0x180;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1C0;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
|
||||
start_bit_val = 0x1C1;
|
||||
width = 0x1;
|
||||
val = val_set;
|
||||
reg_addr = 0xF0680000 + 0x1400 + (start_bit_val>>5)*4;
|
||||
reg_val = __readMemory32(reg_addr, "Memory");
|
||||
reg_val = reg_val&(~(((1<<width)-1)<<(start_bit_val & 0x1f)));
|
||||
reg_val = reg_val|(val<<(start_bit_val & 0x1f));
|
||||
__writeMemory32(reg_val, reg_addr, "Memory");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* execUserReset()
|
||||
execUserPreReset()
|
||||
*********************************************************************/
|
||||
execUserPreload()
|
||||
{
|
||||
__message "------------------------------ execUserPreload Remap ---------------------------------";
|
||||
sf_remap();
|
||||
__delay(1000);
|
||||
|
||||
//__message "------------------------------ Reset ---------------------------------";
|
||||
sf_reset();
|
||||
|
||||
__message "------------------------------ Halt CPU by Jlink ---------------------------------";
|
||||
__jlinkExecCommand("Halt");
|
||||
}
|
||||
BIN
devices/script/JFLASH/E3106_NORFLASH/FDA.bin
Normal file
BIN
devices/script/JFLASH/E3106_NORFLASH/FDA.bin
Normal file
Binary file not shown.
BIN
devices/script/JFLASH/E3106_NORFLASH/boot0.bin
Normal file
BIN
devices/script/JFLASH/E3106_NORFLASH/boot0.bin
Normal file
Binary file not shown.
BIN
devices/script/JFLASH/E3106_NORFLASH/boot1.bin
Normal file
BIN
devices/script/JFLASH/E3106_NORFLASH/boot1.bin
Normal file
Binary file not shown.
BIN
devices/script/JFLASH/E3106_NORFLASH/boot2.bin
Normal file
BIN
devices/script/JFLASH/E3106_NORFLASH/boot2.bin
Normal file
Binary file not shown.
BIN
devices/script/JFLASH/E3106_NORFLASH/rfd.bin
Normal file
BIN
devices/script/JFLASH/E3106_NORFLASH/rfd.bin
Normal file
Binary file not shown.
BIN
devices/script/JFLASH/E3106_NORFLASH/sfs.bin
Normal file
BIN
devices/script/JFLASH/E3106_NORFLASH/sfs.bin
Normal file
Binary file not shown.
159
devices/script/JFLASH/JFlash.log
Normal file
159
devices/script/JFLASH/JFlash.log
Normal file
@@ -0,0 +1,159 @@
|
||||
SEGGER J-Link Commander V7.98a (Compiled Jul 19 2024 15:01:50)
|
||||
DLL version V7.98a, compiled Jul 19 2024 15:01:03
|
||||
|
||||
|
||||
J-Link Command File read successfully.
|
||||
Processing script file...
|
||||
J-Link>r
|
||||
J-Link connection not established yet but required for command.
|
||||
Connecting to J-Link via USB...
|
||||
****** Error: Error while evaluating J-Link script file: Error while compiling. Line 34, column 1:
|
||||
}
|
||||
^
|
||||
Missing return statement at the end of non-void function
|
||||
Failed prepare script file
|
||||
O.K.
|
||||
Firmware: J-Link V9 compiled May 7 2021 16:26:12
|
||||
Hardware version: V9.40
|
||||
J-Link uptime (since boot): N/A (Not supported by this model)
|
||||
S/N: 59406426
|
||||
License(s): RDI, GDB, FlashDL, FlashBP, JFlash
|
||||
VTref=3.333V
|
||||
Target connection not established yet but required for command.
|
||||
Device "E3106_NORFLASH" selected.
|
||||
|
||||
|
||||
Connecting to target via SWD
|
||||
Found SW-DP with ID 0x2BA01477
|
||||
DPIDR: 0x2BA01477
|
||||
CoreSight SoC-400 or earlier
|
||||
Scanning AP map to find all available APs
|
||||
AP[1]: Stopped AP scan as end of AP map has been reached
|
||||
AP[0]: APB-AP (IDR: 0x24770002)
|
||||
Iterating through AP map to find APB-AP to use
|
||||
AP[0]: APB-AP found
|
||||
ROMTbl[0][0]: CompAddr: F0A01000 CID: B105900D, PID: 004BBC15 Cortex-R5
|
||||
Found Cortex-R5 r1p3
|
||||
4 code breakpoints, 3 data breakpoints
|
||||
Debug architecture ARMv7.0
|
||||
Data endian: little
|
||||
Main ID register: 0x411FC153
|
||||
I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
|
||||
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
|
||||
TCM Type register: 0x00010001
|
||||
MPU Type register: 0x00001000
|
||||
System control register:
|
||||
Instruction endian: little
|
||||
Level-1 instruction cache disabled
|
||||
Level-1 data cache disabled
|
||||
MPU disabled
|
||||
Branch prediction enabled
|
||||
|
||||
****** Error: Error while evaluating J-Link script file: Error while compiling. Line 34, column 1:
|
||||
}
|
||||
^
|
||||
Missing return statement at the end of non-void function
|
||||
Failed prepare script file
|
||||
Memory zones:
|
||||
Zone: "Default" Description: Default access mode
|
||||
Zone: "APB-AP (AP0)" Description: DMA like acc. in AP0 addr. space
|
||||
Cortex-R5 identified.
|
||||
Reset delay: 0 ms
|
||||
Reset type NORMAL: Reset CPU + peripherals via reset pin. CPU halted immediately after reset.
|
||||
CPU not halted after Reset, halting using Halt request
|
||||
J-Link>h
|
||||
PC: (R15) = 0003D080, CPSR = 00000197 (ABORT mode, ARM IRQ dis.)
|
||||
Current:
|
||||
R0 =10000000, R1 =1143540C, R2 =00000003, R3 =0000036D
|
||||
R4 =5AA5F00F, R5 =A55A0FF0, R6 =5AA5F00F, R7 =0190FF70
|
||||
R8 =5AA5F00F, R9 =007C003C, R10=00000000, R11=0190FF6C, R12=00000000
|
||||
R13=01910000, R14=00040104, SPSR=00000000
|
||||
USR: R8 =5AA5F00F, R9 =007C003C, R10=00000000, R11=0190FF6C, R12=00000000
|
||||
R13=003FB8E8, R14=003FB8E9
|
||||
FIQ: R8 =00000000, R9 =00000000, R10=00000000, R11=00000000, R12=00000000
|
||||
R13=01910000, R14=00000000, SPSR=000001D3
|
||||
IRQ: R13=01910000, R14=00000000, SPSR=000001D3
|
||||
SVC: R13=0190FF58, R14=0190703C, SPSR=000001D3
|
||||
ABT: R13=01910000, R14=00040104, SPSR=00000197
|
||||
UND: R13=01910000, R14=00000000, SPSR=000001D3
|
||||
J-Link>WCP15Ex 0 1 0 0 0x08E7087A
|
||||
CP15[0, 1, 0, 0] = 0x08E7087A
|
||||
J-Link>WCP15Ex 0 1 0 1 0x00000020
|
||||
CP15[0, 1, 0, 1] = 0x00000020
|
||||
J-Link>WCP15Ex 0 9 1 1 0x3E0001
|
||||
CP15[0, 9, 1, 1] = 0x003E0001
|
||||
J-Link>WCP15Ex 0 9 1 0 0x3F0001
|
||||
CP15[0, 9, 1, 0] = 0x003F0001
|
||||
J-Link>q
|
||||
|
||||
Script processing completed.
|
||||
|
||||
Application log started
|
||||
- J-Flash V7.98a (J-Flash compiled Jul 19 2024 15:01:26)
|
||||
- JLinkARM.dll V7.98a (DLL compiled Jul 19 2024 15:01:03)
|
||||
Optional command line parameters found
|
||||
- [1]: -openprjD:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\SemiDrive.jflash
|
||||
- [2]: -openD:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\E3106_NORFLASH\sfs.bin,0x10000000
|
||||
- [3]: -jflashlogjflashlog_tmp.txt
|
||||
- [4]: -jlinklogjlinklog_tmp.txt
|
||||
- [5]: -mergeD:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\E3106_NORFLASH\rfd.bin,0x100000F0
|
||||
- [6]: -auto
|
||||
- [7]: -exit
|
||||
Reading flash device list [C:\Program Files\SEGGER\JLink_V798a\ETC/JFlash/Flash.csv] ...
|
||||
- List of flash devices read successfully (451 Devices)
|
||||
Reading MCU device list ...
|
||||
- List of MCU devices read successfully (11299 Devices)
|
||||
Opening project file [D:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\SemiDrive.jflash] ...
|
||||
- Project opened successfully
|
||||
Opening data file [D:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\E3106_NORFLASH\sfs.bin] ...
|
||||
- Data file opened successfully (128 bytes, 1 range, CRC of data = 0x061E246F, CRC of file = 0x061E246F)
|
||||
Merging data file [D:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\E3106_NORFLASH\rfd.bin] ...
|
||||
- Data files merged successfully (400 bytes, 2 ranges, CRC = 0xC5069972)
|
||||
Auto programming target (400 bytes, 2 ranges) ...
|
||||
- Connecting ...
|
||||
- ERROR: Timeout while reading DCC data
|
||||
|
||||
- ERROR: Failed to connect.
|
||||
Could not determine CPU clock frequency.
|
||||
- ERROR: Connect failed
|
||||
- ERROR: Could not auto program target, not connected
|
||||
J-Flash V7.98a Error: Timeout while reading DCC data
|
||||
Failed to connect.
|
||||
Could not determine CPU clock frequency.
|
||||
Connect failed
|
||||
Could not auto program target, not connected
|
||||
Close project
|
||||
- Project closed
|
||||
Application log started
|
||||
- J-Flash V7.98a (J-Flash compiled Jul 19 2024 15:01:26)
|
||||
- JLinkARM.dll V7.98a (DLL compiled Jul 19 2024 15:01:03)
|
||||
Optional command line parameters found
|
||||
- [1]: -openprjD:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\SemiDrive.jflash
|
||||
- [2]: -openD:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\E3106_NORFLASH\boot0.bin,0x10010000
|
||||
- [3]: -jflashlogjflashlog_tmp.txt
|
||||
- [4]: -jlinklogjlinklog_tmp.txt
|
||||
- [5]: -auto
|
||||
- [6]: -exit
|
||||
Reading flash device list [C:\Program Files\SEGGER\JLink_V798a\ETC/JFlash/Flash.csv] ...
|
||||
- List of flash devices read successfully (451 Devices)
|
||||
Reading MCU device list ...
|
||||
- List of MCU devices read successfully (11299 Devices)
|
||||
Opening project file [D:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\SemiDrive.jflash] ...
|
||||
- Project opened successfully
|
||||
Opening data file [D:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\E3106_NORFLASH\boot0.bin] ...
|
||||
- Data file opened successfully (148800 bytes, 1 range, CRC of data = 0x8E3EAC0F, CRC of file = 0x8E3EAC0F)
|
||||
Auto programming target (148800 bytes, 1 range) ...
|
||||
- Connecting ...
|
||||
- ERROR: Timeout while reading DCC data
|
||||
|
||||
- ERROR: Failed to connect.
|
||||
Could not determine CPU clock frequency.
|
||||
- ERROR: Connect failed
|
||||
- ERROR: Could not auto program target, not connected
|
||||
J-Flash V7.98a Error: Timeout while reading DCC data
|
||||
Failed to connect.
|
||||
Could not determine CPU clock frequency.
|
||||
Connect failed
|
||||
Could not auto program target, not connected
|
||||
Close project
|
||||
- Project closed
|
||||
740
devices/script/JFLASH/JLinkARM.log
Normal file
740
devices/script/JFLASH/JLinkARM.log
Normal file
@@ -0,0 +1,740 @@
|
||||
T0584 000:001.020 SEGGER J-Link V7.98a Log File
|
||||
T0584 000:001.251 DLL Compiled: Jul 19 2024 15:01:03
|
||||
T0584 000:001.337 Logging started @ 2024-07-28 11:37
|
||||
T0584 000:001.420 Process: C:\Program Files\SEGGER\JLink_V798a\JLink.exe
|
||||
T0584 000:001.508 - 1.506ms
|
||||
T0584 000:001.708 JLINK_SetWarnOutHandler(...)
|
||||
T0584 000:001.794 - 0.087ms
|
||||
T0584 000:001.891 JLINK_ExecCommand("scriptfile = D:\e3_176_ref_E3106_mcu_demo_E3_SSDK_PTG3.0_2024.07.20 21.35.43\e3_176_ref\devices\script\JFLASH\SemiDrive.JLinkScript", ...).
|
||||
T0584 000:002.026 - 0.131ms returns 0x00
|
||||
T0584 000:002.127 JLINK_OpenEx(...)
|
||||
T0584 000:005.016
|
||||
***** Error:
|
||||
T0584 000:005.167 Error while evaluating J-Link script file: Error while compiling. Line 34, column 1:
|
||||
}
|
||||
^
|
||||
Missing return statement at the end of non-void function
|
||||
T0584 000:005.735
|
||||
***** Error:
|
||||
T0584 000:005.816 Failed prepare script file
|
||||
T0584 000:026.143 Firmware: J-Link V9 compiled May 7 2021 16:26:12
|
||||
T0584 000:027.014 Firmware: J-Link V9 compiled May 7 2021 16:26:12
|
||||
T0584 000:027.307 Decompressing FW timestamp took 171 us
|
||||
T0584 000:033.112 Hardware: V9.40
|
||||
T0584 000:033.188 S/N: 59406426
|
||||
T0584 000:033.242 OEM: SEGGER
|
||||
T0584 000:033.295 Feature(s): RDI, GDB, FlashDL, FlashBP, JFlash
|
||||
T0584 000:033.895 Bootloader: (Could not read)
|
||||
T0584 000:034.602 TELNET listener socket opened on port 19021
|
||||
T0584 000:034.709 WEBSRV WEBSRV_Init(): Starting webserver thread(s)
|
||||
T0584 000:034.967 WEBSRV Webserver running on local port 19080
|
||||
T0584 000:035.380 Looking for J-Link GUI Server exe at: C:\Program Files\SEGGER\JLink_V798a\JLinkGUIServer.exe
|
||||
T0584 000:035.520 Forking J-Link GUI Server: C:\Program Files\SEGGER\JLink_V798a\JLinkGUIServer.exe
|
||||
T0584 000:092.174 J-Link GUI Server info: "J-Link GUI server V7.98a "
|
||||
T0584 000:100.588 - 98.451ms returns "O.K."
|
||||
T0584 000:100.753 JLINK_GetFirmwareString(...)
|
||||
T0584 000:100.795 - 0.046ms
|
||||
T0584 000:100.835 JLINK_GetHardwareVersion()
|
||||
T0584 000:100.873 - 0.036ms returns 94000
|
||||
T0584 000:100.932 JLINK_GetHWInfo(...)
|
||||
T0584 000:101.123 - 0.193ms returns 0
|
||||
T0584 000:101.170 JLINK_GetSN()
|
||||
T0584 000:101.208 - 0.040ms returns 59406426
|
||||
T0584 000:101.248 JLINK_GetOEMString(...)
|
||||
T0584 000:101.293 JLINK_EMU_GetCurrConnectionInfo()
|
||||
T0584 000:101.495 - 0.202ms returns 0
|
||||
T0584 000:101.542 JLINK_EMU_HasCapEx(0x00000026)
|
||||
T0584 000:101.579 - 0.037ms returns 0
|
||||
T0584 000:101.616 JLINK_GetEmuCaps()
|
||||
T0584 000:101.665 - 0.048ms returns 0xB9FF7BBF
|
||||
T0584 000:101.707 JLINK_GetEmuCaps()
|
||||
T0584 000:101.743 - 0.035ms returns 0xB9FF7BBF
|
||||
T0584 000:101.781 JLINK_GetHWStatus(...)
|
||||
T0584 000:101.960 - 0.178ms returns 0
|
||||
T0584 000:102.005 JLINK_EMU_HasCapEx(0x00000044)
|
||||
T0584 000:102.041 - 0.036ms returns 0
|
||||
T0584 000:102.085 JLINK_DEVICE_GetIndex(sDeviceName = E3106_NORFLASH)
|
||||
T0584 000:129.404 XML file found at: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\JLinkDevices.xml
|
||||
T0584 000:130.295 C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\JLinkDevices.xml evaluated successfully.
|
||||
T0584 000:130.349 Device entry created: E3110_HYPERFLASH
|
||||
T0584 000:130.387 ChipInfo:
|
||||
T0584 000:130.455 Vendor: SemiDrive
|
||||
T0584 000:130.514 Name: E3110_HYPERFLASH
|
||||
T0584 000:130.591 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:130.647 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:130.702 WorkRAMSize: 0x00060000
|
||||
T0584 000:130.757 FlashBankInfo:
|
||||
T0584 000:130.811 Name: OSPI Flash
|
||||
T0584 000:130.866 BaseAddr: 0x10000000
|
||||
T0584 000:131.118 LoaderInfo:
|
||||
T0584 000:131.194 Name: OSPI_Flash
|
||||
T0584 000:131.267 MaxSize: 0x08000000
|
||||
T0584 000:131.340 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3110\hyperflash.out
|
||||
T0584 000:131.414 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:131.585 Device entry created: E3206_HYPERFLASH
|
||||
T0584 000:131.637 ChipInfo:
|
||||
T0584 000:131.710 Vendor: SemiDrive
|
||||
T0584 000:131.784 Name: E3206_HYPERFLASH
|
||||
T0584 000:131.967 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:132.045 WorkRAMAddr: 0x004E0000
|
||||
T0584 000:132.119 WorkRAMSize: 0x00060000
|
||||
T0584 000:132.184 FlashBankInfo:
|
||||
T0584 000:132.239 Name: OSPI Flash
|
||||
T0584 000:132.294 BaseAddr: 0x10000000
|
||||
T0584 000:132.489 LoaderInfo:
|
||||
T0584 000:132.546 Name: OSPI_Flash
|
||||
T0584 000:132.610 MaxSize: 0x08000000
|
||||
T0584 000:132.665 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3206\hyperflash.out
|
||||
T0584 000:132.719 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:132.780 Device entry created: E3210_HYPERFLASH
|
||||
T0584 000:132.816 ChipInfo:
|
||||
T0584 000:132.871 Vendor: SemiDrive
|
||||
T0584 000:132.937 Name: E3210_HYPERFLASH
|
||||
T0584 000:133.007 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:133.064 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:133.119 WorkRAMSize: 0x00060000
|
||||
T0584 000:133.173 FlashBankInfo:
|
||||
T0584 000:133.227 Name: OSPI Flash
|
||||
T0584 000:133.282 BaseAddr: 0x10000000
|
||||
T0584 000:133.469 LoaderInfo:
|
||||
T0584 000:133.525 Name: OSPI_Flash
|
||||
T0584 000:133.580 MaxSize: 0x08000000
|
||||
T0584 000:133.634 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3210\hyperflash.out
|
||||
T0584 000:133.688 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:133.749 Device entry created: E3420_HYPERFLASH
|
||||
T0584 000:133.785 ChipInfo:
|
||||
T0584 000:133.840 Vendor: SemiDrive
|
||||
T0584 000:133.896 Name: E3420_HYPERFLASH
|
||||
T0584 000:133.996 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:134.075 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:134.149 WorkRAMSize: 0x00060000
|
||||
T0584 000:134.224 FlashBankInfo:
|
||||
T0584 000:134.299 Name: OSPI Flash
|
||||
T0584 000:134.377 BaseAddr: 0x10000000
|
||||
T0584 000:134.637 LoaderInfo:
|
||||
T0584 000:134.715 Name: OSPI_Flash
|
||||
T0584 000:134.788 MaxSize: 0x08000000
|
||||
T0584 000:134.863 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3420\hyperflash.out
|
||||
T0584 000:134.946 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:135.027 Device entry created: E3430_HYPERFLASH
|
||||
T0584 000:135.075 ChipInfo:
|
||||
T0584 000:135.146 Vendor: SemiDrive
|
||||
T0584 000:135.221 Name: E3430_HYPERFLASH
|
||||
T0584 000:135.299 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:135.374 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:135.452 WorkRAMSize: 0x00060000
|
||||
T0584 000:135.525 FlashBankInfo:
|
||||
T0584 000:135.597 Name: OSPI Flash
|
||||
T0584 000:135.671 BaseAddr: 0x10000000
|
||||
T0584 000:135.918 LoaderInfo:
|
||||
T0584 000:135.990 Name: OSPI_Flash
|
||||
T0584 000:136.046 MaxSize: 0x08000000
|
||||
T0584 000:136.100 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3430\hyperflash.out
|
||||
T0584 000:136.155 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:136.215 Device entry created: E3640_HYPERFLASH
|
||||
T0584 000:136.252 ChipInfo:
|
||||
T0584 000:136.306 Vendor: SemiDrive
|
||||
T0584 000:136.364 Name: E3640_HYPERFLASH
|
||||
T0584 000:136.435 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:136.490 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:136.545 WorkRAMSize: 0x00060000
|
||||
T0584 000:136.599 FlashBankInfo:
|
||||
T0584 000:136.666 Name: OSPI Flash
|
||||
T0584 000:136.748 BaseAddr: 0x10000000
|
||||
T0584 000:137.007 LoaderInfo:
|
||||
T0584 000:137.077 Name: OSPI_Flash
|
||||
T0584 000:137.153 MaxSize: 0x08000000
|
||||
T0584 000:137.229 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3640\hyperflash.out
|
||||
T0584 000:137.429 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:137.518 Device entry created: E3648_HYPERFLASH
|
||||
T0584 000:137.573 ChipInfo:
|
||||
T0584 000:137.655 Vendor: SemiDrive
|
||||
T0584 000:137.751 Name: E3648_HYPERFLASH
|
||||
T0584 000:137.827 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:137.902 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:137.981 WorkRAMSize: 0x00060000
|
||||
T0584 000:138.063 FlashBankInfo:
|
||||
T0584 000:138.147 Name: OSPI Flash
|
||||
T0584 000:138.221 BaseAddr: 0x10000000
|
||||
T0584 000:138.439 LoaderInfo:
|
||||
T0584 000:138.514 Name: OSPI_Flash
|
||||
T0584 000:138.581 MaxSize: 0x08000000
|
||||
T0584 000:138.636 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3648\hyperflash.out
|
||||
T0584 000:138.705 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:138.776 Device entry created: D3248_NORFLASH
|
||||
T0584 000:138.851 ChipInfo:
|
||||
T0584 000:138.985 Vendor: SemiDrive
|
||||
T0584 000:139.065 Name: D3248_NORFLASH
|
||||
T0584 000:139.123 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:139.196 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:139.309 WorkRAMSize: 0x00060000
|
||||
T0584 000:139.398 FlashBankInfo:
|
||||
T0584 000:139.508 Name: OSPI Flash
|
||||
T0584 000:139.685 BaseAddr: 0x10000000
|
||||
T0584 000:140.016 LoaderInfo:
|
||||
T0584 000:140.093 Name: OSPI_Flash
|
||||
T0584 000:140.168 MaxSize: 0x08000000
|
||||
T0584 000:140.299 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\D3248\norflash.out
|
||||
T0584 000:140.365 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:140.553 Device entry created: E3104_NORFLASH
|
||||
T0584 000:140.594 ChipInfo:
|
||||
T0584 000:140.649 Vendor: SemiDrive
|
||||
T0584 000:140.705 Name: E3104_NORFLASH
|
||||
T0584 000:140.760 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:140.815 WorkRAMAddr: 0x004E0000
|
||||
T0584 000:140.870 WorkRAMSize: 0x00060000
|
||||
T0584 000:140.935 FlashBankInfo:
|
||||
T0584 000:140.990 Name: OSPI Flash
|
||||
T0584 000:141.045 BaseAddr: 0x10000000
|
||||
T0584 000:141.246 LoaderInfo:
|
||||
T0584 000:141.302 Name: OSPI_Flash
|
||||
T0584 000:141.357 MaxSize: 0x08000000
|
||||
T0584 000:141.411 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3104\norflash.out
|
||||
T0584 000:141.466 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:141.527 Device entry created: E3106_NORFLASH
|
||||
T0584 000:141.563 ChipInfo:
|
||||
T0584 000:141.617 Vendor: SemiDrive
|
||||
T0584 000:141.672 Name: E3106_NORFLASH
|
||||
T0584 000:141.727 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:141.782 WorkRAMAddr: 0x004E0000
|
||||
T0584 000:141.837 WorkRAMSize: 0x00060000
|
||||
T0584 000:141.899 FlashBankInfo:
|
||||
T0584 000:141.965 Name: OSPI Flash
|
||||
T0584 000:142.021 BaseAddr: 0x10000000
|
||||
T0584 000:142.194 LoaderInfo:
|
||||
T0584 000:142.250 Name: OSPI_Flash
|
||||
T0584 000:142.305 MaxSize: 0x08000000
|
||||
T0584 000:142.359 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3106\norflash.out
|
||||
T0584 000:142.413 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:142.473 Device entry created: E3110_NORFLASH
|
||||
T0584 000:142.510 ChipInfo:
|
||||
T0584 000:142.564 Vendor: SemiDrive
|
||||
T0584 000:142.618 Name: E3110_NORFLASH
|
||||
T0584 000:142.675 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:142.729 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:142.784 WorkRAMSize: 0x00060000
|
||||
T0584 000:142.846 FlashBankInfo:
|
||||
T0584 000:142.913 Name: OSPI Flash
|
||||
T0584 000:142.970 BaseAddr: 0x10000000
|
||||
T0584 000:143.139 LoaderInfo:
|
||||
T0584 000:143.195 Name: OSPI_Flash
|
||||
T0584 000:143.249 MaxSize: 0x08000000
|
||||
T0584 000:143.304 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3110\norflash.out
|
||||
T0584 000:143.358 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:143.418 Device entry created: E3205_NORFLASH
|
||||
T0584 000:143.456 ChipInfo:
|
||||
T0584 000:143.510 Vendor: SemiDrive
|
||||
T0584 000:143.565 Name: E3205_NORFLASH
|
||||
T0584 000:143.620 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:143.675 WorkRAMAddr: 0x004E0000
|
||||
T0584 000:143.729 WorkRAMSize: 0x00060000
|
||||
T0584 000:143.783 FlashBankInfo:
|
||||
T0584 000:143.837 Name: OSPI Flash
|
||||
T0584 000:143.898 BaseAddr: 0x10000000
|
||||
T0584 000:144.075 LoaderInfo:
|
||||
T0584 000:144.132 Name: OSPI_Flash
|
||||
T0584 000:144.187 MaxSize: 0x08000000
|
||||
T0584 000:144.242 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3205\norflash.out
|
||||
T0584 000:144.297 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:144.356 Device entry created: E3210_NORFLASH
|
||||
T0584 000:144.392 ChipInfo:
|
||||
T0584 000:144.446 Vendor: SemiDrive
|
||||
T0584 000:144.501 Name: E3210_NORFLASH
|
||||
T0584 000:144.556 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:144.611 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:144.665 WorkRAMSize: 0x00060000
|
||||
T0584 000:144.719 FlashBankInfo:
|
||||
T0584 000:144.774 Name: OSPI Flash
|
||||
T0584 000:144.828 BaseAddr: 0x10000000
|
||||
T0584 000:145.024 LoaderInfo:
|
||||
T0584 000:145.081 Name: OSPI_Flash
|
||||
T0584 000:145.136 MaxSize: 0x08000000
|
||||
T0584 000:145.190 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3210\norflash.out
|
||||
T0584 000:145.244 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:145.304 Device entry created: E3340_NORFLASH
|
||||
T0584 000:145.340 ChipInfo:
|
||||
T0584 000:145.394 Vendor: SemiDrive
|
||||
T0584 000:145.449 Name: E3340_NORFLASH
|
||||
T0584 000:145.504 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:145.559 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:145.614 WorkRAMSize: 0x00060000
|
||||
T0584 000:145.668 FlashBankInfo:
|
||||
T0584 000:145.723 Name: OSPI Flash
|
||||
T0584 000:145.778 BaseAddr: 0x10000000
|
||||
T0584 000:145.958 LoaderInfo:
|
||||
T0584 000:146.015 Name: OSPI_Flash
|
||||
T0584 000:146.070 MaxSize: 0x08000000
|
||||
T0584 000:146.124 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3340\norflash.out
|
||||
T0584 000:146.178 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:146.238 Device entry created: E3420_NORFLASH
|
||||
T0584 000:146.274 ChipInfo:
|
||||
T0584 000:146.328 Vendor: SemiDrive
|
||||
T0584 000:146.382 Name: E3420_NORFLASH
|
||||
T0584 000:146.438 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:146.492 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:146.548 WorkRAMSize: 0x00060000
|
||||
T0584 000:146.602 FlashBankInfo:
|
||||
T0584 000:146.657 Name: OSPI Flash
|
||||
T0584 000:146.711 BaseAddr: 0x10000000
|
||||
T0584 000:146.877 LoaderInfo:
|
||||
T0584 000:146.942 Name: OSPI_Flash
|
||||
T0584 000:146.997 MaxSize: 0x08000000
|
||||
T0584 000:147.052 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3420\norflash.out
|
||||
T0584 000:147.106 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:147.249 Device entry created: E3430_NORFLASH
|
||||
T0584 000:147.286 ChipInfo:
|
||||
T0584 000:147.347 Vendor: SemiDrive
|
||||
T0584 000:147.415 Name: E3430_NORFLASH
|
||||
T0584 000:147.471 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:147.526 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:147.580 WorkRAMSize: 0x00060000
|
||||
T0584 000:147.634 FlashBankInfo:
|
||||
T0584 000:147.688 Name: OSPI Flash
|
||||
T0584 000:147.743 BaseAddr: 0x10000000
|
||||
T0584 000:147.934 LoaderInfo:
|
||||
T0584 000:148.002 Name: OSPI_Flash
|
||||
T0584 000:148.057 MaxSize: 0x08000000
|
||||
T0584 000:148.112 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3430\norflash.out
|
||||
T0584 000:148.167 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:148.228 Device entry created: E3640_NORFLASH
|
||||
T0584 000:148.264 ChipInfo:
|
||||
T0584 000:148.318 Vendor: SemiDrive
|
||||
T0584 000:148.373 Name: E3640_NORFLASH
|
||||
T0584 000:148.428 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:148.483 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:148.538 WorkRAMSize: 0x00060000
|
||||
T0584 000:148.592 FlashBankInfo:
|
||||
T0584 000:148.646 Name: OSPI Flash
|
||||
T0584 000:148.700 BaseAddr: 0x10000000
|
||||
T0584 000:148.871 LoaderInfo:
|
||||
T0584 000:148.949 Name: OSPI_Flash
|
||||
T0584 000:149.015 MaxSize: 0x08000000
|
||||
T0584 000:149.086 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3640\norflash.out
|
||||
T0584 000:149.152 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:149.225 Device entry created: E3648_NORFLASH
|
||||
T0584 000:149.269 ChipInfo:
|
||||
T0584 000:149.335 Vendor: SemiDrive
|
||||
T0584 000:149.413 Name: E3648_NORFLASH
|
||||
T0584 000:149.476 Core: JLINK_CORE_CORTEX_R5
|
||||
T0584 000:149.532 WorkRAMAddr: 0x003E0000
|
||||
T0584 000:149.586 WorkRAMSize: 0x00060000
|
||||
T0584 000:149.656 FlashBankInfo:
|
||||
T0584 000:149.740 Name: OSPI Flash
|
||||
T0584 000:149.818 BaseAddr: 0x10000000
|
||||
T0584 000:150.082 LoaderInfo:
|
||||
T0584 000:150.166 Name: OSPI_Flash
|
||||
T0584 000:150.244 MaxSize: 0x08000000
|
||||
T0584 000:150.337 Loader: C:\Users\liumin\AppData\Roaming\SEGGER\JLinkDevices\Devices\SemiDrive\E3648\norflash.out
|
||||
T0584 000:150.424 LoaderType: FLASH_ALGO_TYPE_OPEN
|
||||
T0584 000:151.316 - 49.230ms returns 6578
|
||||
T0584 000:151.367 JLINK_ExecCommand("device=E3106_NORFLASH", ...).
|
||||
T0584 000:152.771 Flash bank @ 0x00000000: SFL: Parsing sectorization info from ELF file
|
||||
T0584 000:152.834 FlashDevice.SectorInfo[0]: .SectorSize = 0x00001000, .SectorStartAddr = 0x00000000
|
||||
T0584 000:152.952 OFL: Init() present @ offset 0x0000C455
|
||||
T0584 000:153.019 OFL: UnInit() present @ offset 0x0000C4B5
|
||||
T0584 000:153.084 OFL: EraseSector() present @ offset 0x0000C4C3
|
||||
T0584 000:153.148 OFL: ProgramPage() present @ offset 0x0000C4FF
|
||||
T0584 000:153.212 OFL: EraseChip() present @ offset 0x0000C6E7
|
||||
T0584 000:153.276 OFL: BlankCheck() present @ offset 0x0000C53F
|
||||
T0584 000:153.340 OFL: Verify() N/A
|
||||
T0584 000:153.407 OFL: SEGGER_FL_Erase() N/A
|
||||
T0584 000:153.471 OFL: SEGGER_OPEN_Erase() present @ offset 0x0000C771
|
||||
T0584 000:153.536 OFL: SEGGER_FL_Program() N/A
|
||||
T0584 000:153.600 OFL: SEGGER_OPEN_Program() present @ offset 0x0000C66F
|
||||
T0584 000:153.665 OFL: SEGGER_FL_Read() N/A
|
||||
T0584 000:153.729 OFL: SEGGER_OPEN_Read() present @ offset 0x0000C717
|
||||
T0584 000:153.794 OFL: SEGGER_FL_CalcCRC() N/A
|
||||
T0584 000:153.858 OFL: SEGGER_OPEN_CalcCRC() present @ offset 0x0000C5ED
|
||||
T0584 000:153.929 OFL: SEGGER_FL_Start() N/A
|
||||
T0584 000:153.994 OFL: SEGGER_OPEN_Start() N/A
|
||||
T0584 000:154.058 OFL: SEGGER_FL_GetFlashInfo() N/A
|
||||
T0584 000:154.123 OFL: SEGGER_OPEN_GetFlashInfo() N/A
|
||||
T0584 000:154.194 OFL: SEGGER_FL_Verify() N/A
|
||||
T0584 000:154.260 OFL: SEGGER_FL_CheckBlank() N/A
|
||||
T0584 000:154.324 OFL: SEGGER_FL_Prepare() N/A
|
||||
T0584 000:154.389 OFL: SEGGER_FL_Restore() N/A
|
||||
T0584 000:154.453 OFL: SEGGER_FL_EraseChip() N/A
|
||||
T0584 000:154.518 OFL var <SEGGER_FL_GoIntEn>: N/A
|
||||
T0584 000:157.759 Device "E3106_NORFLASH" selected.
|
||||
T0584 000:160.004 - 8.595ms returns 0x00
|
||||
T0584 000:160.098 JLINK_EnableLog(...)
|
||||
T0584 000:160.138 - 0.040ms
|
||||
T0584 000:160.180 JLINK_GetEmuCaps()
|
||||
T0584 000:160.217 - 0.036ms returns 0xB9FF7BBF
|
||||
T0584 000:160.256 JLINK_TIF_GetAvailable(...)
|
||||
T0584 000:160.432 - 0.175ms
|
||||
T0584 000:160.479 JLINK_TIF_Select(JLINKARM_TIF_SWD)
|
||||
T0584 000:160.970 - 0.490ms returns 0x00
|
||||
T0584 000:161.017 JLINK_IsConnected()
|
||||
T0584 000:161.056 - 0.038ms returns FALSE
|
||||
T0584 000:161.095 JLINK_SetSpeed(4000)
|
||||
T0584 000:161.190 - 0.095ms
|
||||
T0584 000:161.233 JLINK_Connect()
|
||||
T0584 000:163.924
|
||||
***** Error:
|
||||
T0584 000:164.025 Error while evaluating J-Link script file: Error while compiling. Line 34, column 1:
|
||||
}
|
||||
^
|
||||
Missing return statement at the end of non-void function
|
||||
T0584 000:164.303
|
||||
***** Error:
|
||||
T0584 000:164.400 Failed prepare script file
|
||||
T0584 000:164.950 Found SW-DP with ID 0x2BA01477
|
||||
T0584 000:168.174 DPIDR: 0x2BA01477
|
||||
T0584 000:168.233 CoreSight SoC-400 or earlier
|
||||
T0584 000:168.287 Scanning AP map to find all available APs
|
||||
T0584 000:168.799 AP[1]: Stopped AP scan as end of AP map has been reached
|
||||
T0584 000:168.857 AP[0]: APB-AP (IDR: 0x24770002)
|
||||
T0584 000:168.921 Iterating through AP map to find APB-AP to use
|
||||
T0584 000:168.975 AP[0]: APB-AP found
|
||||
T0584 000:183.077 ROMTbl[0][0]: CompAddr: F0A01000 CID: B105900D, PID: 004BBC15 Cortex-R5
|
||||
T0584 000:184.808 Found Cortex-R5 r1p3
|
||||
T0584 000:184.877 4 code breakpoints, 3 data breakpoints
|
||||
T0584 000:184.940 Debug architecture ARMv7.0
|
||||
T0584 000:207.441 Data endian: little
|
||||
T0584 000:211.236 Main ID register: 0x411FC153
|
||||
T0584 000:231.743 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
|
||||
T0584 000:231.815 D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
|
||||
T0584 000:238.432 TCM Type register: 0x00010001
|
||||
T0584 000:242.362 MPU Type register: 0x00001000
|
||||
T0584 000:246.372 System control register:
|
||||
T0584 000:246.448 Instruction endian: little
|
||||
T0584 000:246.503 Level-1 instruction cache disabled
|
||||
T0584 000:246.558 Level-1 data cache disabled
|
||||
T0584 000:246.614 MPU disabled
|
||||
T0584 000:246.668 Branch prediction enabled
|
||||
T0584 000:261.113 -- Max. mem block: 0x00010C40
|
||||
T0584 000:261.298 - 100.064ms returns 0x00
|
||||
T0584 000:261.394 JLINK_GetIdData(pIdData)
|
||||
T0584 000:261.733 pIdData->ScanLen=4
|
||||
T0584 000:261.790 pIdData->NumDevices=1
|
||||
T0584 000:261.852 pIdData->aId[0]=0x2BA01477
|
||||
T0584 000:261.905 pIdData->aIrRead[0]=0
|
||||
T0584 000:261.958 pIdData->aScanLen[0]=4
|
||||
T0584 000:262.012 pIdData->aScanRead[0]=0
|
||||
T0584 000:262.065 - 0.671ms
|
||||
T0584 000:262.111 JLINK_GetMemZones(...)
|
||||
T0584 000:262.148 - 0.037ms returns 2
|
||||
T0584 000:262.189 JLINK_HasError()
|
||||
T0584 000:262.228 JLINK_CORE_GetFound()
|
||||
T0584 000:262.266 - 0.037ms returns 0xC0100FF
|
||||
T0584 000:262.313 JLINK_GetResetTypeDesc
|
||||
T0584 000:262.350 - 0.036ms
|
||||
T0584 000:262.392 JLINK_SetResetDelay(0)
|
||||
T0584 000:262.428 - 0.036ms
|
||||
T0584 000:262.468 JLINK_Reset()
|
||||
T0584 000:392.723
|
||||
***** Warning:
|
||||
T0584 000:392.881 CPU not halted after Reset, halting using Halt request
|
||||
T0584 000:399.763 - 137.287ms
|
||||
T0584 000:400.115 JLINK_Halt()
|
||||
T0584 000:400.239 - 0.122ms returns 0x00
|
||||
T0584 000:400.378 JLINK_GetDeviceFamily
|
||||
T0584 000:400.458 - 0.080ms returns 12
|
||||
T0584 000:400.535 JLINK_CORE_GetFound()
|
||||
T0584 000:400.633 - 0.095ms returns 0xC0100FF
|
||||
T0584 000:400.778 JLINK_ReadRegs(NumRegs = 17, Indexes: 9, 8, 0, 1, 2, 3, 4, 5, 6, 7, 74, 75, 76, 77, 78, 79, 80)
|
||||
T0584 000:403.363 -- R15 (PC)=0x3D080, CPSR=0x197, R0=0x10000000, R1=0x1143540C, R2=0x03, R3=0x36D, R4=0x5AA5F00F, R5=0xA55A0FF0, R6=0x5AA5F00F, R7=0x190FF70, R8=0x5AA5F00F, R9=0x7C003C, R10=0x00, R11=0x190FF6C, R12=0x00, R13=0x1910000, R14=0x40104
|
||||
T0584 000:403.539 - 2.761ms returns 0x00
|
||||
T0584 000:403.669 JLINK_ReadRegs(NumRegs = 7, Indexes: 10, 11, 12, 13, 14, 15, 16)
|
||||
T0584 000:403.812 -- R8_USR=0x5AA5F00F, R9_USR=0x7C003C, R10_USR=0x00, R11_USR=0x190FF6C, R12_USR=0x00, R13_USR=0x3FB8E8, R14_USR=0x3FB8E9
|
||||
T0584 000:403.974 - 0.304ms returns 0x00
|
||||
T0584 000:404.059 JLINK_ReadRegs(NumRegs = 8, Indexes: 18, 19, 20, 21, 22, 23, 24, 17)
|
||||
T0584 000:405.940 -- R8_FIQ=0x00, R9_FIQ=0x00, R10_FIQ=0x00, R11_FIQ=0x00, R12_FIQ=0x00, R13_FIQ=0x1910000, R14_FIQ=0x00, SPSR_FIQ=0x1D3
|
||||
T0584 000:406.384 - 2.320ms returns 0x00
|
||||
T0584 000:406.485 JLINK_ReadRegs(NumRegs = 3, Indexes: 32, 33, 31)
|
||||
T0584 000:407.579 -- R13_IRQ=0x1910000, R14_IRQ=0x00, SPSR_IRQ=0x1D3
|
||||
T0584 000:407.700 - 1.214ms returns 0x00
|
||||
T0584 000:407.802 JLINK_ReadRegs(NumRegs = 3, Indexes: 26, 27, 25)
|
||||
T0584 000:408.723 -- R13_SVC=0x190FF58, R14_SVC=0x190703C, SPSR_SVC=0x1D3
|
||||
T0584 000:408.888 - 1.085ms returns 0x00
|
||||
T0584 000:408.994 JLINK_ReadRegs(NumRegs = 3, Indexes: 29, 30, 28)
|
||||
T0584 000:409.073 -- R13_ABT=0x1910000, R14_ABT=0x40104, SPSR_ABT=0x197
|
||||
T0584 000:409.185 - 0.190ms returns 0x00
|
||||
T0584 000:409.262 JLINK_ReadRegs(NumRegs = 3, Indexes: 35, 36, 34)
|
||||
T0584 000:410.534 -- R13_UND=0x1910000, R14_UND=0x00, SPSR_UND=0x1D3
|
||||
T0584 000:410.676 - 1.413ms returns 0x00
|
||||
T0584 000:410.809 JLINK_CP15_WriteEx(CRn = 1, CRm = 0, op1 = 0, op2 = 0, Data = 0x08E7087A)
|
||||
T0584 000:418.158 - 7.349ms returns 0
|
||||
T0584 000:418.278 JLINK_CP15_WriteEx(CRn = 1, CRm = 0, op1 = 0, op2 = 1, Data = 0x00000020)
|
||||
T0584 000:423.940 - 5.661ms returns 0
|
||||
T0584 000:424.053 JLINK_CP15_WriteEx(CRn = 9, CRm = 1, op1 = 0, op2 = 1, Data = 0x003E0001)
|
||||
T0584 000:429.725 - 5.671ms returns 0
|
||||
T0584 000:429.921 JLINK_CP15_WriteEx(CRn = 9, CRm = 1, op1 = 0, op2 = 0, Data = 0x003F0001)
|
||||
T0584 000:435.892 - 5.970ms returns 0
|
||||
T0584 000:436.025 JLINK_IsOpen()
|
||||
T0584 000:436.102 - 0.076ms returns 0x01
|
||||
T0584 000:446.409 JLINK_Close()
|
||||
T0584 000:463.521 - 17.110ms
|
||||
T0584 000:463.653
|
||||
T0584 000:463.785 Closed
|
||||
T4594 000:193.475 SEGGER J-Link V7.98a Log File
|
||||
T4594 000:193.866 DLL Compiled: Jul 19 2024 15:01:03
|
||||
T4594 000:193.965 Logging started @ 2024-07-28 11:37
|
||||
T4594 000:194.062 Process: C:\Program Files\SEGGER\JLink_V798a\JFlash.exe
|
||||
T4594 000:194.192 - 194.185ms
|
||||
T4594 000:194.346 JLINK_SelectUSB(Port = 0)
|
||||
T4594 000:200.677 - 6.329ms returns 0
|
||||
T4594 000:200.837 JLINK_OpenEx(...)
|
||||
T4594 000:207.719 Firmware: J-Link V9 compiled May 7 2021 16:26:12
|
||||
T4594 000:208.948 Firmware: J-Link V9 compiled May 7 2021 16:26:12
|
||||
T4594 000:209.283 Decompressing FW timestamp took 135 us
|
||||
T4594 000:214.933 Hardware: V9.40
|
||||
T4594 000:215.251 S/N: 59406426
|
||||
T4594 000:215.305 OEM: SEGGER
|
||||
T4594 000:215.359 Feature(s): RDI, GDB, FlashDL, FlashBP, JFlash
|
||||
T4594 000:215.963 Bootloader: (Could not read)
|
||||
T4594 000:216.687 TELNET listener socket opened on port 19021
|
||||
T4594 000:217.004 WEBSRV WEBSRV_Init(): Starting webserver thread(s)
|
||||
T4594 000:217.166 WEBSRV Webserver running on local port 19080
|
||||
T4594 000:217.461 Looking for J-Link GUI Server exe at: C:\Program Files\SEGGER\JLink_V798a\JLinkGUIServer.exe
|
||||
T4594 000:217.562 Forking J-Link GUI Server: C:\Program Files\SEGGER\JLink_V798a\JLinkGUIServer.exe
|
||||
T4594 000:229.506 J-Link GUI Server info: "J-Link GUI server V7.98a "
|
||||
T4594 000:229.918 - 29.073ms returns "O.K."
|
||||
T4594 000:229.999 JLINK_GetFirmwareString(...)
|
||||
T4594 000:230.057 - 0.060ms
|
||||
T4594 000:230.115 JLINK_GetSN()
|
||||
T4594 000:230.165 - 0.052ms returns 59406426
|
||||
T4594 000:230.324 JLINK_TIF_Select(JLINKARM_TIF_SWD)
|
||||
T4594 000:230.912 - 0.583ms returns 0x00
|
||||
T4594 000:230.982 JLINK_EMU_GetProductId()
|
||||
T4594 000:231.039 - 0.057ms
|
||||
T4594 000:233.799 JLINK_CORE_Select(0xC0100FF == Cortex-R5)
|
||||
T4594 000:233.890 - 0.092ms
|
||||
T4594 000:233.953 JLINK_ExecCommand("Device = E3640_HYPERFLASH", ...).
|
||||
T4594 000:236.162 Flash bank @ 0x00000000: SFL: Parsing sectorization info from ELF file
|
||||
T4594 000:236.259 FlashDevice.SectorInfo[0]: .SectorSize = 0x00040000, .SectorStartAddr = 0x00000000
|
||||
T4594 000:236.376 OFL: Init() present @ offset 0x0000D691
|
||||
T4594 000:236.466 OFL: UnInit() present @ offset 0x0000D6F3
|
||||
T4594 000:236.554 OFL: EraseSector() present @ offset 0x0000D703
|
||||
T4594 000:236.801 OFL: ProgramPage() present @ offset 0x0000D741
|
||||
T4594 000:236.976 OFL: EraseChip() present @ offset 0x0000D967
|
||||
T4594 000:237.110 OFL: BlankCheck() present @ offset 0x0000D7A5
|
||||
T4594 000:237.244 OFL: Verify() N/A
|
||||
T4594 000:237.451 OFL: SEGGER_FL_Erase() N/A
|
||||
T4594 000:237.603 OFL: SEGGER_OPEN_Erase() present @ offset 0x0000D9F1
|
||||
T4594 000:237.914 OFL: SEGGER_FL_Program() N/A
|
||||
T4594 000:238.487 OFL: SEGGER_OPEN_Program() present @ offset 0x0000D8D1
|
||||
T4594 000:238.701 OFL: SEGGER_FL_Read() N/A
|
||||
T4594 000:238.798 OFL: SEGGER_OPEN_Read() present @ offset 0x0000D997
|
||||
T4594 000:238.889 OFL: SEGGER_FL_CalcCRC() N/A
|
||||
T4594 000:238.979 OFL: SEGGER_OPEN_CalcCRC() present @ offset 0x0000D84F
|
||||
T4594 000:239.083 OFL: SEGGER_FL_Start() N/A
|
||||
T4594 000:239.764 OFL: SEGGER_OPEN_Start() N/A
|
||||
T4594 000:239.860 OFL: SEGGER_FL_GetFlashInfo() N/A
|
||||
T4594 000:239.957 OFL: SEGGER_OPEN_GetFlashInfo() N/A
|
||||
T4594 000:240.044 OFL: SEGGER_FL_Verify() N/A
|
||||
T4594 000:240.132 OFL: SEGGER_FL_CheckBlank() N/A
|
||||
T4594 000:240.353 OFL: SEGGER_FL_Prepare() N/A
|
||||
T4594 000:240.465 OFL: SEGGER_FL_Restore() N/A
|
||||
T4594 000:240.553 OFL: SEGGER_FL_EraseChip() N/A
|
||||
T4594 000:240.755 OFL var <SEGGER_FL_GoIntEn>: N/A
|
||||
T4594 000:246.886 Device "E3640_HYPERFLASH" selected.
|
||||
T4594 000:250.115 - 16.103ms returns 0x00
|
||||
T4594 000:250.189 JLINK_ExecCommand("ExcludeFlashCacheRange 0x0-0xFFFFFFFF", ...).
|
||||
T4594 000:250.252 - 0.010ms returns 0x00
|
||||
T4594 000:250.304 JLINK_ExecCommand("SetEnableMemCache 0", ...).
|
||||
T4594 000:250.356 - 0.001ms returns 0x01
|
||||
T4594 000:250.407 JLINK_ExecCommand("SetAllowFlashCache 0", ...).
|
||||
T4594 000:250.459 - 0.001ms returns 0x01
|
||||
T4594 000:250.519 JLINK_GetAvailableLicense()
|
||||
T4594 000:260.149 - 9.628ms returns 0x05
|
||||
T4594 000:260.314 JLINK_SetEndian(ARM_ENDIAN_LITTLE)
|
||||
T4594 000:260.371 - 0.057ms returns 0
|
||||
T4594 000:260.539 JLINK_SetSpeed(4000)
|
||||
T4594 000:260.800 - 0.260ms
|
||||
T4594 000:260.868 JLINK_GetSpeed()
|
||||
T4594 000:260.919 - 0.050ms returns 4000
|
||||
T4594 000:260.987 JLINK_GetHWStatus(...)
|
||||
T4594 000:261.227 - 0.244ms returns 0
|
||||
T4594 000:261.291 JLINK_Connect()
|
||||
T4594 000:262.117 Found SW-DP with ID 0x2BA01477
|
||||
T4594 000:265.830 DPIDR: 0x2BA01477
|
||||
T4594 000:265.922 CoreSight SoC-400 or earlier
|
||||
T4594 000:265.998 Scanning AP map to find all available APs
|
||||
T4594 000:266.623 AP[1]: Stopped AP scan as end of AP map has been reached
|
||||
T4594 000:266.708 AP[0]: APB-AP (IDR: 0x24770002)
|
||||
T4594 000:266.789 Iterating through AP map to find APB-AP to use
|
||||
T4594 000:266.868 AP[0]: APB-AP found
|
||||
T4594 000:286.083 ROMTbl[0][0]: CompAddr: F0A01000 CID: B105900D, PID: 004BBC15 Cortex-R5
|
||||
T4594 000:287.791 Found Cortex-R5 r1p3
|
||||
T4594 000:287.865 4 code breakpoints, 3 data breakpoints
|
||||
T4594 000:287.919 Debug architecture ARMv7.0
|
||||
T4594 000:310.445 Data endian: little
|
||||
T4594 000:314.354 Main ID register: 0x411FC153
|
||||
T4594 000:418.507
|
||||
***** Error:
|
||||
T4594 000:418.584 Timeout while reading DCC data
|
||||
T4594 000:519.481
|
||||
***** Error:
|
||||
T4594 000:519.562 Timeout while reading DCC data
|
||||
T4594 000:519.627 I-Cache L1: 0 KB, 1 Sets, 16 Bytes/Line, 1-Way
|
||||
T4594 000:519.682 D-Cache L1: 0 KB, 1 Sets, 16 Bytes/Line, 1-Way
|
||||
T4594 000:620.432
|
||||
***** Error:
|
||||
T4594 000:620.513 Timeout while reading DCC data
|
||||
T4594 000:620.571 D-Cache L2: 0 KB, 1 Sets, 16 Bytes/Line, 1-Way
|
||||
T4594 000:721.352
|
||||
***** Error:
|
||||
T4594 000:721.433 Timeout while reading DCC data
|
||||
T4594 000:822.369
|
||||
***** Error:
|
||||
T4594 000:822.456 Timeout while reading DCC data
|
||||
T4594 000:822.523 L3 (unknown cache type)
|
||||
T4594 000:923.212
|
||||
***** Error:
|
||||
T4594 000:923.293 Timeout while reading DCC data
|
||||
T4594 000:923.350 TCM Type register: 0x00208FE0
|
||||
T4594 001:023.283
|
||||
***** Error:
|
||||
T4594 001:023.364 Timeout while reading DCC data
|
||||
T4594 001:023.421 MPU Type register: 0x00208FE0
|
||||
T4594 001:124.248
|
||||
***** Error:
|
||||
T4594 001:124.635 Timeout while reading DCC data
|
||||
T4594 001:124.713 System control register:
|
||||
T4594 001:124.786 Instruction endian: little
|
||||
T4594 001:124.858 Level-1 instruction cache disabled
|
||||
T4594 001:124.928 Level-1 data cache disabled
|
||||
T4594 001:125.002 MPU disabled
|
||||
T4594 001:125.056 Branch prediction enabled
|
||||
T4594 001:130.458 -- Max. mem block: 0x00010C40
|
||||
T4594 001:130.624 - 869.332ms returns 0x00
|
||||
T4594 001:130.841 JLINK_Halt()
|
||||
T4594 001:133.246 - 2.405ms returns 0x00
|
||||
T4594 001:133.305 JLINK_SetSpeed(4000)
|
||||
T4594 001:133.393 - 0.088ms
|
||||
T4594 001:133.435 JLINK_GetSpeed()
|
||||
T4594 001:133.472 - 0.036ms returns 4000
|
||||
T4594 001:139.476 JLINK_Close()
|
||||
T4594 001:154.682 - 15.204ms
|
||||
T4594 001:154.764
|
||||
T4594 001:154.816 Closed
|
||||
T2988 000:187.790 SEGGER J-Link V7.98a Log File
|
||||
T2988 000:188.080 DLL Compiled: Jul 19 2024 15:01:03
|
||||
T2988 000:188.170 Logging started @ 2024-07-28 11:37
|
||||
T2988 000:188.289 Process: C:\Program Files\SEGGER\JLink_V798a\JFlash.exe
|
||||
T2988 000:188.427 - 188.421ms
|
||||
T2988 000:188.610 JLINK_SelectUSB(Port = 0)
|
||||
T2988 000:195.304 - 6.701ms returns 0
|
||||
T2988 000:195.463 JLINK_OpenEx(...)
|
||||
T2988 000:202.342 Firmware: J-Link V9 compiled May 7 2021 16:26:12
|
||||
T2988 000:203.130 Firmware: J-Link V9 compiled May 7 2021 16:26:12
|
||||
T2988 000:203.438 Decompressing FW timestamp took 131 us
|
||||
T2988 000:209.162 Hardware: V9.40
|
||||
T2988 000:209.506 S/N: 59406426
|
||||
T2988 000:209.561 OEM: SEGGER
|
||||
T2988 000:209.615 Feature(s): RDI, GDB, FlashDL, FlashBP, JFlash
|
||||
T2988 000:210.210 Bootloader: (Could not read)
|
||||
T2988 000:210.910 TELNET listener socket opened on port 19021
|
||||
T2988 000:211.212 WEBSRV WEBSRV_Init(): Starting webserver thread(s)
|
||||
T2988 000:211.393 WEBSRV Webserver running on local port 19080
|
||||
T2988 000:211.684 Looking for J-Link GUI Server exe at: C:\Program Files\SEGGER\JLink_V798a\JLinkGUIServer.exe
|
||||
T2988 000:211.785 Forking J-Link GUI Server: C:\Program Files\SEGGER\JLink_V798a\JLinkGUIServer.exe
|
||||
T2988 000:224.603 J-Link GUI Server info: "J-Link GUI server V7.98a "
|
||||
T2988 000:225.008 - 29.539ms returns "O.K."
|
||||
T2988 000:225.096 JLINK_GetFirmwareString(...)
|
||||
T2988 000:225.158 - 0.065ms
|
||||
T2988 000:225.216 JLINK_GetSN()
|
||||
T2988 000:225.267 - 0.054ms returns 59406426
|
||||
T2988 000:225.426 JLINK_TIF_Select(JLINKARM_TIF_SWD)
|
||||
T2988 000:225.996 - 0.568ms returns 0x00
|
||||
T2988 000:226.053 JLINK_EMU_GetProductId()
|
||||
T2988 000:226.101 - 0.047ms
|
||||
T2988 000:228.956 JLINK_CORE_Select(0xC0100FF == Cortex-R5)
|
||||
T2988 000:229.040 - 0.085ms
|
||||
T2988 000:229.099 JLINK_ExecCommand("Device = E3640_HYPERFLASH", ...).
|
||||
T2988 000:230.981 Flash bank @ 0x00000000: SFL: Parsing sectorization info from ELF file
|
||||
T2988 000:231.076 FlashDevice.SectorInfo[0]: .SectorSize = 0x00040000, .SectorStartAddr = 0x00000000
|
||||
T2988 000:231.199 OFL: Init() present @ offset 0x0000D691
|
||||
T2988 000:231.295 OFL: UnInit() present @ offset 0x0000D6F3
|
||||
T2988 000:231.389 OFL: EraseSector() present @ offset 0x0000D703
|
||||
T2988 000:231.475 OFL: ProgramPage() present @ offset 0x0000D741
|
||||
T2988 000:231.588 OFL: EraseChip() present @ offset 0x0000D967
|
||||
T2988 000:231.691 OFL: BlankCheck() present @ offset 0x0000D7A5
|
||||
T2988 000:231.789 OFL: Verify() N/A
|
||||
T2988 000:231.907 OFL: SEGGER_FL_Erase() N/A
|
||||
T2988 000:231.997 OFL: SEGGER_OPEN_Erase() present @ offset 0x0000D9F1
|
||||
T2988 000:232.099 OFL: SEGGER_FL_Program() N/A
|
||||
T2988 000:232.218 OFL: SEGGER_OPEN_Program() present @ offset 0x0000D8D1
|
||||
T2988 000:232.308 OFL: SEGGER_FL_Read() N/A
|
||||
T2988 000:232.394 OFL: SEGGER_OPEN_Read() present @ offset 0x0000D997
|
||||
T2988 000:232.545 OFL: SEGGER_FL_CalcCRC() N/A
|
||||
T2988 000:232.678 OFL: SEGGER_OPEN_CalcCRC() present @ offset 0x0000D84F
|
||||
T2988 000:232.764 OFL: SEGGER_FL_Start() N/A
|
||||
T2988 000:232.851 OFL: SEGGER_OPEN_Start() N/A
|
||||
T2988 000:232.939 OFL: SEGGER_FL_GetFlashInfo() N/A
|
||||
T2988 000:233.031 OFL: SEGGER_OPEN_GetFlashInfo() N/A
|
||||
T2988 000:233.136 OFL: SEGGER_FL_Verify() N/A
|
||||
T2988 000:233.233 OFL: SEGGER_FL_CheckBlank() N/A
|
||||
T2988 000:233.356 OFL: SEGGER_FL_Prepare() N/A
|
||||
T2988 000:233.540 OFL: SEGGER_FL_Restore() N/A
|
||||
T2988 000:233.650 OFL: SEGGER_FL_EraseChip() N/A
|
||||
T2988 000:233.749 OFL var <SEGGER_FL_GoIntEn>: N/A
|
||||
T2988 000:238.922 Device "E3640_HYPERFLASH" selected.
|
||||
T2988 000:242.335 - 13.179ms returns 0x00
|
||||
T2988 000:242.402 JLINK_ExecCommand("ExcludeFlashCacheRange 0x0-0xFFFFFFFF", ...).
|
||||
T2988 000:242.464 - 0.009ms returns 0x00
|
||||
T2988 000:242.516 JLINK_ExecCommand("SetEnableMemCache 0", ...).
|
||||
T2988 000:242.574 - 0.002ms returns 0x01
|
||||
T2988 000:242.629 JLINK_ExecCommand("SetAllowFlashCache 0", ...).
|
||||
T2988 000:242.679 - 0.001ms returns 0x01
|
||||
T2988 000:242.742 JLINK_GetAvailableLicense()
|
||||
T2988 000:250.927 - 8.184ms returns 0x05
|
||||
T2988 000:251.026 JLINK_SetEndian(ARM_ENDIAN_LITTLE)
|
||||
T2988 000:251.069 - 0.043ms returns 0
|
||||
T2988 000:251.196 JLINK_SetSpeed(4000)
|
||||
T2988 000:251.381 - 0.184ms
|
||||
T2988 000:251.448 JLINK_GetSpeed()
|
||||
T2988 000:251.498 - 0.049ms returns 4000
|
||||
T2988 000:251.563 JLINK_GetHWStatus(...)
|
||||
T2988 000:251.775 - 0.214ms returns 0
|
||||
T2988 000:251.832 JLINK_Connect()
|
||||
T2988 000:252.624 Found SW-DP with ID 0x2BA01477
|
||||
T2988 000:255.901 DPIDR: 0x2BA01477
|
||||
T2988 000:255.971 CoreSight SoC-400 or earlier
|
||||
T2988 000:256.025 Scanning AP map to find all available APs
|
||||
T2988 000:256.552 AP[1]: Stopped AP scan as end of AP map has been reached
|
||||
T2988 000:256.614 AP[0]: APB-AP (IDR: 0x24770002)
|
||||
T2988 000:256.668 Iterating through AP map to find APB-AP to use
|
||||
T2988 000:256.721 AP[0]: APB-AP found
|
||||
T2988 000:270.422 ROMTbl[0][0]: CompAddr: F0A01000 CID: B105900D, PID: 004BBC15 Cortex-R5
|
||||
T2988 000:272.116 Found Cortex-R5 r1p3
|
||||
T2988 000:272.178 4 code breakpoints, 3 data breakpoints
|
||||
T2988 000:272.233 Debug architecture ARMv7.0
|
||||
T2988 000:293.329 Data endian: little
|
||||
T2988 000:297.449 Main ID register: 0x411FC153
|
||||
T2988 000:414.311
|
||||
***** Error:
|
||||
T2988 000:414.443 Timeout while reading DCC data
|
||||
T2988 000:414.535 I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
|
||||
T2988 000:414.611 D-Cache L1: 0 KB, 1 Sets, 16 Bytes/Line, 1-Way
|
||||
T2988 000:516.116
|
||||
***** Error:
|
||||
T2988 000:516.198 Timeout while reading DCC data
|
||||
T2988 000:516.255 TCM Type register: 0x01240000
|
||||
T2988 000:617.469
|
||||
***** Error:
|
||||
T2988 000:617.692 Timeout while reading DCC data
|
||||
T2988 000:617.764 MPU Type register: 0x01240000
|
||||
T2988 000:717.987
|
||||
***** Error:
|
||||
T2988 000:718.067 Timeout while reading DCC data
|
||||
T2988 000:718.123 System control register:
|
||||
T2988 000:718.177 Instruction endian: little
|
||||
T2988 000:718.230 Level-1 instruction cache disabled
|
||||
T2988 000:718.283 Level-1 data cache disabled
|
||||
T2988 000:718.336 MPU disabled
|
||||
T2988 000:718.390 Branch prediction disabled
|
||||
T2988 000:723.415 -- Max. mem block: 0x00010C40
|
||||
T2988 000:723.587 - 471.754ms returns 0x00
|
||||
T2988 000:723.823 JLINK_Halt()
|
||||
T2988 000:726.348 - 2.524ms returns 0x00
|
||||
T2988 000:726.413 JLINK_SetSpeed(4000)
|
||||
T2988 000:726.503 - 0.090ms
|
||||
T2988 000:726.546 JLINK_GetSpeed()
|
||||
T2988 000:726.582 - 0.035ms returns 4000
|
||||
T2988 000:736.298 JLINK_Close()
|
||||
T2988 000:743.166 - 6.867ms
|
||||
T2988 000:743.251
|
||||
T2988 000:743.304 Closed
|
||||
53
devices/script/JFLASH/SemiDrive.JLinkScript
Normal file
53
devices/script/JFLASH/SemiDrive.JLinkScript
Normal file
@@ -0,0 +1,53 @@
|
||||
/*********************************************************************
|
||||
* SEGGER Microcontroller GmbH *
|
||||
* Solutions for real time microcontroller applications *
|
||||
**********************************************************************
|
||||
* *
|
||||
* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
|
||||
* *
|
||||
* Internet: www.segger.com Support: support@segger.com *
|
||||
* *
|
||||
**********************************************************************
|
||||
----------------------------------------------------------------------
|
||||
Purpose :
|
||||
---------------------------END-OF-HEADER------------------------------
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ResetTarget
|
||||
*/
|
||||
//void ResetTarget(void) {
|
||||
// In case cores 1-3 are reset, we do nothing,
|
||||
// as we would lose connection to these cores, when resetting the device
|
||||
// as a reset disables the clock to them.
|
||||
//}
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* InitTarget
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
JLINK_SYS_Report("----------JLinkScript ConfigTargetSettings----------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2081000;
|
||||
}
|
||||
|
||||
//static void disable_watchdog(U32 Addr) {
|
||||
// int ret;
|
||||
// ret = JLINK_MEM_ReadU32(Addr);
|
||||
// ret = ret & (~2);
|
||||
// JLINK_MEM_WriteU32(Addr, ret);
|
||||
//}
|
||||
//
|
||||
//int AfterResetTarget(void){
|
||||
// JLINK_SYS_Report("----------JLinkScript AfterResetTarget----------");
|
||||
// disable_watchdog(0xF07E0000);
|
||||
// disable_watchdog(0xF07F0000);
|
||||
// disable_watchdog(0xF2100000);
|
||||
// disable_watchdog(0xF2110000);
|
||||
// disable_watchdog(0xF0BE0000);
|
||||
// disable_watchdog(0xF0BF0000);
|
||||
// disable_watchdog(0xF31F0000);
|
||||
// return 0;
|
||||
//}
|
||||
78
devices/script/JFLASH/SemiDrive.jflash
Normal file
78
devices/script/JFLASH/SemiDrive.jflash
Normal file
@@ -0,0 +1,78 @@
|
||||
AppVersion = 75604
|
||||
FileVersion = 2
|
||||
[GENERAL]
|
||||
aATEModuleSel[24] = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
ConnectMode = 0
|
||||
CurrentFile = ""
|
||||
DataFileSAddr = 0x00000000
|
||||
GUIMode = 0
|
||||
HostName = ""
|
||||
TargetIF = 1
|
||||
USBPort = 0
|
||||
USBSerialNo = 0x00000000
|
||||
UseATEModuleSelection = 0
|
||||
[JTAG]
|
||||
IRLen = 0
|
||||
MultipleTargets = 0
|
||||
NumDevices = 0
|
||||
Speed0 = 4000
|
||||
Speed1 = 4000
|
||||
TAP_Number = 0
|
||||
UseAdaptive0 = 0
|
||||
UseAdaptive1 = 0
|
||||
UseMaxSpeed0 = 0
|
||||
UseMaxSpeed1 = 0
|
||||
[CPU]
|
||||
NumInitSteps = 0
|
||||
NumExitSteps = 0
|
||||
UseScriptFile = 0
|
||||
ScriptFile = ""
|
||||
UseRAM = 1
|
||||
RAMAddr = 0x003E0000
|
||||
RAMSize = 0x00060000
|
||||
CheckCoreID = 0
|
||||
CoreID = 0x00000000
|
||||
CoreIDMask = 0x0F000FFF
|
||||
UseAutoSpeed = 0x00000001
|
||||
ClockSpeed = 0x00000000
|
||||
EndianMode = 0
|
||||
ChipName = "E3640_HYPERFLASH"
|
||||
[FLASH]
|
||||
aRangeSel[1] = 0-8191
|
||||
BankName = "OSPI Flash"
|
||||
BankSelMode = 1
|
||||
BaseAddr = 0x10000000
|
||||
NumBanks = 1
|
||||
[PRODUCTION]
|
||||
AutoPerformsDisconnect = 0
|
||||
AutoPerformsErase = 1
|
||||
AutoPerformsProgram = 1
|
||||
AutoPerformsSecure = 0
|
||||
AutoPerformsStartApp = 0
|
||||
AutoPerformsUnsecure = 0
|
||||
AutoPerformsVerify = 1
|
||||
EnableFixedVTref = 0
|
||||
EnableTargetPower = 0
|
||||
EraseType = 1
|
||||
FixedVTref = 0x00000CE4
|
||||
MonitorVTref = 1
|
||||
MonitorVTrefMax = 0x0000157C
|
||||
MonitorVTrefMin = 0x000003E8
|
||||
OverrideTimeouts = 0
|
||||
ProgramSN = 0
|
||||
SerialFile = ""
|
||||
SNAddr = 0x00000000
|
||||
SNInc = 0x00000001
|
||||
SNLen = 0x00000004
|
||||
SNListFile = ""
|
||||
SNValue = 0x00000001
|
||||
StartAppType = 0
|
||||
TargetPowerDelay = 0x00000014
|
||||
TimeoutErase = 0x00003A98
|
||||
TimeoutProgram = 0x00002710
|
||||
TimeoutVerify = 0x00002710
|
||||
VerifyType = 1
|
||||
[PERFORMANCE]
|
||||
DisableSkipBlankDataOnProgram = 0x00000000
|
||||
PerfromBlankCheckPriorEraseChip = 0x00000001
|
||||
PerfromBlankCheckPriorEraseSelectedSectors = 0x00000000
|
||||
282
devices/script/JFLASH/jflash.bat
Normal file
282
devices/script/JFLASH/jflash.bat
Normal file
@@ -0,0 +1,282 @@
|
||||
@echo off
|
||||
@REM chcp 65001
|
||||
setlocal EnableDelayedExpansion
|
||||
|
||||
|
||||
|
||||
@REM 配置路径
|
||||
set JLinkPathName="C:\Program Files\SEGGER\JLink_V798a\JLink.exe"
|
||||
set JFlashPathName="C:\Program Files\SEGGER\JLink_V798a\JFlash.exe"
|
||||
set device="E3106_NORFLASH"
|
||||
|
||||
@REM E3:=0x3E0001/0x3F0001 E3L:0x4E0001/0x4F0001
|
||||
set TCMBConfig=0x3E0001
|
||||
set TCMAConfig=0x3F0001
|
||||
|
||||
@REM 可不修改
|
||||
set JFlashLogPathName="%cd%\JFlash.log"
|
||||
set JLinkARMLogPathName="%cd%\JLinkARM.log"
|
||||
set JFlashProjPathName="%cd%\SemiDrive.jflash"
|
||||
set JLinkScriptPathName="%cd%\SemiDrive.JLinkScript"
|
||||
|
||||
|
||||
|
||||
call :PREPROCESS_BEFORE_DOWNLOAD
|
||||
|
||||
|
||||
|
||||
@REM ================================================================================================================================================
|
||||
@REM norflash 下载
|
||||
@REM ================================================================================================================================================
|
||||
|
||||
set flash_folder=E3106_NORFLASH
|
||||
|
||||
@REM @REM sfs和rfd在一个扇区，需merge再download
|
||||
set DownloadFilePathName="%cd%\%flash_folder%\sfs.bin"
|
||||
set DownloadFileAddr=0x10000000
|
||||
set MergeFilePathName="%cd%\%flash_folder%\rfd.bin"
|
||||
set MergeFileAddr=0x100000F0
|
||||
call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr% %MergeFilePathName% %MergeFileAddr%
|
||||
|
||||
set DownloadFilePathName="%cd%\%flash_folder%\boot0.bin"
|
||||
set DownloadFileAddr=0x10010000
|
||||
call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\boot1.bin"
|
||||
@REM set DownloadFileAddr=0x10407000
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\boot2.bin"
|
||||
@REM set DownloadFileAddr=0x10807000
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\0x140000.bin"
|
||||
@REM set DownloadFileAddr=0x10140000
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
echo Download Done
|
||||
pause
|
||||
|
||||
|
||||
|
||||
@REM ================================================================================================================================================
|
||||
@REM hyperflash 下载
|
||||
@REM ================================================================================================================================================
|
||||
|
||||
REM set flash_folder=E3106_NORFLASH
|
||||
|
||||
@REM @REM sfs和rfd在一个扇区，需merge再download
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\sfs.bin"
|
||||
@REM set DownloadFileAddr=0x10000000
|
||||
@REM set MergeFilePathName="%cd%\%flash_folder%\rfd.bin"
|
||||
@REM set MergeFileAddr=0x100000F0
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr% %MergeFilePathName% %MergeFileAddr%
|
||||
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\boot0.bin"
|
||||
@REM set DownloadFileAddr=0x100C0000
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\boot1.bin"
|
||||
@REM set DownloadFileAddr=0x104C0000
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\boot2.bin"
|
||||
@REM set DownloadFileAddr=0x108C0000
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
@REM set DownloadFilePathName="%cd%\%flash_folder%\0x140000.bin"
|
||||
@REM set DownloadFileAddr=0x10140000
|
||||
@REM call :JFlash_EXE %DownloadFilePathName% %DownloadFileAddr%
|
||||
|
||||
@REM echo Download Done
|
||||
@REM pause
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@REM ================================================================================================================================================
|
||||
@REM 自定义函数
|
||||
@REM ================================================================================================================================================
|
||||
|
||||
@REM JFlash_EXE <DownloadFilePathName> <Address> [<MergeFilePathName> <Address>]
|
||||
@REM 执行jflash
|
||||
:JFlash_EXE
|
||||
SETLOCAL
|
||||
call :DEL_FILE_IF_EXIST jflashlog_tmp.txt
|
||||
call :DEL_FILE_IF_EXIST jlinklog_tmp.txt
|
||||
if exist "%~1" (
|
||||
set DownloadFile=%~1,%~2
|
||||
if "%~3" equ "" (
|
||||
start /min /wait "J-Flash" %JFlashPathName% ^
|
||||
-openprj%JFlashProjPathName% ^
|
||||
-open"!DownloadFile!" ^
|
||||
-jflashlog"jflashlog_tmp.txt" ^
|
||||
-jlinklog"jlinklog_tmp.txt" ^
|
||||
-auto ^
|
||||
-exit
|
||||
if ERRORLEVEL 1 goto ERROR
|
||||
) else (
|
||||
if exist "%~3" (
|
||||
set MergeFile=%~3,%~4
|
||||
start /min /wait "J-Flash" %JFlashPathName% ^
|
||||
-openprj%JFlashProjPathName% ^
|
||||
-open"!DownloadFile!" ^
|
||||
-jflashlog"jflashlog_tmp.txt" ^
|
||||
-jlinklog"jlinklog_tmp.txt" ^
|
||||
-merge"!MergeFile!" ^
|
||||
-auto ^
|
||||
-exit
|
||||
if ERRORLEVEL 1 goto ERROR
|
||||
) else (
|
||||
echo %~3 Not Exist
|
||||
goto END
|
||||
)
|
||||
)
|
||||
|
||||
echo !DownloadFile! Download Succeed
|
||||
if "!MergeFile!" neq "" echo !MergeFile! Download Succeed
|
||||
|
||||
goto DONE
|
||||
|
||||
) else (
|
||||
echo %~1 Not Exist
|
||||
goto END
|
||||
)
|
||||
:ERROR
|
||||
echo !DownloadFile! Download Failed
|
||||
if "!MergeFile!" neq "" echo !MergeFile! Download Failed
|
||||
type jflashlog_tmp.txt >> %JFlashLogPathName%
|
||||
type jlinklog_tmp.txt >> %JLinkARMLogPathName%
|
||||
del jflashlog_tmp.txt
|
||||
del jlinklog_tmp.txt
|
||||
exit /b 1
|
||||
:DONE
|
||||
type jflashlog_tmp.txt >> %JFlashLogPathName%
|
||||
type jlinklog_tmp.txt >> %JLinkARMLogPathName%
|
||||
del jflashlog_tmp.txt
|
||||
del jlinklog_tmp.txt
|
||||
:END
|
||||
ENDLOCAL
|
||||
goto:eof
|
||||
|
||||
|
||||
:DEL_FILE_IF_EXIST
|
||||
if exist %1 (
|
||||
del %1
|
||||
)
|
||||
goto:eof
|
||||
|
||||
|
||||
:PREPROCESS_BEFORE_DOWNLOAD
|
||||
call :DEL_FILE_IF_EXIST %JFlashLogPathName%
|
||||
call :DEL_FILE_IF_EXIST %JLinkARMLogPathName%
|
||||
call :DEL_FILE_IF_EXIST cmd.txt
|
||||
|
||||
echo r >> cmd.txt
|
||||
echo h >> cmd.txt
|
||||
echo WCP15Ex 0 1 0 0 0x08E7087A >> cmd.txt
|
||||
echo WCP15Ex 0 1 0 1 0x00000020 >> cmd.txt
|
||||
echo WCP15Ex 0 9 1 1 %TCMBConfig% >> cmd.txt
|
||||
echo WCP15Ex 0 9 1 0 %TCMAConfig% >> cmd.txt
|
||||
echo q >> cmd.txt
|
||||
%JLinkPathName% -device %device% -if SWD -speed 4000 -autoconnect 1 -CommandFile cmd.txt -JLinkScriptFile %JLinkScriptPathName% -log %JLinkARMLogPathName% > %JFlashLogPathName%
|
||||
if ERRORLEVEL 1 goto ERROR
|
||||
:ERROR
|
||||
del cmd.txt
|
||||
goto:eof
|
||||
3
devices/script/JFLASH/readme.txt
Normal file
3
devices/script/JFLASH/readme.txt
Normal file
@@ -0,0 +1,3 @@
|
||||
1. 修改SemiDrive.jflash工程文件中的device，例：E3640_HYPERFLASH
|
||||
2. 修改jflash.bat中的路径和device等变量，待下载文件的路径和地址等
|
||||
3. 执行jflash.bat
|
||||
46
devices/script/JLINK/d3/sf.JLinkScript
Normal file
46
devices/script/JLINK/d3/sf.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive D3 SF Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2081000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/d3/sp0.JLinkScript
Normal file
46
devices/script/JLINK/d3/sp0.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive D3 SP0 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2082000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/d3/sp1.JLinkScript
Normal file
46
devices/script/JLINK/d3/sp1.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive D3 SP1 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2083000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/d3/sx0.JLinkScript
Normal file
46
devices/script/JLINK/d3/sx0.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive D3 SX0 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2084000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/d3/sx1.JLinkScript
Normal file
46
devices/script/JLINK/d3/sx1.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive D3 SX1 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2085000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
94
devices/script/JLINK/e3/readme
Normal file
94
devices/script/JLINK/e3/readme
Normal file
@@ -0,0 +1,94 @@
|
||||
## 简介
|
||||
|
||||
介绍通过j-link使用secure debug功能
|
||||
该功能支持JTAG模式，不支持SWD模式
|
||||
芯片匹配debug key成功后开启debug接口
|
||||
|
||||
##硬件连接
|
||||
|
||||
- e3_gateway参考板
|
||||
- Jlink debugger
|
||||
|
||||
##注意事项
|
||||
- 确认板子JTAG功能正常，对于e3 gateway参考板需要去掉TDO/TDI上的两个电阻。
|
||||
- 需要通过fuse工具烧UID,debug key和使能secure debug。
|
||||
- 确认sf.JLinkScript中SetupSecureDebug的操作被打开，默认是关闭的。
|
||||
- IAR工程下 接口如果是SWD,修改为JTAG。
|
||||
- IAR工程下 如果 options->Debugger->Extra Options下没有指定sf.JLinkScript
|
||||
增加command：--jlink_script_file=$PROJ_DIR$\..\..\..\..\..\..\devices\script\JLINK\e3\sf.JLinkScript
|
||||
|
||||
- SES工程下 接口如果是SWD,修改为JTAG。
|
||||
- SES工程下 如果 options->Debug->J-Link->Script File下没有选择sf.JLinkScript
|
||||
则手动指定路径：ssdk\devices\script\JLINK\e3\sf.JLinkScript
|
||||
|
||||
##测试方法
|
||||
当板子以以下方式烧UID,debug key和使能secure debug.
|
||||
Debug Key:
|
||||
+-----------------------+------------+------------------+
|
||||
| name | fuse addr | fuse value |
|
||||
+-----------------------+------------+------------------+
|
||||
| UID[0, 31] | 0x1010 | 0x12345678 |
|
||||
| UID[32, 63] | 0x1014 | 0xABCDEF88 |
|
||||
| SEC_DBG_CFG[31, 0] | 0x1280 | 0x74657374(key0) |
|
||||
| SEC_DBG_CFG[63, 32] | 0x1284 | 0x6b657930(key1) |
|
||||
| MSIC_CFG3/SDBG_MODE | 0x12b0 | 0x00800000 |
|
||||
+-----------------------+------------+------------------+
|
||||
|
||||
IAR下执行attach通过，脚本同时会返回UID，
|
||||
SES下可以通过执行connect确认；
|
||||
提供错误的debug key则无法执行通过。
|
||||
|
||||
##expected log
|
||||
--------------SetupSecureDebug-----------------
|
||||
UID: 0x12345678
|
||||
UID: 0xABCDEF88
|
||||
ID: 0x4BA00477
|
||||
|
||||
##流程说明
|
||||
- 该流程涉及JTAG状态机的转化，instruction和data的传入。
|
||||
- key0, key1对应传入的debug key。v保存读出来的id。
|
||||
- Note: key0 --> SEC_DBG_CFG[31, 0], key1 --> SEC_DBG_CFG[63, 32]!!
|
||||
|
||||
void SetupSecureDebug(void) {
|
||||
int v;
|
||||
int key0;
|
||||
int key1;
|
||||
int cmd;
|
||||
|
||||
cmd = 0xf;
|
||||
key0 = 0x74657374;
|
||||
key1 = 0x6b657930;
|
||||
|
||||
JLINK_SYS_Report("--------------SetupSecureDebug-----------------");
|
||||
JLINK_SelectTIF(JLINK_TIF_JTAG);
|
||||
CPU = CORTEX_R5;
|
||||
|
||||
//prototype:int JLINK_JTAG_Write(U32 tms, U32 tdi, U32 NumBits);
|
||||
JLINK_JTAG_Write(0x1f, 0, 5); // goto Test-Logic Reset state
|
||||
JLINK_JTAG_Write(0x6, 0, 5); //goto shift-ir state
|
||||
JLINK_JTAG_Write(0x8, 0xf, 4); // shift in UID instruction, goto exit1-ir
|
||||
|
||||
JLINK_JTAG_Write(0x3, cmd, 4); //goto shift-dr state
|
||||
|
||||
JLINK_JTAG_Write(0x00000000, 0x0, 32); //shift in 64bit dummy code. shift out our uid
|
||||
v = JLINK_JTAG_GetU32(0);
|
||||
JLINK_SYS_Report1("UID: ", v);
|
||||
JLINK_JTAG_Write(0x80000000, 0x0, 32); //shift in 64bit dummy code. shift out our uid, goto exit1-dr
|
||||
v = JLINK_JTAG_GetU32(0);
|
||||
JLINK_SYS_Report1("UID: ", v);
|
||||
|
||||
JLINK_JTAG_Write(0x1f, 0, 5); // goto Test-Logic Reset state
|
||||
JLINK_JTAG_Write(0x2, 0x0, 4); // goto shift-dr state
|
||||
|
||||
JLINK_JTAG_Write(0x00000000, key0, 32); //shift in the corresponding key
|
||||
JLINK_JTAG_Write(0x80000000, key1, 32); //shift in the corresponding key
|
||||
|
||||
JLINK_JTAG_Write(0x1f, 0, 5); // goto Test-Logic Reset state
|
||||
JLINK_JTAG_Write(0x2, 0x0, 4); // goto shift-dr state
|
||||
|
||||
JLINK_JTAG_Write(0x80000000, 0x0, 32); // shift our IDCODE
|
||||
v = JLINK_JTAG_GetU32(0);
|
||||
JLINK_SYS_Report1("ID: ", v);
|
||||
|
||||
JLINK_JTAG_Write(0x1, 0, 2); // goto idle state
|
||||
}
|
||||
95
devices/script/JLINK/e3/sf.JLinkScript
Normal file
95
devices/script/JLINK/e3/sf.JLinkScript
Normal file
@@ -0,0 +1,95 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive E3 SF Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2081000;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void SetupSecureDebug(void) {
|
||||
int v;
|
||||
int key0;
|
||||
int key1;
|
||||
int cmd;
|
||||
|
||||
cmd = 0xf;
|
||||
key0 = 0x74657374; // key0 --> SEC_DBG_CFG[31, 0]!!
|
||||
key1 = 0x6b657930; // key1 --> SEC_DBG_CFG[63, 32]!!
|
||||
|
||||
JLINK_SYS_Report("--------------SetupSecureDebug-----------------");
|
||||
JLINK_SelectTIF(JLINK_TIF_JTAG);
|
||||
CPU = CORTEX_R5;
|
||||
|
||||
//prototype:int JLINK_JTAG_Write(U32 tms, U32 tdi, U32 NumBits);
|
||||
JLINK_JTAG_Write(0x1f, 0, 5); // goto Test-Logic Reset state
|
||||
JLINK_JTAG_Write(0x6, 0, 5); //goto shift-ir state
|
||||
JLINK_JTAG_Write(0x8, cmd, 4); // shift in UID instruction, goto exit1-ir
|
||||
|
||||
JLINK_JTAG_Write(0x3, 0x0, 4); //goto shift-dr state
|
||||
|
||||
JLINK_JTAG_Write(0x00000000, 0x0, 32); //shift in 64bit dummy code. shift out our uid
|
||||
v = JLINK_JTAG_GetU32(0);
|
||||
JLINK_SYS_Report1("UID: ", v);
|
||||
JLINK_JTAG_Write(0x80000000, 0x0, 32); //shift in 64bit dummy code. shift out our uid, goto exit1-dr
|
||||
v = JLINK_JTAG_GetU32(0);
|
||||
JLINK_SYS_Report1("UID: ", v);
|
||||
|
||||
JLINK_JTAG_Write(0x1f, 0, 5); // goto Test-Logic Reset state
|
||||
JLINK_JTAG_Write(0x2, 0x0, 4); // goto shift-dr state
|
||||
|
||||
JLINK_JTAG_Write(0x00000000, key0, 32); //shift in the corresponding key
|
||||
JLINK_JTAG_Write(0x80000000, key1, 32); //shift in the corresponding key, goto exit1-ir
|
||||
|
||||
JLINK_JTAG_Write(0x1f, 0, 5); // goto Test-Logic Reset state
|
||||
JLINK_JTAG_Write(0x2, 0x0, 4); // goto shift-dr state
|
||||
|
||||
JLINK_JTAG_Write(0x80000000, 0x0, 32); // shift our IDCODE
|
||||
v = JLINK_JTAG_GetU32(0);
|
||||
JLINK_SYS_Report1(" ID: ", v);
|
||||
|
||||
JLINK_JTAG_Write(0x1, 0, 2); // goto idle state
|
||||
}
|
||||
|
||||
void InitTarget(void) {
|
||||
// SetupSecureDebug();
|
||||
}
|
||||
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/e3/sp0.JLinkScript
Normal file
46
devices/script/JLINK/e3/sp0.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive E3 SP0 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2082000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/e3/sp1.JLinkScript
Normal file
46
devices/script/JLINK/e3/sp1.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive E3 SP1 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2083000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/e3/sx0.JLinkScript
Normal file
46
devices/script/JLINK/e3/sx0.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive E3 SX0 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2084000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
46
devices/script/JLINK/e3/sx1.JLinkScript
Normal file
46
devices/script/JLINK/e3/sx1.JLinkScript
Normal file
@@ -0,0 +1,46 @@
|
||||
/*********************************************************************
|
||||
* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
|
||||
* The Embedded Experts *
|
||||
* www.segger.com *
|
||||
**********************************************************************
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Global functions
|
||||
*
|
||||
**********************************************************************
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* ConfigTargetSettings()
|
||||
*
|
||||
* Function description
|
||||
* Called before InitTarget(). Mainly used to set some global DLL variables to customize the normal connect procedure.
|
||||
* For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
|
||||
* that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
|
||||
* May also be used to specify the device name in case debugger does not pass it to the DLL.
|
||||
*
|
||||
* Return value
|
||||
* >= 0 O.K.
|
||||
* < 0 Error
|
||||
*
|
||||
* Notes
|
||||
* (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
|
||||
* (2) Should only set some global DLL variables
|
||||
*/
|
||||
int ConfigTargetSettings(void) {
|
||||
//
|
||||
// Access Port map specfication
|
||||
// Core type
|
||||
// Access Port to use
|
||||
// Specify core base address
|
||||
// Specify CTI base address
|
||||
JLINK_SYS_Report("----------------J-Link script: ConfigTargetSettings() For Semdrive E3 SX1 Cortex-R5---------------");
|
||||
JLINK_CPU = CORTEX_R5;
|
||||
//JLINK_CORESIGHT_IndexAPBAPToUse = 0;
|
||||
JLINK_CORESIGHT_CoreBaseAddr = 0xF2085000;
|
||||
return 0;
|
||||
}
|
||||
/*************************** end of file ****************************/
|
||||
|
||||
286
devices/script/SES/cmd_download.py
Normal file
286
devices/script/SES/cmd_download.py
Normal file
@@ -0,0 +1,286 @@
|
||||
import sys
|
||||
import os
|
||||
import re
|
||||
import subprocess, shlex
|
||||
|
||||
|
||||
|
||||
################################################## download ##################################################
|
||||
def get_sdk_root_path_by_project_path(ProjectPath):
|
||||
Pattern = r'(.*)/boards/'
|
||||
SearchResult = re.search(Pattern, ProjectPath, re.S)
|
||||
if SearchResult != None:
|
||||
return SearchResult.group(1)
|
||||
else:
|
||||
print("Error: correct ssdk root path was not found")
|
||||
sys.exit(1)
|
||||
|
||||
def add_double_quotes(Strings):
|
||||
return '"' + Strings + '"'
|
||||
|
||||
def jlink_exe_file(FilePathName):
|
||||
JlinkCmd = JlinkExe + add_double_quotes(FilePathName)
|
||||
args = shlex.split(JlinkCmd)
|
||||
# subprocess.run(args, check=True, stdout=subprocess.DEVNULL)
|
||||
subprocess.run(args, check=True)
|
||||
|
||||
def download_file(File, Addr):
|
||||
print("loadfile: %s %s" %(File, Addr))
|
||||
CmdFilePathName = ProjectPath + "/cmd.txt"
|
||||
LoadFileString = "LoadFile " + add_double_quotes(File) + " " + Addr + " noreset"
|
||||
ExitString = "q"
|
||||
with open(CmdFilePathName, "w") as f:
|
||||
f.write("h" + "\n")
|
||||
f.write(LoadFileString + "\n")
|
||||
f.write(ExitString)
|
||||
try:
|
||||
jlink_exe_file(CmdFilePathName)
|
||||
os.remove(CmdFilePathName)
|
||||
except Exception as e:
|
||||
os.remove(CmdFilePathName)
|
||||
raise Exception("download error:\n %s" %e)
|
||||
|
||||
def get_download_info_by_project_file(ProjectPathName, FlashType):
|
||||
with open(ProjectPathName, "r", encoding="utf-8") as f:
|
||||
Content = f.read()
|
||||
Pattern = r'(<configuration\s*Name="Download_{0}"(?:(?!<|hidden).)*/>)'.format(FlashType)
|
||||
SearchResult = re.search(Pattern, Content, re.S)
|
||||
if SearchResult != None:
|
||||
return SearchResult.group(1)
|
||||
else:
|
||||
print("Error: no download info find")
|
||||
sys.exit(1)
|
||||
|
||||
def get_multicore_download_info_by_project_file(ProjectPathName, FlashType, Part):
|
||||
with open(ProjectPathName, "r", encoding="utf-8") as f:
|
||||
Content = f.read()
|
||||
Pattern = r'(<configuration\s*Name="(?:Download|Sign)_{0}_Multicore_{1}"(?:(?!<|hidden).)*/>)'.format(FlashType, Part)
|
||||
SearchResultMulticore = re.search(Pattern, Content, re.S)
|
||||
if SearchResultMulticore != None:
|
||||
return SearchResultMulticore.group(1)
|
||||
else:
|
||||
return None
|
||||
|
||||
def get_str_from_download_info(DownloadInfo, FindString):
|
||||
Pattern = FindString + r'="(.*?)"'
|
||||
SearchResult = re.search(Pattern, DownloadInfo, re.S)
|
||||
if SearchResult != None:
|
||||
return SearchResult.group(1)
|
||||
else:
|
||||
return None
|
||||
|
||||
def is_sfs_file(FileName):
|
||||
Pattern = r'sfs_.*'
|
||||
SearchResult = re.search(Pattern, FileName, re.S)
|
||||
if SearchResult != None:
|
||||
return True
|
||||
else:
|
||||
return False
|
||||
|
||||
def is_need_sign(FileName):
|
||||
if is_sfs_file(FileName) == True:
|
||||
return False
|
||||
elif FileName == "sf_signed.bin" or FileName == "sp0_signed.bin" or FileName == "sp1_signed.bin" or FileName == "sx0_signed.bin" or FileName == "sx1_signed.bin":
|
||||
return True
|
||||
elif FileName == "sf.bin" or FileName == "sp0.bin" or FileName == "sp1.bin" or FileName == "sx0.bin" or FileName == "sx1.bin":
|
||||
return False
|
||||
else:
|
||||
print("Error: %s is error file name" %FileName)
|
||||
sys.exit(1)
|
||||
|
||||
def is_need_download(FileName):
|
||||
if is_sfs_file(FileName) == True:
|
||||
return True
|
||||
elif FileName == "sf_signed.bin" or FileName == "sf.bin" or FileName == "sp0.bin" or FileName == "sp1.bin" or FileName == "sx0.bin" or FileName == "sx1.bin":
|
||||
return True
|
||||
elif FileName == "sp0_signed.bin" or FileName == "sp1_signed.bin" or FileName == "sx0_signed.bin" or FileName == "sx1_signed.bin":
|
||||
return False
|
||||
else:
|
||||
print("Error: %s is error file name" %FileName)
|
||||
sys.exit(1)
|
||||
|
||||
def get_unsigned_bin_name(FileName):
|
||||
DictTmp = {'sf_signed.bin':'sf.bin', 'sp0_signed.bin':'sp0.bin', 'sp1_signed.bin':'sp1.bin', 'sx0_signed.bin':'sx0.bin', 'sx1_signed.bin':'sx1.bin'}
|
||||
return DictTmp.get(FileName)
|
||||
|
||||
def gen_info_from_download_info(DownloadInfo, FileString, AddrString):
|
||||
if DownloadInfo == None:
|
||||
return
|
||||
FilePathName = get_str_from_download_info(DownloadInfo, FileString)
|
||||
if FilePathName != None and FilePathName != "":
|
||||
FilePathName = os.path.abspath(FilePathName.replace("$(ProjectDir)", ProjectPath)).replace('\\', '/')
|
||||
FilePath = os.path.dirname(FilePathName)
|
||||
FileName = os.path.basename(FilePathName)
|
||||
if is_need_sign(FileName):
|
||||
# 签名
|
||||
UnsignedBinPathName = FilePath + "/" + get_unsigned_bin_name(FileName)
|
||||
Addr = get_str_from_download_info(DownloadInfo, AddrString)
|
||||
if Addr != None and Addr != "":
|
||||
UnsignedBinAddr = Addr
|
||||
SignInfoDict.update({UnsignedBinPathName:UnsignedBinAddr})
|
||||
if is_need_download(FileName):
|
||||
Addr = get_str_from_download_info(DownloadInfo, AddrString)
|
||||
if Addr != None and Addr != "":
|
||||
DownloadInfoDict.update({FilePathName:Addr})
|
||||
|
||||
def get_sign_and_download_info_by_project_file(ProjectPathName, FlashType, Part):
|
||||
DownloadInfo = get_download_info_by_project_file(ProjectPathName, FlashType)
|
||||
MulticoreDownloadInfo = get_multicore_download_info_by_project_file(ProjectPathName, FlashType, Part)
|
||||
FileString = "debug_additional_load_file"
|
||||
AddrStr = "debug_additional_load_file_address"
|
||||
gen_info_from_download_info(DownloadInfo, FileString, AddrStr)
|
||||
gen_info_from_download_info(MulticoreDownloadInfo, FileString, AddrStr)
|
||||
FileString = "debug_additional_load_file1"
|
||||
AddrStr = "debug_additional_load_file_address1"
|
||||
gen_info_from_download_info(DownloadInfo, FileString, AddrStr)
|
||||
gen_info_from_download_info(MulticoreDownloadInfo, FileString, AddrStr)
|
||||
FileString = "debug_additional_load_file2"
|
||||
AddrStr = "debug_additional_load_file_address2"
|
||||
gen_info_from_download_info(DownloadInfo, FileString, AddrStr)
|
||||
gen_info_from_download_info(MulticoreDownloadInfo, FileString, AddrStr)
|
||||
FileString = "debug_additional_load_file3"
|
||||
AddrStr = "debug_additional_load_file_address3"
|
||||
gen_info_from_download_info(DownloadInfo, FileString, AddrStr)
|
||||
gen_info_from_download_info(MulticoreDownloadInfo, FileString, AddrStr)
|
||||
FileString = "external_build_file_name"
|
||||
AddrStr = "external_load_address"
|
||||
gen_info_from_download_info(DownloadInfo, FileString, AddrStr)
|
||||
gen_info_from_download_info(MulticoreDownloadInfo, FileString, AddrStr)
|
||||
|
||||
def download_file_by_download_info(**DownloadInfoDict):
|
||||
for key, value in DownloadInfoDict.items():
|
||||
if not os.path.exists(key):
|
||||
print("Error: %s does not exist" %key)
|
||||
sys.exit(1)
|
||||
download_file(key, value)
|
||||
|
||||
|
||||
|
||||
################################################## sign ##################################################
|
||||
def get_core_by_pathname(FilePathName):
|
||||
FileName = os.path.basename(FilePathName)
|
||||
DictTmp = {'sf.bin':'0', 'sp0.bin':'2', 'sp1.bin':'3', 'sx0.bin':'4', 'sx1.bin':'5'}
|
||||
return DictTmp.get(FileName)
|
||||
|
||||
def get_entry_by_pathname(FilePathName, PartId):
|
||||
FileName = os.path.basename(FilePathName)
|
||||
if PartId == "E3104" or PartId == "E3106" or PartId == "E3205" or PartId == "E3206":
|
||||
DictTmp = {'sf.bin':'0x504000'}
|
||||
elif PartId == "E3110" or PartId == "E3210" or PartId == "E3340" or PartId == "D3246" or PartId == "D3248":
|
||||
DictTmp = {'sf.bin':'0x404000'}
|
||||
elif PartId == "E3420":
|
||||
DictTmp = {'sf.bin':'0x404000', 'sx0.bin':'0x500000', 'sx1.bin':'0x580000'}
|
||||
elif PartId == "E3430":
|
||||
DictTmp = {'sf.bin':'0x404000', 'sx0.bin':'0x600000', 'sx1.bin':'0x680000'}
|
||||
elif PartId == "E3640" or PartId == "E3648":
|
||||
DictTmp = {'sf.bin':'0x404000', 'sp0.bin':'0x700000', 'sp1.bin':'0x780000', 'sx0.bin':'0x600000', 'sx1.bin':'0x680000'}
|
||||
else:
|
||||
print("Error: %s does not exist" %PartId)
|
||||
sys.exit(1)
|
||||
if DictTmp.get(FileName) == None:
|
||||
print("Error: %s does not exist" %FileName)
|
||||
sys.exit(1)
|
||||
return DictTmp.get(FileName)
|
||||
|
||||
def get_bpt_base_by_part(FlashType):
|
||||
if FlashType == "HYPERFLASH":
|
||||
return 0x100C0000
|
||||
elif FlashType == "NORFLASH":
|
||||
return 0x10007000
|
||||
else:
|
||||
print("Error: FlashType error")
|
||||
sys.exit(1)
|
||||
|
||||
def get_dlp_by_addr(Addr, FlashType):
|
||||
return int((int(Addr, 16) - get_bpt_base_by_part(FlashType)) / 512)
|
||||
|
||||
def get_iib_info_by_sign_info(**SignInfoDict):
|
||||
global SignedBinPathName
|
||||
IIBInfo = ""
|
||||
for key, value in SignInfoDict.items():
|
||||
if not os.path.exists(key):
|
||||
print("Error: %s does not exist" %key)
|
||||
sys.exit(1)
|
||||
if os.path.basename(key) == "sf.bin":
|
||||
SignedBinPathName = add_double_quotes(os.path.dirname(key) + "/sf_signed.bin")
|
||||
IIBInfo += "--iib core=%s type=0x0 image=%s dlp=0x%x to=%s entry=%s\n" % (get_core_by_pathname(key), add_double_quotes(key), get_dlp_by_addr(value, FlashType), get_entry_by_pathname(key, Part), get_entry_by_pathname(key, Part))
|
||||
return IIBInfo
|
||||
|
||||
def sign_file_by_sign_info(**SignInfoDict):
|
||||
SecVer = 0
|
||||
KeyName = "TestRSA2048_ossl.pem"
|
||||
PSN = "0x100"
|
||||
IIBInfo = get_iib_info_by_sign_info(**SignInfoDict)
|
||||
ATB_SIGNER = "./sign_tool/windows/atb_signer.exe"
|
||||
os.chdir(os.path.join(SdkRootPath, "tools", "sdtools"))
|
||||
SignCmd = ATB_SIGNER + " sign --v 2 --sec_ver %s --dgst sha256 --rcp key=sign_tool/keys/%s\n%s--psn %s --of %s" %(SecVer, KeyName, IIBInfo, PSN, SignedBinPathName)
|
||||
print("SignCmd: %s" %SignCmd)
|
||||
print("sign file: %s" %SignedBinPathName)
|
||||
try:
|
||||
args = shlex.split(SignCmd)
|
||||
# subprocess.run(args, check=True, stdout=subprocess.DEVNULL)
|
||||
subprocess.run(args, check=True)
|
||||
except Exception as e:
|
||||
raise Exception("sign error:\n %s" %e)
|
||||
|
||||
|
||||
|
||||
################################################## main ##################################################
|
||||
if __name__ == "__main__":
|
||||
# 处理入参
|
||||
JlinkPath = os.path.abspath(sys.argv[1]).replace('\\', '/')
|
||||
ProjectPathName = os.path.abspath(sys.argv[2]).replace('\\', '/')
|
||||
Part = sys.argv[3]
|
||||
FlashType = sys.argv[4]
|
||||
OperationType = sys.argv[5]
|
||||
|
||||
# 生成需要的变量
|
||||
ProjectPath = os.path.dirname(ProjectPathName)
|
||||
SdkRootPath = get_sdk_root_path_by_project_path(ProjectPath)
|
||||
|
||||
# 如果是ide，进行签名后退出；如果是cmd，签名后继续下载
|
||||
if OperationType == "$(OPS)":
|
||||
OnlySignBin = True
|
||||
elif OperationType == "download":
|
||||
OnlySignBin = False
|
||||
else:
|
||||
print("Error: %s is unsupport operation type" %OperationType)
|
||||
sys.exit(1)
|
||||
|
||||
|
||||
|
||||
SignInfoDict = {}
|
||||
DownloadInfoDict = {}
|
||||
get_sign_and_download_info_by_project_file(ProjectPathName, FlashType, Part)
|
||||
print(SignInfoDict)
|
||||
print(DownloadInfoDict)
|
||||
|
||||
if not SignInfoDict:
|
||||
print("Error: no signed files info found")
|
||||
sys.exit(1)
|
||||
sign_file_by_sign_info(**SignInfoDict)
|
||||
|
||||
# 初始化TCM，擦除Flash
|
||||
if OnlySignBin == False:
|
||||
if not DownloadInfoDict:
|
||||
print("Error: no download files info found")
|
||||
sys.exit(1)
|
||||
DeviceName = Part + "_" + FlashType
|
||||
JlinkPathName = add_double_quotes(JlinkPath + '/JLink.exe')
|
||||
JlinkExe = JlinkPathName + " -device " + DeviceName + " -if SWD -speed 4000 -autoconnect 1 -CommandFile "
|
||||
|
||||
if FlashType == "HYPERFLASH":
|
||||
InitFilePathName = os.path.join(SdkRootPath, "devices", Part, "flashloader", "init_before_download_hyperflash.txt").replace('\\', '/')
|
||||
elif FlashType == "NORFLASH":
|
||||
InitFilePathName = os.path.join(SdkRootPath, "devices", Part, "flashloader", "init_before_download_norflash.txt").replace('\\', '/')
|
||||
else:
|
||||
print("Error: %s is not right type" %FlashType)
|
||||
sys.exit(1)
|
||||
|
||||
print("init tcm and erase flash: %s" %InitFilePathName)
|
||||
try:
|
||||
jlink_exe_file(InitFilePathName)
|
||||
except Exception as e:
|
||||
raise Exception("download error:\n %s" %e)
|
||||
|
||||
download_file_by_download_info(**DownloadInfoDict)
|
||||
12
devices/script/SES/init_before_download.js
Normal file
12
devices/script/SES/init_before_download.js
Normal file
@@ -0,0 +1,12 @@
|
||||
function init_before_download(cmd_file_path_name)
|
||||
{
|
||||
// TargetInterface.message(cmd_file_path_name)
|
||||
var JLinkDir = TargetInterface.expandMacro("$(JLinkDir)");
|
||||
var DeviceName = TargetInterface.expandMacro("$(DeviceName)");
|
||||
var JLinkDir2 = JLinkDir.replace('\\', '/');
|
||||
// TargetInterface.message(JLinkDir2);
|
||||
var cmd = '"' + JLinkDir2 + "/JLink.exe" + '"' + " -device " + DeviceName + " -if SWD -speed 4000 -autoconnect 1 -CommandFile " + '"' + cmd_file_path_name + '"';
|
||||
// TargetInterface.resetAndStop()
|
||||
// TargetInterface.delay(1000)
|
||||
CWSys.run(cmd, true);
|
||||
}
|
||||
104
devices/script/SES/readme.txt
Normal file
104
devices/script/SES/readme.txt
Normal file
@@ -0,0 +1,104 @@
|
||||
一、SES FlashDebug模式使用方法：
|
||||
1. 添加SemiDrive devices。
|
||||
在JLink AppData目录下（常见为C:\Users\Administrator\AppData\Roaming\SEGGER）添加SemiDrive devices。
|
||||
具体方法为：将ssdk\prebuilts\JLinkDevices目录拷贝到Link AppData目录下的SEGGER文件夹内。
|
||||
其中，包含JLinkDevices.xml文件和Devices\SemiDrive文件夹所有芯片Part的Flashloader。
|
||||
|
||||
2. 将Devices信息拷贝到Jlink安装目录（Jlink版本大于V7.62不需要这一步）。
|
||||
如果Jlink版本低于V7.62（可以在Windows开始菜单栏搜索Jlink查看），还需要额外再将Devices信息拷贝到Jlink安装目录。
|
||||
先将ssdk_dev\prebuilts\JLinkDevices\Devices\SemiDrive目录拷贝到Jlink安装目录下的Devices文件夹内（如C:\Program Files\SEGGER\JLink\Devices）。
|
||||
再将ssdk_dev\prebuilts\JLinkDevices\JLinkDevices.xml文件替换Jlink安装目录原有的JLinkDevices.xml文件（建议先将原文件备份再替换）。
|
||||
|
||||
3. 重新打开SES工程（如在完成第1步之前先打开了SES工程，需要关闭后重新打开工程）。
|
||||
|
||||
4. 编译FlashDebug模式工程（xip需要先编译bootloader工程，再编译app工程的Debug或FlashDebug模式）。
|
||||
编译完成后会在SES\Output\FlashDebug\Exe目录中自动生成签名bin文件，如sf_signed.bin。
|
||||
|
||||
5. 在SES IDE中点击Target——Download xxx。
|
||||
IDE调用Flashloader完成flash文件下载。
|
||||
|
||||
二、FlashDebug模式的配置包含如下内容（已默认添加到工程中）：
|
||||
1.post-build
|
||||
"$(ProjectDir)/../../../../../prebuilts/windows/python-3.7.0/python.exe" "$(ProjectDir)/../../../../../devices/script/SES/cmd_download.py" "$(JLinkDir)" "$(SolutionPath)" "$(PART_ID)" "HYPERFLASH" "$(OPS)"
|
||||
或者
|
||||
"$(ProjectDir)/../../../../../prebuilts/windows/python-3.7.0/python.exe" "$(ProjectDir)/../../../../../devices/script/SES/cmd_download.py" "$(JLinkDir)" "$(SolutionPath)" "$(PART_ID)" "NORFLASH" "$(OPS)"
|
||||
|
||||
2.Target Script
|
||||
Reset Script:
|
||||
init_before_download("$(ProjectDir)/../../../../../devices/$(PART_ID)/flashloader/init_before_download_hyperflash.txt")
|
||||
或者
|
||||
init_before_download("$(ProjectDir)/../../../../../devices/$(PART_ID)/flashloader/init_before_download_norflash.txt")
|
||||
Target Script File:
|
||||
$(ProjectDir)/../../../../../devices/script/SES/init_before_download.js
|
||||
|
||||
3.loader
|
||||
driver类:
|
||||
所有工程
|
||||
debug：
|
||||
无需配置
|
||||
FlashDebug:
|
||||
Download_HYPERFLASH(Download_NORFLASH):
|
||||
$(ProjectDir)/Output/FlashDebug/Exe/sf_signed.bin - 0x100C0000(0x10007000)
|
||||
$(ProjectDir)/../../../../../tools/sdtools/sfs/sfs_s26h-hyperflash.bin - 0x10000000
|
||||
xip类:（签名bootloader，所有核的app不签名）
|
||||
bootloader工程：
|
||||
debug
|
||||
无需配置
|
||||
FlashDebug:
|
||||
不支持
|
||||
sf工程中
|
||||
debug：
|
||||
配置device name
|
||||
配置init_before_download
|
||||
init_before_download("$(ProjectDir)/../../../../../../devices/$(PART_ID)/flashloader/init_before_download.txt")
|
||||
$(ProjectDir)/../../../../../../devices/script/SES/init_before_download.js
|
||||
FlashDebug:
|
||||
Download_HYPERFLASH(Download_NORFLASH):
|
||||
$(ProjectDir)/../../bootloader/SES/Output/Debug/Exe/sf_signed.bin - 0x100C0000(0x10007000)
|
||||
$(ProjectDir)/../../../../../../tools/sdtools/sfs/sfs_s26h-hyperflash.bin - 0x10000000
|
||||
$(ProjectDir)/Output/FlashDebug/Exe/sf.bin - 0x10140000
|
||||
Download_HYPERFLASH_Multicore(Download_NORFLASH_Multicore):
|
||||
$(ProjectDir)/../../sp0/SES/Output/FlashDebug/Exe/sp0.bin - 0x10340000(0x10288000)
|
||||
$(ProjectDir)/../../sp1/SES/Output/FlashDebug/Exe/sp1.bin - 0x103C0000(0x10308000)
|
||||
$(ProjectDir)/../../sx0/SES/Output/FlashDebug/Exe/sx0.bin - 0x10440000(0x10388000)
|
||||
$(ProjectDir)/../../sx1/SES/Output/FlashDebug/Exe/sx1.bin - 0x104C0000(0x10408000)
|
||||
sp/sx工程中
|
||||
debug:
|
||||
配置device name
|
||||
FlashDebug:
|
||||
Download_HYPERFLASH(Download_NORFLASH):
|
||||
$(ProjectDir)Output/FlashDebug/Exe/sp0.bin - 0x10340000(0x10288000)
|
||||
$(ProjectDir)Output/FlashDebug/Exe/sp1.bin - 0x103C0000(0x10308000)
|
||||
$(ProjectDir)Output/FlashDebug/Exe/sx0.bin - 0x10440000(0x10388000)
|
||||
$(ProjectDir)Output/FlashDebug/Exe/sx1.bin - 0x104C0000(0x10408000)
|
||||
多核类：（所有核都签名）
|
||||
sf工程中
|
||||
debug：
|
||||
无需配置
|
||||
FlashDebug:
|
||||
Download_HYPERFLASH(Download_NORFLASH):
|
||||
$(ProjectDir)/Output/FlashDebug/Exe/sf_signed.bin - 0x100C0000(0x10007000)
|
||||
$(ProjectDir)/../../../../../../tools/sdtools/sfs/sfs_s26h-hyperflash.bin - 0x10000000
|
||||
Download_HYPERFLASH_Multicore(Download_NORFLASH_Multicore):
|
||||
$(ProjectDir)/../../sp0/SES/Output/FlashDebug/Exe/sp0_signed.bin - 0x10340000(0x10288000)
|
||||
$(ProjectDir)/../../sp1/SES/Output/FlashDebug/Exe/sp1_signed.bin - 0x103C0000(0x10308000)
|
||||
$(ProjectDir)/../../sx0/SES/Output/FlashDebug/Exe/sx0_signed.bin - 0x10440000(0x10388000)
|
||||
$(ProjectDir)/../../sx1/SES/Output/FlashDebug/Exe/sx1_signed.bin - 0x104C0000(0x10408000)
|
||||
sp/sx工程中
|
||||
debug：
|
||||
无需配置
|
||||
FlashDebug:
|
||||
不支持
|
||||
|
||||
4.target device
|
||||
$(PART_ID)_HYPERFLASH/$(PART_ID)_NORFLASH
|
||||
|
||||
注意： norflash和hyperflash下载地址和sfs类型不同
|
||||
|
||||
三、命令行下载：
|
||||
1. 条件：
|
||||
安装SEGEER Embeded Studio时请在安装对话框Additional Component中确认勾选Install Little Endian Library Files（默认已勾选）。
|
||||
2. 下载命令：
|
||||
例：
|
||||
"D:\Program Files\SEGGER\SEGGER Embedded Studio for ARM 7.10a\bin\emBuild" -config "FlashDebug" -D OPS=download -project "sf" "E:\WSL\git_repo\E3_DEV\boards\e3_gateway\driver_demo\acmp\SES\acmp.emProject"
|
||||
"D:\Program Files\SEGGER\SEGGER Embedded Studio for ARM 7.10a\bin\emBuild" -config "FlashDebug" -D OPS=download -project "sf" "E:\WSL\git_repo\E3_DEV\boards\e3_gateway\app_demo\xip\sf\SES\sf.emProject"
|
||||
261
devices/script/Trace32/download.cmm
Normal file
261
devices/script/Trace32/download.cmm
Normal file
@@ -0,0 +1,261 @@
|
||||
|
||||
ON ERROR JUMPTO EXIT
|
||||
|
||||
LOCAL &flashloader_pathname §or_size
|
||||
Var.NEWLOCAL char[10][128] \download_file_pathname
|
||||
Var.NEWLOCAL char[10][128] \download_file_address
|
||||
|
||||
; User Config Download Options
|
||||
|
||||
;&flashloader_pathname="~~~~/../../E3104/flashloader/flashloader_norflash.out"
|
||||
;Var.set \download_file_pathname[0]="semi drive/e3/test/sfs.bin"
|
||||
;Var.set \download_file_address[0]="0x10000000"
|
||||
;Var.set \download_file_pathname[1]="semi drive/e3/test/rfd.bin"
|
||||
;Var.set \download_file_address[1]="0x100000F0"
|
||||
;Var.set \download_file_pathname[2]="semi drive/e3/test/boot0.bin"
|
||||
;Var.set \download_file_address[2]="0x100C0000"
|
||||
;Var.set \download_file_pathname[3]="semi drive/e3/test/boot1.bin"
|
||||
;Var.set \download_file_address[3]="0x104C0000"
|
||||
;Var.set \download_file_pathname[4]="semi drive/e3/test/boot2.bin"
|
||||
;Var.set \download_file_address[4]="0x108C0000"
|
||||
|
||||
&flashloader_pathname="~~~~/../../E3640/flashloader/flashloader_hyperflash.out"
|
||||
Var.set \download_file_pathname[0]="~~/semi drive/e3/test pathhavespace/sfs.bin"
|
||||
Var.set \download_file_address[0]="0x10000000"
|
||||
Var.set \download_file_pathname[1]="~~/semi drive/e3/test pathhavespace/rfd.bin"
|
||||
Var.set \download_file_address[1]="0x100000F0"
|
||||
Var.set \download_file_pathname[2]="~~/semi drive/e3/test pathhavespace/boot0.bin"
|
||||
Var.set \download_file_address[2]="0x100C0000"
|
||||
Var.set \download_file_pathname[3]="~~/semi drive/e3/test pathhavespace/boot1.bin"
|
||||
Var.set \download_file_address[3]="0x104C0000"
|
||||
Var.set \download_file_pathname[4]="~~/semi drive/e3/test pathhavespace/boot2.bin"
|
||||
Var.set \download_file_address[4]="0x108C0000"
|
||||
|
||||
;&flashloader_pathname="~~~~/../../E3104/flashloader/flashloader_norflash.out"
|
||||
;Var.set \download_file_pathname[0]="~~/semi drive/e3/test pathhavespace/sfs.bin"
|
||||
;Var.set \download_file_address[0]="0x10000000"
|
||||
;Var.set \download_file_pathname[1]="~~/semi drive/e3/test pathhavespace/rfd.bin"
|
||||
;Var.set \download_file_address[1]="0x100000F0"
|
||||
;Var.set \download_file_pathname[2]="~~/semi drive/e3/test pathhavespace/boot0.bin"
|
||||
;Var.set \download_file_address[2]="0x10007000"
|
||||
;Var.set \download_file_pathname[3]="~~/semi drive/e3/test pathhavespace/boot1.bin"
|
||||
;Var.set \download_file_address[3]="0x10407000"
|
||||
;Var.set \download_file_pathname[4]="~~/semi drive/e3/test pathhavespace/boot2.bin"
|
||||
;Var.set \download_file_address[4]="0x10807000"
|
||||
|
||||
;&flashloader_pathname="~~~~/../../E3104/flashloader/flashloader_norflash.out"
|
||||
;Var.set \download_file_pathname[0]="test_noflashloader/sfs.bin"
|
||||
;Var.set \download_file_address[0]="0x10000000"
|
||||
;Var.set \download_file_pathname[1]="test_noflashloader/rfd.bin"
|
||||
;Var.set \download_file_address[1]="0x100000F0"
|
||||
;Var.set \download_file_pathname[2]="test_noflashloader/boot0.bin"
|
||||
;Var.set \download_file_address[2]="0x100C0000"
|
||||
;Var.set \download_file_pathname[3]="test_noflashloader/boot1.bin"
|
||||
;Var.set \download_file_address[3]="0x104C0000"
|
||||
;Var.set \download_file_pathname[4]="test_noflashloader/boot2.bin"
|
||||
;Var.set \download_file_address[4]="0x108C0000"
|
||||
|
||||
;&flashloader_pathname="test_nobin/flashloader.out"
|
||||
;Var.set \download_file_pathname[0]="test_nobin/sfs.bin"
|
||||
;Var.set \download_file_address[0]="0x10000000"
|
||||
;Var.set \download_file_pathname[1]="test_nobin/rfd.bin"
|
||||
;Var.set \download_file_address[1]="0x100000F0"
|
||||
;Var.set \download_file_pathname[2]="test_nobin/boot0.bin"
|
||||
;Var.set \download_file_address[2]="0x100C0000"
|
||||
;Var.set \download_file_pathname[3]="test_nobin/boot1.bin"
|
||||
;Var.set \download_file_address[3]="0x104C0000"
|
||||
;Var.set \download_file_pathname[4]="test_nobin/boot2.bin"
|
||||
;Var.set \download_file_address[4]="0x108C0000"
|
||||
|
||||
GOSUB CHECK_FILE_IS_EXIST "&flashloader_pathname"
|
||||
GOSUB CHECK_FILES_IS_EXIST \download_file_pathname
|
||||
GOSUB INIT
|
||||
GOSUB DOWNLOAD_FILES \download_file_pathname \download_file_address §or_size
|
||||
|
||||
EXIT:
|
||||
IF OS.FILE(flashloader.bin)==TRUE()
|
||||
RM flashloader.bin
|
||||
ON ERROR inherit
|
||||
ENDDO
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
INIT:
|
||||
; jtag clock config
|
||||
SYStem.JtagClock 20MHz
|
||||
|
||||
; cpu config
|
||||
SYStem.CPU CortexR5F
|
||||
|
||||
; mem access port
|
||||
SYStem.CONFIG.apbaccessport 0
|
||||
SYStem.CONFIG.apbap1.base 0x2000
|
||||
SYStem.CONFIG.debugaccessport 0
|
||||
SYStem.CONFIG.debugap1.base 0x2000
|
||||
|
||||
; DBG
|
||||
SYStem.CONFIG.COREDEBUG.Base 0xF2081000
|
||||
|
||||
SYStem.attach
|
||||
|
||||
Break
|
||||
|
||||
PRIVATE &tcm_base &program_begin &program_end &arg_base
|
||||
|
||||
; disable mpu and cache
|
||||
Data.SET C15:0x0001 0x08E7087A
|
||||
Data.SET C15:0x0101 0x00000020
|
||||
|
||||
; init tcm
|
||||
Data.LOAD.Elf "&flashloader_pathname" /NoCode
|
||||
&tcm_base=ADDRESS.OFFSET(sYmbol.SECADDRESS(PrgCode))
|
||||
&program_begin=ADDRESS.OFFSET(sYmbol.SECADDRESS(T32CodeBegin))
|
||||
&program_end=ADDRESS.OFFSET(sYmbol.SECEND(T32CodeEnd))
|
||||
Data.SET C15:0x0019 (&tcm_base+0x10000)|0x1
|
||||
Data.SET C15:0x0119 &tcm_base|0x1
|
||||
|
||||
; generate flashloader.bin
|
||||
Data.LOAD.Elf "&flashloader_pathname"
|
||||
Data.SAVE.Binary flashloader.bin D:&program_begin--&program_end
|
||||
|
||||
; calc config para
|
||||
&info_base=ADDRESS.OFFSET(sYmbol.SECADDRESS(DevDscr))
|
||||
§or_size=DATA.Long(D:(&info_base+0xA0))
|
||||
&arg_base=&tcm_base+0x20000-0x2020
|
||||
|
||||
FLASH.RESet
|
||||
|
||||
FLASH.Create 1. 0x10000000--0x11FFFFFF §or_size TARGET LONG
|
||||
FLASH.TARGET &program_begin &arg_base 0x1000 flashloader.bin /STACKSIZE 0x1000
|
||||
; test error handle
|
||||
;FLASH.TARGET &program_begin &arg_base 0x1000++ flashloader.bin /STACKSIZE 0x1000
|
||||
|
||||
RETURN
|
||||
|
||||
|
||||
|
||||
CHECK_FILES_IS_EXIST:
|
||||
PRIVATE &i &file_pathname &file_pathname_len
|
||||
ENTRY &file_pathname_array
|
||||
&i=0.
|
||||
WHILE &i<10
|
||||
(
|
||||
&file_pathname_len=STRing.LENgth(Var.STRing(&file_pathname_array[&i]))
|
||||
IF &file_pathname_len!=0
|
||||
(
|
||||
&file_pathname = Var.STRing(&file_pathname_array[&i])
|
||||
GOSUB CHECK_FILE_IS_EXIST "&file_pathname"
|
||||
&i=&i+1
|
||||
)
|
||||
ELSE
|
||||
(
|
||||
IF &i!=0
|
||||
RETURN
|
||||
ELSE
|
||||
ENDDO
|
||||
)
|
||||
)
|
||||
|
||||
|
||||
|
||||
CHECK_FILE_IS_EXIST:
|
||||
ENTRY &file_pathname
|
||||
IF OS.FILE(&file_pathname)==FALSE()
|
||||
(
|
||||
PRINT &file_pathname " is not exist"
|
||||
ENDDO
|
||||
)
|
||||
ELSE
|
||||
RETURN
|
||||
|
||||
|
||||
|
||||
DOWNLOAD_FILES:
|
||||
PRIVATE &i &file_pathname &file_pathname_len &file_address
|
||||
ENTRY &file_pathname_array &file_address_array §or_size
|
||||
&i=0.
|
||||
WHILE &i<10
|
||||
(
|
||||
&file_pathname_len=STRing.LENgth(Var.STRing(&file_pathname_array[&i]))
|
||||
IF &file_pathname_len!=0
|
||||
(
|
||||
&file_pathname = Var.STRing(&file_pathname_array[&i])
|
||||
&file_address = Var.STRing(&file_address_array[&i])
|
||||
GOSUB DOWNLOAD_FILE "&file_pathname" &file_address §or_size
|
||||
&i=&i+1
|
||||
)
|
||||
ELSE
|
||||
(
|
||||
RETURN
|
||||
)
|
||||
)
|
||||
|
||||
|
||||
|
||||
DOWNLOAD_FILE:
|
||||
PRIVATE &file_size §or_num &erase_address_end
|
||||
ENTRY &download_file_pathname &download_file_address &download_sector_size
|
||||
|
||||
IF &download_file_address%&download_sector_size==0
|
||||
(
|
||||
&file_size=OS.FILE.SIZE(&download_file_pathname)
|
||||
IF &file_size%&download_sector_size==0
|
||||
§or_num=&file_size/&download_sector_size
|
||||
ELSE
|
||||
§or_num=&file_size/&download_sector_size+1
|
||||
&erase_address_end=CONVert.INTTOHEX(&download_file_address+§or_num*§or_size-1)
|
||||
FLASH.Erase &download_file_address--&erase_address_end
|
||||
)
|
||||
FLASH.Program ALL
|
||||
Data.LOAD.Binary &download_file_pathname &download_file_address
|
||||
FLASH.Program OFF
|
||||
|
||||
RETURN
|
||||
|
||||
60
devices/script/Trace32/e3_attach_sf.cmm
Normal file
60
devices/script/Trace32/e3_attach_sf.cmm
Normal file
@@ -0,0 +1,60 @@
|
||||
; --------------------------------------------------------------------------------
|
||||
; @Title: Example for manual JTAG access, Debugger in DOWN Mode
|
||||
; @Description:
|
||||
;This script reads out the IDCODE of an ARM7 core when the debugger is in
|
||||
;DOWN mode.
|
||||
;Detailed knowledge about JTAG is required to use manual JTAG control signals!
|
||||
;Tested on an ARM7 target board.
|
||||
; @Keywords: idcode
|
||||
; @Author: PEG
|
||||
; @Props: Template
|
||||
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
||||
; --------------------------------------------------------------------------------
|
||||
; $Id: example1.cmm 6982 2023-02-22 11:10:17Z kjmal $
|
||||
; @Copyright: Semidrive semiconductor
|
||||
; @Title: Semidrive Secure Debug logic.
|
||||
; The debugger is in DOWN mode, the JTAG driver is tristated.
|
||||
|
||||
area
|
||||
SYStem.CPU CortexR5
|
||||
SYStem.CONFIG.apbaccessport 0
|
||||
SYStem.CONFIG.apbap1.base 0x2000
|
||||
SYStem.CONFIG.debugaccessport 0
|
||||
SYStem.CONFIG.debugap1.base 0x2000
|
||||
SYStem.CONFIG.COREDEBUG.Base 0xF2081000
|
||||
;e3
|
||||
;SYStem.CONFIG.COREDEBUG.Base 0xF0a01000
|
||||
SYStem.Option.TRST OFF
|
||||
SYStem.JtagClock 1MHz
|
||||
JTAG.PIN ENable
|
||||
; enable JTAG output driver
|
||||
JTAG.SHIFTTMS 1 1 1 1 1
|
||||
; soft reset of the JTAG interface, goto Test-Logic Reset state
|
||||
JTAG.SHIFTTMS 0 1 1 0 0
|
||||
; goto Shift-IR state
|
||||
JTAG.SHIFTREG 1 1 1 1
|
||||
; shift in UID instruction, goto exit1-ir
|
||||
JTAG.SHIFTTMS 1 1 0 0
|
||||
; goto Shift-DR state
|
||||
JTAG.SHIFTREG %long 0x0 0x0
|
||||
; shift in 64bit dummy code. shift out our uid, goto exit1-dr
|
||||
PRINT JTAG.SHIFT()
|
||||
; print the UID
|
||||
JTAG.SHIFTTMS 1 1 0 0
|
||||
; goto Shift-DR state
|
||||
JTAG.SHIFTREG %long 0x74657374 0x6b657930
|
||||
; Note: 0x74657374 --> SEC_DBG_CFG[31, 0]!!, 0x6b657930 --> SEC_DBG_CFG[63, 32]!!
|
||||
; shift in the corresponding key .shift out our uid, goto exit1-dr
|
||||
PRINT JTAG.SHIFT()
|
||||
JTAG.SHIFTTMS 1 1 1 1 1
|
||||
; goto Test-Logic Reset state
|
||||
JTAG.SHIFTTMS 0 1 0 0
|
||||
; goto Shift-DR state
|
||||
JTAG.SHIFTREG %long 0x0
|
||||
; shift our IDCODE, goto exit1-dr
|
||||
PRINT JTAG.SHIFT()
|
||||
JTAG.PIN Disable
|
||||
; Disable JTAG output driver
|
||||
SYStem.Mode Attach
|
||||
;attach
|
||||
ENDDO
|
||||
38
devices/script/Trace32/readme
Normal file
38
devices/script/Trace32/readme
Normal file
@@ -0,0 +1,38 @@
|
||||
## 简介
|
||||
|
||||
介绍通过Trac32使用secure debug功能
|
||||
该功能支持JTAG模式，不支持SWD模式
|
||||
芯片匹配debug key成功后开启debug接口
|
||||
|
||||
##硬件连接
|
||||
|
||||
- e3_gateway参考板
|
||||
- Trace32
|
||||
|
||||
##注意事项
|
||||
- 确认板子JTAG功能正常，对于e3 gateway参考板需要去掉TDO/TDI上的两个电阻。
|
||||
- 需要通过fuse工具烧UID,debug key和使能secure debug。
|
||||
- 接口如果是SWD,需要修改为JTAG。
|
||||
|
||||
##测试方法
|
||||
当板子以以下方式烧UID,debug key和使能secure debug.
|
||||
Debug Key:
|
||||
+-----------------------+------------+------------------+
|
||||
| name | fuse addr | fuse value |
|
||||
+-----------------------+------------+------------------+
|
||||
| UID[0, 31] | 0x1010 | 0x12345678 |
|
||||
| UID[32, 63] | 0x1014 | 0xABCDEF88 |
|
||||
| SEC_DBG_CFG[31, 0] | 0x1280 | 0x74657374(key0) |
|
||||
| SEC_DBG_CFG[63, 32] | 0x1284 | 0x6b657930(key1) |
|
||||
| MSIC_CFG3/SDBG_MODE | 0x12b0 | 0x00800000 |
|
||||
+-----------------------+------------+------------------+
|
||||
|
||||
脚本拖入trace32.exe并执行
|
||||
CD.DO 本地路径\e3_attach_sf.cmm
|
||||
|
||||
提供错误的debug key则无法执行通过。
|
||||
|
||||
##expected log
|
||||
0ABCDEF8812345678
|
||||
0ABCDEF8812345678
|
||||
4BA00477
|
||||
Reference in New Issue
Block a user