325 lines
15 KiB
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325 lines
15 KiB
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<div id="projectname">SemiDrive SSDK Appication Program Interface<span id="projectnumber"> PTG3.0</span>
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="headertitle"><div class="title">xspi_pdata</div></div>
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</div><!--header-->
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<div class="contents">
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<p><code>#include <<a class="el" href="sdrv__spi__nor_8h_source.html">sdrv_spi_nor.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:a1e6927fa1486224044e568f9c370519b"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#a1e6927fa1486224044e568f9c370519b">id</a></td></tr>
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<tr class="separator:a1e6927fa1486224044e568f9c370519b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aabe04f3053f68874ca06d6b953886c2a"><td class="memItemLeft" align="right" valign="top">addr_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#aabe04f3053f68874ca06d6b953886c2a">apb_base</a></td></tr>
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<tr class="memitem:ae18ed7611821121f90d73e5826832cc2"><td class="memItemLeft" align="right" valign="top">addr_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#ae18ed7611821121f90d73e5826832cc2">direct_base</a></td></tr>
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<tr class="memitem:aae59578d5805bbf4af7e7033129ab168"><td class="memItemLeft" align="right" valign="top">unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#aae59578d5805bbf4af7e7033129ab168">irq</a></td></tr>
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<tr class="separator:aae59578d5805bbf4af7e7033129ab168"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a708d644b9f9ac24f2c31858076d2ad34"><td class="memItemLeft" align="right" valign="top">unsigned long </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#a708d644b9f9ac24f2c31858076d2ad34">ref_clk_hz</a></td></tr>
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<tr class="separator:a708d644b9f9ac24f2c31858076d2ad34"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a31bb9f7f920311274944a35702a4eba0"><td class="memItemLeft" align="right" valign="top">unsigned int </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#a31bb9f7f920311274944a35702a4eba0">sclk</a></td></tr>
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<tr class="memitem:a1cec854d38d55ef3ff9f952bfd6d4731"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#a1cec854d38d55ef3ff9f952bfd6d4731">dma_bus_width</a></td></tr>
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<tr class="separator:a1cec854d38d55ef3ff9f952bfd6d4731"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab2872321db2107a0236e64d526656c88"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#ab2872321db2107a0236e64d526656c88">dma_burst_size</a></td></tr>
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<tr class="memitem:ac98cc458eaa2ab513167d9d90619ce14"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#ac98cc458eaa2ab513167d9d90619ce14">cs_decoded</a></td></tr>
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<tr class="memitem:aaf6c15bf12baabc42d436925186ab98f"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#aaf6c15bf12baabc42d436925186ab98f">current_cs</a></td></tr>
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<tr class="memitem:afafe7bbc4bc98731a41dae5c829dc9e6"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#afafe7bbc4bc98731a41dae5c829dc9e6">dqs_en</a></td></tr>
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<tr class="separator:afafe7bbc4bc98731a41dae5c829dc9e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab2ba1e70ab7aba5a4b1d884d4a826253"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#ab2ba1e70ab7aba5a4b1d884d4a826253">fifo_depth</a></td></tr>
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<tr class="separator:ab2ba1e70ab7aba5a4b1d884d4a826253"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aeb423c0c9ca6a667b19c372c0c9f5c0c"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#aeb423c0c9ca6a667b19c372c0c9f5c0c">fifo_width</a></td></tr>
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<tr class="memitem:adbef2a370d7d6724dfcbfbed4d5dd985"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structxspi__pdata.html#adbef2a370d7d6724dfcbfbed4d5dd985">direct_range_size</a></td></tr>
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</table>
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<h2 class="groupheader">Field Documentation</h2>
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<a id="aabe04f3053f68874ca06d6b953886c2a" name="aabe04f3053f68874ca06d6b953886c2a"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aabe04f3053f68874ca06d6b953886c2a">◆ </a></span>apb_base</h2>
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<td class="memname">addr_t apb_base</td>
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</div><div class="memdoc">
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<p >xspi config apb address </p>
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<a id="ac98cc458eaa2ab513167d9d90619ce14" name="ac98cc458eaa2ab513167d9d90619ce14"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ac98cc458eaa2ab513167d9d90619ce14">◆ </a></span>cs_decoded</h2>
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<td class="memname">bool cs_decoded</td>
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</table>
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</div><div class="memdoc">
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<p >reverse </p>
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<a id="aaf6c15bf12baabc42d436925186ab98f" name="aaf6c15bf12baabc42d436925186ab98f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aaf6c15bf12baabc42d436925186ab98f">◆ </a></span>current_cs</h2>
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<td class="memname">uint8_t current_cs</td>
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</div><div class="memdoc">
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<p >xspi using cs num </p>
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</div>
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</div>
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<a id="ae18ed7611821121f90d73e5826832cc2" name="ae18ed7611821121f90d73e5826832cc2"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ae18ed7611821121f90d73e5826832cc2">◆ </a></span>direct_base</h2>
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<td class="memname">addr_t direct_base</td>
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</table>
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</div><div class="memdoc">
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<p >xspi config direct transmission base address </p>
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</div>
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</div>
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<a id="adbef2a370d7d6724dfcbfbed4d5dd985" name="adbef2a370d7d6724dfcbfbed4d5dd985"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#adbef2a370d7d6724dfcbfbed4d5dd985">◆ </a></span>direct_range_size</h2>
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<td class="memname">uint32_t direct_range_size</td>
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</table>
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</div><div class="memdoc">
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<p >direct trans range size </p>
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</div>
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<a id="ab2872321db2107a0236e64d526656c88" name="ab2872321db2107a0236e64d526656c88"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab2872321db2107a0236e64d526656c88">◆ </a></span>dma_burst_size</h2>
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<td class="memname">uint32_t dma_burst_size</td>
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</table>
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</div><div class="memdoc">
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<p >dma burst length </p>
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<a id="a1cec854d38d55ef3ff9f952bfd6d4731" name="a1cec854d38d55ef3ff9f952bfd6d4731"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1cec854d38d55ef3ff9f952bfd6d4731">◆ </a></span>dma_bus_width</h2>
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<td class="memname">uint8_t dma_bus_width</td>
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<p >dma bus width </p>
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</div>
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<a id="afafe7bbc4bc98731a41dae5c829dc9e6" name="afafe7bbc4bc98731a41dae5c829dc9e6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#afafe7bbc4bc98731a41dae5c829dc9e6">◆ </a></span>dqs_en</h2>
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<td class="memname">bool dqs_en</td>
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</table>
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</div><div class="memdoc">
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<p >dqs enable for device&&host </p>
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</div>
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</div>
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<a id="ab2ba1e70ab7aba5a4b1d884d4a826253" name="ab2ba1e70ab7aba5a4b1d884d4a826253"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab2ba1e70ab7aba5a4b1d884d4a826253">◆ </a></span>fifo_depth</h2>
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<td class="memname">uint8_t fifo_depth</td>
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</div><div class="memdoc">
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<p >xspi fifo depth </p>
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</div>
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<a id="aeb423c0c9ca6a667b19c372c0c9f5c0c" name="aeb423c0c9ca6a667b19c372c0c9f5c0c"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aeb423c0c9ca6a667b19c372c0c9f5c0c">◆ </a></span>fifo_width</h2>
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<td class="memname">uint8_t fifo_width</td>
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</div><div class="memdoc">
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<p >xspi fifo width </p>
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</div>
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<a id="a1e6927fa1486224044e568f9c370519b" name="a1e6927fa1486224044e568f9c370519b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1e6927fa1486224044e568f9c370519b">◆ </a></span>id</h2>
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<td class="memname">uint8_t id</td>
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<p >xspi config id </p>
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<a id="aae59578d5805bbf4af7e7033129ab168" name="aae59578d5805bbf4af7e7033129ab168"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aae59578d5805bbf4af7e7033129ab168">◆ </a></span>irq</h2>
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<td class="memname">unsigned int irq</td>
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<p >xspi config irq number </p>
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<a id="a708d644b9f9ac24f2c31858076d2ad34" name="a708d644b9f9ac24f2c31858076d2ad34"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a708d644b9f9ac24f2c31858076d2ad34">◆ </a></span>ref_clk_hz</h2>
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<td class="memname">unsigned long ref_clk_hz</td>
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<p >xspi config reference clk </p>
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<a id="a31bb9f7f920311274944a35702a4eba0" name="a31bb9f7f920311274944a35702a4eba0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a31bb9f7f920311274944a35702a4eba0">◆ </a></span>sclk</h2>
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<td class="memname">unsigned int sclk</td>
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<p >reverse </p>
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<hr/>The documentation for this struct was generated from the following file:<ul>
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<li>Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/<a class="el" href="sdrv__spi__nor_8h_source.html">sdrv_spi_nor.h</a></li>
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</ul>
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