152 lines
4.2 KiB
C
152 lines
4.2 KiB
C
/**
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* @file sdrv_fs24m_hw_access.h
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* @brief taishan fs24M hw access header file.
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*
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* @copyright Copyright (c) 2022 Semidrive Semiconductor.
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* All rights reserved.
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*/
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#ifndef SDRV_FS24M_HW_ACCESS_H_
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#define SDRV_FS24M_HW_ACCESS_H_
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#include <types.h>
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/* GLB CTL register */
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#define FS24M_GLB_CTL (0x0u)
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#define FS24M_GLB_CTL_XTAL_SRC_SEL (0u)
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#define FS24M_GLB_CTL_FS_SRC_SEL (1u)
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#define FS24M_GLB_CTL_FS_XTAL_EN (2u)
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#define FS24M_GLB_CTL_FS_OSC_EN (3u)
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#define FS24M_GLB_CTL_EXT_XTAL_EN (4u)
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#define FS24M_GLB_CTL_EXT_OSC_EN (5u)
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#define FS24M_GLB_CTL_CMP_FORCE_CLR (8u)
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#define FS24M_GLB_CTL_SLP_EXP (16u)
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#define FS24M_GLB_CTL_HIB_EXP (17u)
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#define FS24M_GLB_CTL_RC_RDY (28u)
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#define FS24M_GLB_CTL_XTAL_RDY (29u)
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#define FS24M_GLB_CTL_RC_ACTIVE (30u)
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#define FS24M_GLB_CTL_XTAL_ACTIVE (31u)
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#define FS24M_XTAL_CTRL (0x20u)
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#define FS24M_XTAL_CTRL_XTAL_ENABLE (0u)
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#define FS24M_XTAL_CTRL_XTAL_TEST_ENABLE (1u)
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/* RC32K CHK CTL register */
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#define FS24M_RC32K_CHK_CTL (0x500u)
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#define FS24M_RC32K_CHK_CTL_FREQ_CNT_STA_LSB (16u)
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#define FS24M_RC32K_CHK_CTL_FREQ_CNT_STA_MASK (0xFFFFu)
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#define FS24M_RC32K_CHK_CTL_FREQ_VIO_CLR_LSB (3u)
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#define FS24M_RC32K_CHK_CTL_FREQ_VIO_STA_LSB (2u)
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#define FS24M_RC32K_CHK_CTL_MON_EN_STA_LSB (1u)
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#define FS24M_RC32K_CHK_CTL_MON_EN_LSB (0u)
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#define FS24M_XTAL_SEL_PAD 0
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#define FS24M_XTAL_SEL_EXT 1
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#define FS24M_FS_SEL_RC 0
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#define FS24M_FS_SEL_XTAL 1
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/**
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* @brief FS24M XTAL Source Select.
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*
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* This function select xtal source.
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*
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* @param [in] base fs24m base
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* @param [in] src xtal source
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*/
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void sdrv_fs24m_xtal_sel(uint32_t base, uint8_t src);
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/**
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* @brief FS24M FS Source Select.
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*
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* This function select fs source.
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*
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* @param [in] base fs24m base
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* @param [in] src fs source
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*/
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void sdrv_fs24m_fs_sel(uint32_t base, uint8_t src);
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/**
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* @brief FS24M FS Source Get.
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*
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* This function get fs source.
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*
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* @param [in] base fs24m base
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* @return FS24M_FS_SEL_RC or FS24M_FS_SEL_XTAL.
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*/
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uint32_t sdrv_fs24m_fs_sel_get(uint32_t base);
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/**
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* @brief FS24M Check FS Active Source.
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*
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* This function check fs24m active source.
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*
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* @param [in] base fs24m base
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* @param [in] src fs source
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* @param [in] count wait count
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* @return active status
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*/
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int sdrv_fs24m_wait_active(uint32_t base, uint8_t src, uint32_t count);
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/**
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* @brief FS24M Check ready status
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*
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* This function check fs24m xtal/rc ready status
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*
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* @param [in] base fs24m base
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* @param [in] src fs source
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* @param [in] count wait count
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* @return ready status
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*/
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int sdrv_fs24m_wait_ready(uint32_t base, uint8_t src, uint32_t count);
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/**
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* @brief FS24M Fail Safe Enable.
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*
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* This function enable or disable fail safe.
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*
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* @param [in] base fs24m base
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* @param [in] enable enable or disable failsafe
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*/
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void sdrv_fs24m_xtal_fs_enable(uint32_t base, bool enable);
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/**
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* @brief FS24M Fail Safe Enable.
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*
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* This function enable or disable fail safe.
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*
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* @param [in] base fs24m base
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* @param [in] enable enable or disable failsafe
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*/
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void sdrv_fs24m_rc_fs_enable(uint32_t base, bool enable);
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/**
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* @brief Xtal 24m enable or disable
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*
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* @param [in] base fs24m base
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* @param [in] enable true or false
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*/
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void sdrv_fs24m_xtal_enable(uint32_t base, bool enable);
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/**
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* @brief Xtal 24m test enable or disable
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*
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* @param [in] base fs24m base
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* @param [in] enable true or false
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*/
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void sdrv_fs24m_xtal_test_enable(uint32_t base, bool enable);
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/**
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* @brief Use 24M check 32K clock.
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*
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* This function use FS24M clock to check FS32K clock frequency. For example, FS24M clock source choose XTAL24M, make it
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* accurate to 24000000, and config FS32K clock source to RC or xtal you want to get real frequency. After do above all,
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* call this function, you will get frequency counter. Real 32K frequency is 24000000 / counter.
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*
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* @param [in] base fs24m base
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* @return frequency counter
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*/
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uint32_t sdrv_fs24m_get_32k_frequency_counter(uint32_t base);
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#endif |