271 lines
8.9 KiB
C
271 lines
8.9 KiB
C
/**
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* @file sdrv_i2c.h
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* @brief SemiDrive I2C driver header file.
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*
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* @copyright (c) 2022 Semidrive Semiconductor.
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* @All rights reserved.
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*
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*/
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#ifndef SDRV_I2C_DRV_H_
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#define SDRV_I2C_DRV_H_
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#include <types.h>
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#include <sdrv_common.h>
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/**
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* @brief i2c controller supported errcode
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*/
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enum {
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/* transfer stat group */
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SDRV_I2CDRV_TRANS_OK = SDRV_STATUS_OK,
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SDRV_I2CDRV_TRANS_GO = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_I2C, 11),
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SDRV_I2CDRV_TRANS_NAK = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_I2C, 12),
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SDRV_I2CDRV_TRANS_ERR = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_I2C, 13),
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SDRV_I2CDRV_TRANS_ABORT = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_I2C, 14),
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SDRV_I2CDRV_TRANS_TIMEOUT = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_I2C, 15),
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};
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/**
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* @brief i2c controller supported operation mode
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*/
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typedef enum {
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SDRV_I2CDRV_MASTER = 1, /**< i2c controller master mode */
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SDRV_I2CDRV_SLAVE, /**< i2c controller slave mode */
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} sdrv_i2cdrv_opmode_t;
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/**
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* @brief i2c controller supported speed mode
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*/
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typedef enum {
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SDRV_I2CDRV_SSPEED = 1, /**< 100kHz */
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SDRV_I2CDRV_FSPEED, /**< 400kHz */
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SDRV_I2CDRV_PSPEED, /**< 1MHz */
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SDRV_I2CDRV_HSPEED, /**< 3.4MHz */
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SDRV_I2CDRV_USPEED, /**< 5MHz */
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} sdrv_i2cdrv_speed_t;
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/**
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* @brief i2c controller supported transfer mode
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* (only applicable for master mode)
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*/
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typedef enum {
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SDRV_I2CDRV_POLL = 1, /**<polling mode */
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SDRV_I2CDRV_INTP, /**< interrupt mode */
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} sdrv_i2cdrv_tsmode_t;
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/**
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* @brief i2c bus stat(only applicable for master mode)
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*/
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typedef enum {
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SDRV_I2CDRV_BUS_IDLE = 1, /**<i2c bus is idle */
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SDRV_I2CDRV_BUS_BUSY, /**<i2c bus is busy */
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} sdrv_i2cdrv_bus_stat_t;
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typedef status_t sdrv_i2cdrv_trans_stat_t;
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typedef struct sdrv_i2c_cfg sdrv_i2c_cfg_t;
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typedef struct sdrv_i2cdrv_mctrl sdrv_i2cdrv_mctrl_t;
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typedef struct sdrv_i2c sdrv_i2c_t;
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typedef void (*sdrv_i2c_cb_t)(sdrv_i2c_t *ctrl, void *param,
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sdrv_i2cdrv_trans_stat_t stat);
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/**
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* @i2c controller config info
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*/
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struct sdrv_i2c_cfg {
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uint32_t clk; /**<sclk allocate from system */
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paddr_t base; /**<base address allocate from system */
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uint32_t irq; /**<irq allocate from system */
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uint32_t id; /**<id allocate from system */
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uint32_t inited; /**<ctrl already init or not by customer */
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sdrv_i2cdrv_opmode_t opmode; /**<master or slave operation mode set */
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sdrv_i2cdrv_tsmode_t tsmode; /**<interrupt or polling transfer mode set */
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sdrv_i2cdrv_speed_t speed; /**<speed(100k/400k/1M/3.4M/5M) mode set */
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sdrv_i2cdrv_bus_stat_t bus_stat; /**<bus stat change trace */
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};
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/**
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* @i2c controller master mode relative resource
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*/
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struct sdrv_i2cdrv_mctrl {
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uint16_t slave_addr; /**<slave device address,7bit without LSB rw bit */
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uint8_t *buf; /**<point to data write or read customer buf */
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uint16_t len; /**<buf length from customer */
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int read_flag; /**<1:read ; 0:write */
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bool need_stop; /**<true: end with stop signal */
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uint16_t cur_len; /**<length of data already write or read success */
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status_t trans_stat; /**< current transfer stat flag */
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uint32_t trans_errcode; /**<error code flag */
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sdrv_i2c_cb_t cb; /**<interrupt callback function */
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void *cb_param; /**<callback customer parameter */
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};
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/**
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* @i2c controller object structure
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*/
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struct sdrv_i2c {
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sdrv_i2c_cfg_t *cfg; /**<point to i2c config in i2c_cfg.c */
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sdrv_i2cdrv_mctrl_t mctrl; /**<controller as master object structure */
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};
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/**
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* @brief Set i2c controller transfer mode
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*
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* @note This API is deprecated.
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* @param[in] ctrl i2c controller instance pointer
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* @param[in] tsmode transmode to be set
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*
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* @return SDRV_STATUS_OK
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*/
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static inline status_t sdrv_i2c_set_transmode(sdrv_i2c_t *ctrl,
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sdrv_i2cdrv_tsmode_t tsmode)
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{
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return SDRV_STATUS_OK;
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}
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/**
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* @brief Set i2c controller speed mode
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*
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* @note This API is deprecated.
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* @param[in] ctrl i2c controller instance pointer
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* @param[in] speed speed mode to be set
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*
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* @return SDRV_STATUS_OK
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*/
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static inline status_t sdrv_i2c_set_speedmode(sdrv_i2c_t *ctrl,
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sdrv_i2cdrv_speed_t speed)
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{
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return SDRV_STATUS_OK;
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}
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/**
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* @brief Init the i2c controller.
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*
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* @param[in] ctrl i2c controller instance pointer
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*
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* @return SDRV_STATUS_OK/SDRV_STATUS_FAIL
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*/
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extern status_t sdrv_i2c_init_ctrl(sdrv_i2c_t *ctrl);
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/**
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* @brief Write data to slave device use poll blocking format
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*
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* @param[in] ctrl i2c controller instance pointer
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* @param[in] addr slave device 7bit addr not include LSB read/write bit
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* @param[in] wbuf point to data buf for send
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* @param[in] wlen data buf len
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* @param[in] timeout timeout in milliseconds to wait (0 = wait forever)
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* @param[in] need_stop whether send stop signal or hold sda after finish write
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*
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* @return SDRV_STATUS_OK/SDRV_STATUS_FAIL
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*/
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extern status_t sdrv_i2c_write(sdrv_i2c_t *ctrl, uint16_t addr,
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uint8_t *wbuf, uint16_t wlen,
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uint32_t timeout, bool need_stop);
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/**
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* @brief Read data from slave device use poll blocking format
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*
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* @param[in] ctrl i2c controller instance pointer
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* @param[in] addr slave device 7bit addr not include LSB read/write bit
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* @param[out] rbuf point to data buf for receive
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* @param[in] rlen data buf len
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* @param[in] timeout timeout in milliseconds to wait (0 = wait forever)
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* @param[in] need_stop whether send stop signal or hold sda after finish read
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*
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* @return SDRV_STATUS_OK/SDRV_STATUS_FAIL
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*/
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extern status_t sdrv_i2c_read(sdrv_i2c_t *ctrl, uint16_t addr,
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uint8_t *rbuf, uint16_t rlen,
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uint32_t timeout, bool need_stop);
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/**
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* @brief Write data to slave device use interrupt non-blocking format
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*
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* @param[in] ctrl i2c controller instance pointer
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* @param[in] addr slave device 7bit addr not include LSB read/write bit
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* @param[in] wbuf point to data buf for send
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* @param[in] wlen data buf len
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* @param[in] need_stop whether send stop signal or hold sda after finish write
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* @param[in] cb callback function pointer
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* @param[in] cb_param callback user parameter
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*
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* @return SDRV_STATUS_OK/SDRV_STATUS_FAIL
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*/
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extern status_t sdrv_i2c_write_async(sdrv_i2c_t *ctrl,
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uint16_t addr, uint8_t *wbuf, uint16_t wlen,
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bool need_stop, sdrv_i2c_cb_t cb, void *cb_param);
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/**
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* @brief Read data from slave device use interrupt non-blocking format
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*
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* @param[in] ctrl i2c controller instance pointer
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* @param[in] addr slave device 7bit addr not include LSB read/write bit
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* @param[out] rbuf point to data buf for receive
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* @param[in] rlen data buf len
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* @param[in] need_stop whether send stop signal or hold sda after complete read
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* @param[in] cb callback function pointer
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* @param[in] cb_param callback user parameter
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*
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* @return SDRV_STATUS_OK/SDRV_STATUS_FAIL
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*/
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extern status_t sdrv_i2c_read_async(sdrv_i2c_t *ctrl,
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uint16_t addr, uint8_t *rbuf, uint16_t rlen,
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bool need_stop, sdrv_i2c_cb_t cb, void *cb_param);
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/**
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* @brief Get transfer stat(only applicable for master).
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*
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* @param[in] ctrl i2c controller instance pointer
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*
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* @return SDRV_I2CDRV_TRANS_OK
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* SDRV_I2CDRV_TRANS_GO
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* SDRV_I2CDRV_TRANS_ERR
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* SDRV_I2CDRV_TRANS_NAK
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* SDRV_I2CDRV_TRANS_ABORT
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* SDRV_I2CDRV_TRANS_TIMEOUT
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*/
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extern status_t sdrv_i2c_get_trans_stat(sdrv_i2c_t *ctrl);
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/**
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* @brief Get bus stat(only applicable for master).
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* @this api will abandon,please use
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* sdrv_i2c_lock_bus/sdrv_i2c_unlock_bus instead
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*
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* @param[in] ctrl i2c controller instance pointer
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*
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* @return SDRV_I2CDRV_BUS_IDLE/SDRV_I2CDRV_BUS_BUSY
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*/
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extern sdrv_i2cdrv_bus_stat_t sdrv_i2c_get_bus_stat(sdrv_i2c_t *ctrl);
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/**
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* @brief Set bus stat(only applicable for master).
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* @this api will abandon,please use
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* sdrv_i2c_lock_bus/sdrv_i2c_unlock_bus instead
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*
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* @param[in] ctrl i2c controller instance pointer
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* @param[in] bus_stat bus stat to be set
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*
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* @return SDRV_STATUS_OK
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*/
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extern status_t sdrv_i2c_set_bus_stat(sdrv_i2c_t *ctrl,
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sdrv_i2cdrv_bus_stat_t bus_stat);
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/**
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* @brief Lock bus stat(only applicable for master).
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*
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* @param[in] ctrl i2c controller instance pointer
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*
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* @return SDRV_STATUS_OK/SDRV_STATUS_FAIL
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*/
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extern status_t sdrv_i2c_lock_bus(sdrv_i2c_t *ctrl);
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/**
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* @brief Unlock bus stat(only applicable for master).
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*
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* @param[in] ctrl i2c controller instance pointer
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*
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* @return SDRV_STATUS_OK
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*/
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extern status_t sdrv_i2c_unlock_bus(sdrv_i2c_t *ctrl);
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#endif
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