184 lines
4.4 KiB
Plaintext
184 lines
4.4 KiB
Plaintext
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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CSTACK_SIZE = 0x1000;
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SVC_STACK_SIZE = 0x1000;
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IRQ_STACK_SIZE = 0x80;
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FIQ_STACK_SIZE = 0x1000;
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UND_STACK_SIZE = 0x80;
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ABT_STACK_SIZE = 0x80;
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ENTRY(Reset_Handler)
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MEMORY
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{
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ROM (R) : ORIGIN = 0x10140000, LENGTH = 0x002C0000
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TCM (RW) : ORIGIN = 0x00000040, LENGTH = 0x0001FFC0
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RAM (RW) : ORIGIN = 0x00504000, LENGTH = 0x0007C000
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RAMECC (RW) : ORIGIN = 0x004E0000, LENGTH = 0x00020000
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}
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SECTIONS
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{
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/* text/read-only data */
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.text : {
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KEEP(*(.intvec))
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*(.text* .sram.text.glue_7* .gnu.linkonce.t.*)
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} > ROM
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.dummy_post_text : {
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__code_end = .;
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} > ROM
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.rodata : ALIGN(4) {
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__rodata_start = .;
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__fault_handler_table_start = .;
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KEEP(*(.rodata.fault_handler_table))
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__fault_handler_table_end = .;
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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} > ROM
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/*
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* extra linker scripts tend to insert sections just after .rodata,
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* so we want to make sure this symbol comes after anything inserted above,
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* but not aligned to the next section necessarily.
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*/
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.dummy_post_rodata : {
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__rodata_end = .;
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} > ROM
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/* List sections that have differet load address and link address,
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* requiring early section copy on start up.
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*/
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.earlycopy : ALIGN(4) {
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__earlycopy_start = .;
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/* TCM code and data section. */
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LONG(ADDR(.tcm))
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LONG(SIZEOF(.tcm))
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LONG(LOADADDR(.tcm))
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/* RAM code section. */
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LONG(ADDR(.ram.text))
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LONG(SIZEOF(.ram.text))
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LONG(LOADADDR(.ram.text))
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/* RAM data section. */
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LONG(ADDR(.data))
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LONG(SIZEOF(.data))
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LONG(LOADADDR(.data))
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__earlycopy_end = .;
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} > ROM
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.ctors : ALIGN(4) {
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__ctor_list = .;
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KEEP(*(.ctors .init_array))
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__ctor_end = .;
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} > ROM
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.dtors : ALIGN(4) {
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__dtor_list = .;
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KEEP(*(.dtors .fini_array))
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__dtor_end = .;
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} > ROM
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.got : { *(.got.plt) *(.got) } > ROM
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.dynamic : { *(.dynamic) } > ROM
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__rom_end = .;
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/* TCM code and data sections. */
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.tcm : AT (__rom_end ) ALIGN(4) {
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__tcm_start = .;
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*(.tcmcode)
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. = ALIGN(4);
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*(.tcmdata)
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__tcm_end = ALIGN(4);
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ASSERT(__tcm_end - __tcm_start <= LENGTH(TCM), "TCM overflow!");
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} > TCM
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/* exception stack */
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.except.stack (NOLOAD) : ALIGN(8) {
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__except_stack_start = .;
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. += CSTACK_SIZE;
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__cstack_end = .;
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. += SVC_STACK_SIZE;
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__svc_stack_end = .;
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. += IRQ_STACK_SIZE;
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__irq_stack_end = .;
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. += FIQ_STACK_SIZE;
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__fiq_stack_end = .;
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. += UND_STACK_SIZE;
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__und_stack_end = .;
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. += ABT_STACK_SIZE;
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__abt_stack_end = .;
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__except_stack_end = .;
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} > TCM
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/* place R/W data and some code which cann't xip in the RAM */
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. = ORIGIN(RAM);
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__data_load_start = LOADADDR(.tcm) + SIZEOF (.tcm);
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.data : AT (__data_load_start) ALIGN(4) {
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__data_start = .;
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*(.data .data.* .gnu.linkonce.d.*)
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__commands_start = .;
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KEEP (*(.commands))
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__commands_end = .;
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} > RAM
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__ram_text_load_start = __data_load_start + SIZEOF (.data);
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/* code that is located in ram */
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.ram.text : AT (__ram_text_load_start) ALIGN(4) {
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KEEP (*(.ram.text*))
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} > RAM
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.nocache : ALIGN(1024) {
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_nocacheable_start = .;
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KEEP(*(.nocache))
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. = ALIGN(1024);
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_nocacheable_end = .;
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} > RAM
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.dummy_post_data : {
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/* End of initialized sections. */
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__data_end = ALIGN(4);
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} > RAM
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/* uninitialized data (in same segment as writable data) */
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.bss (NOLOAD) : ALIGN(4) {
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KEEP(*(.bss.prebss.*))
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. = ALIGN(4);
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__bss_start = .;
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end = .;
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} > RAM
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_end = .;
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.heap (NOLOAD) : ALIGN(8) {
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_heap_start = .;
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*(.heap)
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} > RAM
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_end_of_ram = ORIGIN(RAM) + LENGTH(RAM);
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_heap_end = _end_of_ram;
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/* IRAM none-ecc data sections. */
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.noneecc (NOLOAD) : ALIGN(4) {
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_noneecc_start = .;
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*(.noneeccdata)
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_noneecc_end = ORIGIN(RAMECC) + LENGTH(RAMECC);
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} > RAMECC
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/* Strip unnecessary stuff */
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/DISCARD/ : { *(.comment .note) }
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}
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