/* ********************************************************************************************************* * uC/CPU * CPU CONFIGURATION & PORT LAYER * * Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com * * SPDX-License-Identifier: APACHE-2.0 * * This software is subject to an open source license and is distributed by * Silicon Laboratories Inc. pursuant to the terms of the Apache License, * Version 2.0 available at www.apache.org/licenses/LICENSE-2.0. * ********************************************************************************************************* */ /* ********************************************************************************************************* * NOTICE * * Semidrive modified this file to adapt it for ssdk platform. * The modifications are only intended for use with Semidrive chips. * Copyright of all the modifications belongs to Semidrive Semiconductor. * ********************************************************************************************************* */ /* ********************************************************************************************************* * * CPU PORT FILE * * ARMv7-R * GNU C Compiler * * Filename : cpu.h * Version : V1.32.01 ********************************************************************************************************* */ /* ********************************************************************************************************* * MODULE ********************************************************************************************************* */ #ifndef CPU_MODULE_PRESENT #define CPU_MODULE_PRESENT /* ********************************************************************************************************* * CPU INCLUDE FILES * * Note(s) : (1) The following CPU files are located in the following directories : * * (a) \\cpu_cfg.h * * (b) \\cpu_def.h * * (c) \\\\cpu*.* * * where * directory path for Your Product's Application * directory path for common CPU-compiler software * directory name for specific CPU * directory name for specific compiler * * (2) Compiler MUST be configured to include the '\\' directory the * specific CPU-compiler directory, & '\\' as additional include * path directories. * * (3) Since NO custom library modules are included, 'cpu.h' may ONLY use configurations from * CPU configuration file 'cpu_cfg.h' that do NOT reference any custom library definitions. * * In other words, 'cpu.h' may use 'cpu_cfg.h' configurations that are #define'd to numeric * constants or to NULL (i.e. NULL-valued #define's); but may NOT use configurations to * custom library #define's (e.g. DEF_DISABLED or DEF_ENABLED). ********************************************************************************************************* */ #include #include #include /* See Note #3. */ #include #include #include #ifdef __cplusplus extern "C" { #endif /* ********************************************************************************************************* * CONFIGURE STANDARD DATA TYPES * * Note(s) : (1) Configure standard data types according to CPU-/compiler-specifications. * * (2) (a) (1) 'CPU_FNCT_VOID' data type defined to replace the commonly-used function pointer * data type of a pointer to a function which returns void & has no arguments. * * (2) Example function pointer usage : * * CPU_FNCT_VOID FnctName; * * FnctName(); * * (b) (1) 'CPU_FNCT_PTR' data type defined to replace the commonly-used function pointer * data type of a pointer to a function which returns void & has a single void * pointer argument. * * (2) Example function pointer usage : * * CPU_FNCT_PTR FnctName; * void *p_obj * * FnctName(p_obj); ********************************************************************************************************* */ typedef void CPU_VOID; typedef char CPU_CHAR; /* 8-bit character */ typedef unsigned char CPU_BOOLEAN; /* 8-bit boolean or logical */ typedef unsigned char CPU_INT08U; /* 8-bit unsigned integer */ typedef signed char CPU_INT08S; /* 8-bit signed integer */ typedef unsigned short CPU_INT16U; /* 16-bit unsigned integer */ typedef signed short CPU_INT16S; /* 16-bit signed integer */ typedef unsigned int CPU_INT32U; /* 32-bit unsigned integer */ typedef signed int CPU_INT32S; /* 32-bit signed integer */ typedef unsigned long long CPU_INT64U; /* 64-bit unsigned integer */ typedef signed long long CPU_INT64S; /* 64-bit signed integer */ typedef float CPU_FP32; /* 32-bit floating point */ typedef double CPU_FP64; /* 64-bit floating point */ typedef volatile CPU_INT08U CPU_REG08; /* 8-bit register */ typedef volatile CPU_INT16U CPU_REG16; /* 16-bit register */ typedef volatile CPU_INT32U CPU_REG32; /* 32-bit register */ typedef volatile CPU_INT64U CPU_REG64; /* 64-bit register */ typedef void (*CPU_FNCT_VOID)(void); /* See Note #2a. */ typedef void (*CPU_FNCT_PTR )(void *p_obj); /* See Note #2b. */ /* ********************************************************************************************************* * CPU WORD CONFIGURATION * * Note(s) : (1) Configure CPU_CFG_ADDR_SIZE & CPU_CFG_DATA_SIZE with CPU's word sizes : * * CPU_WORD_SIZE_08 8-bit word size * CPU_WORD_SIZE_16 16-bit word size * CPU_WORD_SIZE_32 32-bit word size * CPU_WORD_SIZE_64 64-bit word size See Note #1a * * (a) 64-bit word size NOT currently supported. * * (2) Configure CPU_CFG_ENDIAN_TYPE with CPU's data-word-memory order : * * (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant * octet @ lowest memory address) * (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant * octet @ lowest memory address) ********************************************************************************************************* */ /* Define CPU word sizes (see Note #1) : */ #define CPU_CFG_ADDR_SIZE CPU_WORD_SIZE_32 /* Defines CPU address word size (in octets). */ #define CPU_CFG_DATA_SIZE CPU_WORD_SIZE_32 /* Defines CPU data word size (in octets). */ #define CPU_CFG_DATA_SIZE_MAX CPU_WORD_SIZE_64 /* Defines CPU maximum word size (in octets). */ /* Defines CPU data word-memory order (see Note #2). */ #define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_LITTLE /* ********************************************************************************************************* * CONFIGURE CPU ADDRESS & DATA TYPES ********************************************************************************************************* */ /* CPU address type based on address bus size. */ #if (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_32) typedef CPU_INT32U CPU_ADDR; #elif (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_16) typedef CPU_INT16U CPU_ADDR; #else typedef CPU_INT08U CPU_ADDR; #endif /* CPU data type based on data bus size. */ #if (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32) typedef CPU_INT32U CPU_DATA; #elif (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16) typedef CPU_INT16U CPU_DATA; #else typedef CPU_INT08U CPU_DATA; #endif typedef CPU_DATA CPU_ALIGN; /* Defines CPU data-word-alignment size. */ typedef CPU_ADDR CPU_SIZE_T; /* Defines CPU standard 'size_t' size. */ /* ********************************************************************************************************* * CPU STACK CONFIGURATION * * Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order : * * (a) CPU_STK_GROWTH_LO_TO_HI CPU stack pointer increments to the next higher stack * memory address after data is pushed onto the stack * (b) CPU_STK_GROWTH_HI_TO_LO CPU stack pointer decrements to the next lower stack * memory address after data is pushed onto the stack * * (2) Configure CPU_CFG_STK_ALIGN_BYTES with the highest minimum alignement required for * cpu stacks. * * (a) ARM Procedure Calls Standard requires an 8 bytes stack alignment. ********************************************************************************************************* */ #define CPU_CFG_STK_GROWTH CPU_STK_GROWTH_HI_TO_LO /* Defines CPU stack growth order (see Note #1). */ #define CPU_CFG_STK_ALIGN_BYTES (8u) /* Defines CPU stack alignment in bytes. (see Note #2). */ typedef CPU_INT32U CPU_STK; /* Defines CPU stack data type. */ typedef CPU_ADDR CPU_STK_SIZE; /* Defines CPU stack size data type. */ /* ********************************************************************************************************* * CRITICAL SECTION CONFIGURATION * * Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method : * * Enter/Exit critical sections by ... * * CPU_CRITICAL_METHOD_INT_DIS_EN Disable/Enable interrupts * CPU_CRITICAL_METHOD_STATUS_STK Push/Pop interrupt status onto stack * CPU_CRITICAL_METHOD_STATUS_LOCAL Save/Restore interrupt status to local variable * * (a) CPU_CRITICAL_METHOD_INT_DIS_EN is NOT a preferred method since it does NOT support * multiple levels of interrupts. However, with some CPUs/compilers, this is the only * available method. * * (b) CPU_CRITICAL_METHOD_STATUS_STK is one preferred method since it supports multiple * levels of interrupts. However, this method assumes that the compiler provides C-level * &/or assembly-level functionality for the following : * * ENTER CRITICAL SECTION : * (1) Push/save interrupt status onto a local stack * (2) Disable interrupts * * EXIT CRITICAL SECTION : * (3) Pop/restore interrupt status from a local stack * * (c) CPU_CRITICAL_METHOD_STATUS_LOCAL is one preferred method since it supports multiple * levels of interrupts. However, this method assumes that the compiler provides C-level * &/or assembly-level functionality for the following : * * ENTER CRITICAL SECTION : * (1) Save interrupt status into a local variable * (2) Disable interrupts * * EXIT CRITICAL SECTION : * (3) Restore interrupt status from a local variable * * (2) Critical section macro's most likely require inline assembly. If the compiler does NOT * allow inline assembly in C source files, critical section macro's MUST call an assembly * subroutine defined in a 'cpu_a.asm' file located in the following software directory : * * \\\\ * * where * directory path for common CPU-compiler software * directory name for specific CPU * directory name for specific compiler * * (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need * to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured). * * (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, if * used, MUST be declared following ALL other local variables. * * Example : * * void Fnct (void) * { * CPU_INT08U val_08; * CPU_INT16U val_16; * CPU_INT32U val_32; * CPU_SR_ALLOC(); MUST be declared after ALL other local variables * : * : * } * * (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to * completely store the CPU's/compiler's status word. ********************************************************************************************************* */ /* Configure CPU critical method (see Note #1) : */ #define CPU_CFG_CRITICAL_METHOD CPU_CRITICAL_METHOD_STATUS_LOCAL typedef irq_state_t CPU_SR; /* Defines CPU status register size (see Note #3b). */ /* Allocates CPU status register word (see Note #3a). */ #if (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL) #define CPU_SR_ALLOC() CPU_SR cpu_sr = (CPU_SR)0 #else #define CPU_SR_ALLOC() #endif #define CPU_INT_DIS() do { cpu_sr = arch_irq_save(); DSB; } while (0) #define CPU_INT_EN() do { DSB; arch_irq_restore(cpu_sr); } while (0) #ifdef CPU_CFG_INT_DIS_MEAS_EN /* Disable interrupts, ... */ /* & start interrupts disabled time measurement.*/ #define CPU_CRITICAL_ENTER() do { CPU_INT_DIS(); \ CPU_IntDisMeasStart(); } while (0) /* Stop & measure interrupts disabled time, */ /* ... & re-enable interrupts. */ #define CPU_CRITICAL_EXIT() do { CPU_IntDisMeasStop(); \ CPU_INT_EN(); } while (0) #else #define CPU_CRITICAL_ENTER() do { CPU_INT_DIS(); } while (0) /* Disable interrupts. */ #define CPU_CRITICAL_EXIT() do { CPU_INT_EN(); } while (0) /* Re-enable interrupts. */ #endif /* ********************************************************************************************************* * MEMORY BARRIERS CONFIGURATION * * Note(s) : (1) (a) Configure memory barriers if required by the architecture. * * CPU_MB Full memory barrier. * CPU_RMB Read (Loads) memory barrier. * CPU_WMB Write (Stores) memory barrier. * ********************************************************************************************************* */ #define CPU_MB() DSB #define CPU_RMB() DSB #define CPU_WMB() DSB /* ********************************************************************************************************* * CACHE DEFINES ********************************************************************************************************* */ #if CONFIG_ARCH_WITH_CACHE #define LEN_CACHE_ALIGN(len) ROUNDUP(len, CONFIG_ARCH_CACHE_LINE) #else #define LEN_CACHE_ALIGN(len) (len) #endif /* * The ALLOC_CACHE_ALIGN_BUFFER macro is used to allocate a buffer on the * stack that meets the minimum architecture alignment requirements for DMA. * Such a buffer is useful for DMA operations where flushing and invalidating * the cache before and after a read and/or write operation is required for * correct operations. * * When called the macro creates an array on the stack that is sized such * that: * * 1) The beginning of the array can be advanced enough to be aligned. * * 2) The size of the aligned portion of the array is a multiple of the minimum * architecture alignment required for DMA. * * 3) The aligned portion contains enough space for the original number of * elements requested. * * The macro then creates a pointer to the aligned portion of this array and * assigns to the pointer the address of the first element in the aligned * portion of the array. * * Calling the macro as: * * ALLOC_CACHE_ALIGN_BUFFER(uint32_t, buffer, 1024); * * Will result in something similar to saying: * * uint32_t buffer[1024]; * * The following differences exist: * * 1) The resulting buffer is guaranteed to be aligned to the value of * CONFIG_ARCH_CACHE_LINE. * * 2) The buffer variable created by the macro is a pointer to the specified * type, and NOT an array of the specified type. This can be very important * if you want the address of the buffer, which you probably do, to pass it * to the DMA hardware. The value of &buffer is different in the two cases. * In the macro case it will be the address of the pointer, not the address * of the space reserved for the buffer. However, in the second case it * would be the address of the buffer. So if you are replacing hard coded * stack buffers with this macro you need to make sure you remove the & from * the locations where you are taking the address of the buffer. * * Note that the size parameter is the number of array elements to allocate, * not the number of bytes. * * This macro can not be used outside of function scope, or for the creation * of a function scoped static buffer. It can not be used to create a cache * line aligned global buffer. */ #if CONFIG_ARCH_WITH_CACHE #define ALLOC_ALIGN_BUFFER(type, name, size, align) \ char __##name[ROUNDUP((size) * sizeof(type), align) \ + (align - 1)]; \ \ type *name = (type *)ALIGN((uintptr_t)__##name, align) #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \ ALLOC_ALIGN_BUFFER(type, name, size, CONFIG_ARCH_CACHE_LINE) #else #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \ type __##name[size]; \ \ type *name = __##name #endif /* ********************************************************************************************************* * CPU COUNT ZEROS CONFIGURATION * * Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits * function(s) in : * * (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ * 'cpu_cfg.h' to enable assembly-optimized function(s) * * (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ * 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise * * (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits * function(s) in : * * (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ * 'cpu_cfg.h' to enable assembly-optimized function(s) * * (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ * 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise ********************************************************************************************************* */ /* Configure CPU count leading zeros bits ... */ #define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */ /* Configure CPU count trailing zeros bits ... */ #define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */ /* ********************************************************************************************************* * FUNCTION PROTOTYPES * * Note(s) : (1) CPU_CntLeadZeros() prototyped/defined respectively in : * * (a) 'cpu.h'/'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/ * 'cpu_cfg.h' to enable assembly-version function * * (b) 'cpu_core.h'/'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/ * 'cpu_cfg.h' to enable C-source-version function otherwise * * See also 'cpu_core.h FUNCTION PROTOTYPES Note #2'. * * (2) CPU_PMU_xxx() functions are intended to manage the Event & Performanace Monitor unit (PMU). ********************************************************************************************************* */ void CPU_IntDis (void); void CPU_IntEn (void); CPU_SR CPU_SR_Save (void); void CPU_SR_Restore (CPU_SR cpu_sr); void CPU_WaitForInt (void); void CPU_WaitForEvent (void); /* ********************************************************************************************************* * CONFIGURATION ERRORS ********************************************************************************************************* */ #ifndef CPU_CFG_ADDR_SIZE #error "CPU_CFG_ADDR_SIZE not #define'd in 'cpu.h' " #error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]" #error " [ || CPU_WORD_SIZE_16 16-bit alignment]" #error " [ || CPU_WORD_SIZE_32 32-bit alignment]" #elif ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \ (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \ (CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32)) #error "CPU_CFG_ADDR_SIZE illegally #define'd in 'cpu.h' " #error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]" #error " [ || CPU_WORD_SIZE_16 16-bit alignment]" #error " [ || CPU_WORD_SIZE_32 32-bit alignment]" #endif #ifndef CPU_CFG_DATA_SIZE #error "CPU_CFG_DATA_SIZE not #define'd in 'cpu.h' " #error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]" #error " [ || CPU_WORD_SIZE_16 16-bit alignment]" #error " [ || CPU_WORD_SIZE_32 32-bit alignment]" #elif ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \ (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \ (CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32)) #error "CPU_CFG_DATA_SIZE illegally #define'd in 'cpu.h' " #error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]" #error " [ || CPU_WORD_SIZE_16 16-bit alignment]" #error " [ || CPU_WORD_SIZE_32 32-bit alignment]" #endif #ifndef CPU_CFG_ENDIAN_TYPE #error "CPU_CFG_ENDIAN_TYPE not #define'd in 'cpu.h' " #error " [MUST be CPU_ENDIAN_TYPE_BIG ]" #error " [ || CPU_ENDIAN_TYPE_LITTLE]" #elif ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG ) && \ (CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE)) #error "CPU_CFG_ENDIAN_TYPE illegally #define'd in 'cpu.h' " #error " [MUST be CPU_ENDIAN_TYPE_BIG ]" #error " [ || CPU_ENDIAN_TYPE_LITTLE]" #endif #ifndef CPU_CFG_STK_GROWTH #error "CPU_CFG_STK_GROWTH not #define'd in 'cpu.h' " #error " [MUST be CPU_STK_GROWTH_LO_TO_HI]" #error " [ || CPU_STK_GROWTH_HI_TO_LO]" #elif ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \ (CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO)) #error "CPU_CFG_STK_GROWTH illegally #define'd in 'cpu.h' " #error " [MUST be CPU_STK_GROWTH_LO_TO_HI]" #error " [ || CPU_STK_GROWTH_HI_TO_LO]" #endif #ifndef CPU_CFG_CRITICAL_METHOD #error "CPU_CFG_CRITICAL_METHOD not #define'd in 'cpu.h' " #error " [MUST be CPU_CRITICAL_METHOD_INT_DIS_EN ]" #error " [ || CPU_CRITICAL_METHOD_STATUS_STK ]" #error " [ || CPU_CRITICAL_METHOD_STATUS_LOCAL]" #elif ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN ) && \ (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK ) && \ (CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL)) #error "CPU_CFG_CRITICAL_METHOD illegally #define'd in 'cpu.h' " #error " [MUST be CPU_CRITICAL_METHOD_INT_DIS_EN ]" #error " [ || CPU_CRITICAL_METHOD_STATUS_STK ]" #error " [ || CPU_CRITICAL_METHOD_STATUS_LOCAL]" #endif /* ********************************************************************************************************* * MODULE END ********************************************************************************************************* */ #ifdef __cplusplus } #endif #endif /* End of CPU module include. */