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106
arch/include/armv7-r/mpu.h
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106
arch/include/armv7-r/mpu.h
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/*
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* mpu.h
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*
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* Copyright (c) 2019 Semidrive Semiconductor.
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* All rights reserved.
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*
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* Description: Cortex V7R MPU driver.
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*
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* Revision History:
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* -----------------
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*/
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#ifndef INCLUDE_ARCH_ARMV7R_MPU_H
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#define INCLUDE_ARCH_ARMV7R_MPU_H
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/*
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* Memory types supported by the MPU driver.
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*/
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typedef enum mpu_region_type {
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/* Strong ordered
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* - non-bufferable, non-cachable, shareable, RW, XN
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*/
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MPU_REGION_STRONGORDERED,
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/* Device memory
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* - bufferable, non-cachable, shareable, RW, XN
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*/
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MPU_REGION_DEVICE,
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/* Normal memory
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* - bufferable, outer and inner write-back & write allocate,
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* shareble, RW, non XN
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*/
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MPU_REGION_NORMAL,
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/* Normal non-cacheable memory
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* - bufferable, outer and inner non-cacheable, shareble, RW,
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* non XN
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*/
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MPU_REGION_NORMAL_NONCACHEABLE,
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/* Normal ready-only memory
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* - bufferable, outer and inner wb, no wa, no shareble, RO,
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* non XN
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*/
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MPU_REGION_NORMAL_RO,
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/* Not accessable.
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*/
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MPU_REGION_NO_ACCESS,
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MPU_REGION_MAX,
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} mpu_region_type_e;
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#ifndef ASSEMBLY
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#include <compiler.h>
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#include <stdbool.h>
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#include <types.h>
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typedef struct mpu_config {
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addr_t addr;
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uint64_t size;
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mpu_region_type_e type;
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} mpu_config_t;
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__BEGIN_CDECLS
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#if CONFIG_ARCH_WITH_MPU
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void mpu_clear_region(void);
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#else
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#define mpu_clear_region()
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#endif
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#if CONFIG_ARCH_WITH_MPU
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void mpu_add_region(int region, uint32_t base, uint64_t size,
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mpu_region_type_e type);
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#else
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#define mpu_add_region(region, base, size, type)
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#endif
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uint32_t mpu_region_index(void);
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#if CONFIG_ARCH_WITH_MPU
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void mpu_enable(bool enable);
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#else
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#define mpu_enable(enable)
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#endif
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#if CONFIG_ARCH_WITH_MPU
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bool mpu_is_belong_uncache_region(uint32_t base, uint32_t size);
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#else
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#define mpu_is_belong_uncache_region(base, size)
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#endif
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#if CONFIG_ARCH_WITH_MPU
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void mpu_region_set_type(uint32_t base, uint64_t size,
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mpu_region_type_e type);
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#else
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#define mpu_region_set_type(base, size, type)
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#endif
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__END_CDECLS
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#endif /* ASSEMBLY */
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#endif
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