liumin/acquisition_module_PCB
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

第一次提交

Browse Source
This commit is contained in:
liumin
2025-11-08 13:09:55 +08:00
commit 889d86c93e
214 changed files with 28683 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

74
Project Outputs for PCB_Project2/Design Rule Check - PCB1.drc Normal file
View File

@@ -0,0 +1,74 @@
Protel Design System Design Rule Check
PCB File : E:\liumin\PCB\202410013-<2D><><EFBFBD><EFBFBD>\PCB1.PcbDoc
Date : 2025/5/26
Time : 18:52:53
WARNING: Unplated multi-layer pad(s) detected
Pad P2-14(123.6606mm,6.1298mm) Multi-Layer on Net TEMP2
Pad P2-13(123.6352mm,8.6698mm) Multi-Layer on Net TEMP4
Pad P2-12(123.6352mm,11.2098mm) Multi-Layer on Net TEMP3
Pad P2-11(123.6352mm,13.7498mm) Multi-Layer on Net TEMP1
Pad P2-10(123.6352mm,16.2898mm) Multi-Layer on Net CAN0H
Pad P2-9(123.6352mm,18.8298mm) Multi-Layer on Net CAN0L
Pad P2-8(123.6352mm,21.3698mm) Multi-Layer on Net V5VG2
Pad P2-7(123.6352mm,23.9098mm) Multi-Layer on Net V5V2
Pad P2-6(123.6352mm,26.4498mm) Multi-Layer on Net NETLABEL69
Pad P2-5(123.6352mm,28.9898mm) Multi-Layer on Net VOU1
Pad P2-4(123.6352mm,31.5298mm) Multi-Layer on Net 24V
Pad P2-3(123.6352mm,34.0698mm) Multi-Layer on Net 24V
Pad P2-2(123.6352mm,36.6098mm) Multi-Layer on Net 24VG
Pad P2-1(123.6352mm,39.1498mm) Multi-Layer on Net 24VG
Pad P1-14(76.2206mm,6.1214mm) Multi-Layer on Net INPUT1G
Pad P1-13(76.246mm,8.6614mm) Multi-Layer on Net INPUT1
Pad P1-12(76.246mm,11.2014mm) Multi-Layer on Net INPUT5G
Pad P1-11(76.246mm,13.7414mm) Multi-Layer on Net INPUT5
Pad P1-10(76.246mm,16.2814mm) Multi-Layer on Net INPUT6G
Pad P1-9(76.246mm,18.8214mm) Multi-Layer on Net INPUT6
Pad P1-8(76.246mm,21.3614mm) Multi-Layer on Net INPUT2G
Pad P1-7(76.246mm,23.9014mm) Multi-Layer on Net INPUT2
Pad P1-6(76.246mm,26.4414mm) Multi-Layer on Net INPUT3G
Pad P1-5(76.246mm,28.9814mm) Multi-Layer on Net INPUT3
Pad P1-4(76.246mm,31.5214mm) Multi-Layer on Net INPUT4G
Pad P1-3(76.246mm,34.0614mm) Multi-Layer on Net INPUT4
Pad P1-2(76.246mm,36.6014mm) Multi-Layer on Net INPUT7G
Pad P1-1(76.246mm,39.1414mm) Multi-Layer on Net INPUT7
Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0
Processing Rule : Un-Routed Net Constraint ( (All) )
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.15mm) (All),(All)
Rule Violations :0
Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
Rule Violations :0
Processing Rule : Width Constraint (Min=0.1mm) (Max=4mm) (Preferred=0.5mm) (All)
Rule Violations :0
Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
Rule Violations :0
Processing Rule : Hole Size Constraint (Min=0.0254mm) (Max=5mm) (All)
Rule Violations :0
Processing Rule : Hole To Hole Clearance (Gap=0mm) (All),(All)
Rule Violations :0
Processing Rule : Minimum Solder Mask Sliver (Gap=0mm) (All),(All)
Rule Violations :0
Processing Rule : Silk To Solder Mask (Clearance=0mm) (IsPad),(All)
Rule Violations :0
Processing Rule : Silk to Silk (Clearance=0mm) (All),(All)
Rule Violations :0
Processing Rule : Net Antennae (Tolerance=0mm) (All)
Rule Violations :0
Violations Detected : 0
Time Elapsed : 00:00:01