Files
acquisition_module/ADC.C
2025-07-05 07:47:22 +08:00

445 lines
16 KiB
C

//****************************************************************************
// @Module Analog / Digital Converter (ADC)
// @Filename ADC.C
// @Project CL2.0.dav
//----------------------------------------------------------------------------
// @Controller Infineon XC886CLM-8FF
//
// @Compiler Keil
//
// @Codegenerator 1.3
//
// @Description: This file contains functions that use the ADC module.
//
//----------------------------------------------------------------------------
// @Date 2025/4/27 16:05:22
//
//****************************************************************************
// USER CODE BEGIN (ADC_General,1)
// USER CODE END
//****************************************************************************
// @Project Includes
//****************************************************************************
#include "MAIN.H"
// USER CODE BEGIN (ADC_General,2)
// USER CODE END
//****************************************************************************
// @Macros
//****************************************************************************
// USER CODE BEGIN (ADC_General,3)
// USER CODE END
//****************************************************************************
// @Defines
//****************************************************************************
// USER CODE BEGIN (ADC_General,4)
// USER CODE END
//****************************************************************************
// @Typedefs
//****************************************************************************
// USER CODE BEGIN (ADC_General,5)
// USER CODE END
//****************************************************************************
// @Imported Global Variables
//****************************************************************************
// USER CODE BEGIN (ADC_General,6)
// USER CODE END
//****************************************************************************
// @Global Variables
//****************************************************************************
// USER CODE BEGIN (ADC_General,7)
// USER CODE END
//****************************************************************************
// @External Prototypes
//****************************************************************************
// USER CODE BEGIN (ADC_General,8)
// USER CODE END
//****************************************************************************
// @Prototypes Of Local Functions
//****************************************************************************
// USER CODE BEGIN (ADC_General,9)
// USER CODE END
//****************************************************************************
// @Function void ADC_vInit(void)
//
//----------------------------------------------------------------------------
// @Description This is the initialization function of the ADC function
// library. It is assumed that the SFRs used by this library
// are in their reset state.
//
// Following SFR fields will be initialized:
// GLOBCTR - Global Control
// PRAR - Priority and Arbitration Register
// ETRCR - External Trigger Control Register
// CHCTRx - Channel Control Register x
// RCRx - Result Control Register x
//
//----------------------------------------------------------------------------
// @Returnvalue None
//
//----------------------------------------------------------------------------
// @Parameters None
//
//----------------------------------------------------------------------------
// @Date 2025/4/27
//
//****************************************************************************
// USER CODE BEGIN (ADC_Init,1)
// USER CODE END
void ADC_vInit(void)
{
// USER CODE BEGIN (ADC_Init,2)
// USER CODE END
/// -----------------------------------------------------------------------
/// Configuration of Global Control:
/// -----------------------------------------------------------------------
/// - the ADC module clock is enabled
/// - the ADC module clock = 24.00 MHz
///
/// - the result is 10 bits wide
/// --- Conversion Timing -----------------
/// - conversion time (CTC) = 17.38 us
/// - Configure global control functions
SFR_PAGE(_ad0, noSST); // switch to page 0
ADC_GLOBCTR = 0x30; // load global control register
/// -----------------------------------------------------------------------
/// Configuration of Priority and Arbitration:
/// -----------------------------------------------------------------------
/// - the priority of request source 0 is low
/// - the wait-for-start mode is selected for source 0
/// - the priority of request source 1 is high
/// - the wait-for-start mode is selected for source 1
/// - the arbitration started by pending conversion request is selected
/// - Arbitration Slot 0 is disabled
/// - Arbitration Slot 1 is enabled
ADC_PRAR = 0x94; // load Priority and Arbitration register
SFR_PAGE(_ad1, noSST); // switch to page 1
/// -----------------------------------------------------------------------
/// Configuration of Channel Control Registers:
/// -----------------------------------------------------------------------
/// Configuration of Channel 7
/// - the result register0 is selected
/// - the limit check 0 is selected
ADC_CHCTR7 = 0x00; // load channel control register
SFR_PAGE(_ad0, noSST); // switch to page 0
/// -----------------------------------------------------------------------
/// Configuration of Sample Time Control:
/// -----------------------------------------------------------------------
ADC_INPCR0 = 0x00; // load input class register
SFR_PAGE(_ad4, noSST); // switch to page 4
/// -----------------------------------------------------------------------
/// Configuration of Result Control Registers:
/// -----------------------------------------------------------------------
/// Configuration of Result Control Register 0
/// - the data reduction filter is disabled
/// - the event interrupt is disabled
/// - the wait-for-read mode is enabled
/// - the VF reset by read access to RESRxH/RESRAxH
ADC_RCR0 = 0xC0; // load result control register 0
/// Configuration of Result Control Register 1
/// - the data reduction filter is disabled
/// - the event interrupt is disabled
/// - the wait-for-read mode is disabled
/// - the VF unchaned by read access to RESRxH/RESRAxH
ADC_RCR1 = 0x00; // load result control register 1
/// Configuration of Result Control Register 2
/// - the data reduction filter is disabled
/// - the event interrupt is disabled
/// - the wait-for-read mode is disabled
/// - the VF unchaned by read access to RESRxH/RESRAxH
ADC_RCR2 = 0x00; // load result control register 2
/// Configuration of Result Control Register 3
/// - the data reduction filter is disabled
/// - the event interrupt is disabled
/// - the wait-for-read mode is disabled
/// - the VF unchaned by read access to RESRxH/RESRAxH
ADC_RCR3 = 0x00; // load result control register 3
SFR_PAGE(_ad5, noSST); // switch to page 5
/// -----------------------------------------------------------------------
/// Configuration of Channel Interrupt Node Pointer Register:
/// -----------------------------------------------------------------------
/// - the SR 0 line become activated if channel 0 interrupt is generated
/// - the SR 0 line become activated if channel 1 interrupt is generated
/// - the SR 0 line become activated if channel 2 interrupt is generated
/// - the SR 0 line become activated if channel 3 interrupt is generated
/// - the SR 0 line become activated if channel 4 interrupt is generated
/// - the SR 0 line become activated if channel 5 interrupt is generated
/// - the SR 0 line become activated if channel 6 interrupt is generated
/// - the SR 0 line become activated if channel 7 interrupt is generated
ADC_CHINPR = 0x00; // load channel interrupt node pointer
// register
/// -----------------------------------------------------------------------
/// Configuration of Event Interrupt Node Pointer Registers:
/// -----------------------------------------------------------------------
/// - the SR 0 line become activated if the event 0 interrupt is generated
/// - the SR 0 line become activated if the event 1 interrupt is generated
/// - the SR 0 line become activated if the event 4 interrupt is generated
/// - the SR 0 line become activated if the event 5 interrupt is generated
/// - the SR 0 line become activated if the event 6 interrupt is generated
/// - the SR 0 line become activated if the event 7 interrupt is generated
ADC_EVINPR = 0x00; // load event interrupt set flag register
SFR_PAGE(_ad0, noSST); // switch to page 0
/// -----------------------------------------------------------------------
/// Configuration of Limit Check Boundary:
/// -----------------------------------------------------------------------
ADC_LCBR = 0xB7; // load limit check boundary register
/// -----------------------------------------------------------------------
/// Configuration of External Trigger Control:
/// -----------------------------------------------------------------------
/// - the trigger input ETR00 is selected for Source 0
/// - the trigger input ETR10 is selected for Source 1
/// - the synchronizing stage is not in external trigger input REQTR0 path
/// - the synchronizing stage is not in external trigger input REQTR1 path
ADC_ETRCR = 0x00; // load external trigger control register
SFR_PAGE(_ad6, noSST); // switch to page 6
/// -----------------------------------------------------------------------
/// Configuration of Conversion Queue Mode Register:
/// -----------------------------------------------------------------------
/// - the gating line is permanently 0
/// - the external trigger is disabled
/// - the trigger mode 0 is selected
ADC_QMR0 = 0x00; // load queue mode register
/// -----------------------------------------------------------------------
/// Configuration of Conversion Request Mode Registers:
/// -----------------------------------------------------------------------
/// - the gating line is permanently 1
/// - the external trigger is disabled
/// - the source interrupt is disabled
/// - the autoscan functionality is disabled
ADC_CRMR1 = 0x01; // load conversion request mode register 1
SFR_PAGE(_ad0, noSST); // switch to page 0
ADC_GLOBCTR |= 0x80; // turn on Analog part
/// - ADC-Interrupt (EADC) remains disabled
// USER CODE BEGIN (ADC_Init,3)
// USER CODE END
} // End of function ADC_vInit
//****************************************************************************
// @Function void ADC_vSetLoadEvent(void)
//
//----------------------------------------------------------------------------
// @Description This function generates load event.
//
//----------------------------------------------------------------------------
// @Returnvalue None
//
//----------------------------------------------------------------------------
// @Parameters None
//
//----------------------------------------------------------------------------
// @Date 2025/4/27
//
//****************************************************************************
void ADC_vSetLoadEvent(void)
{
SFR_PAGE(_ad6, SST1); // switch to page 6
ADC_CRMR1 |= 0x40; // set LDEV
SFR_PAGE(_ad0, RST1); // restore the old ADC page
} // End of function ADC_vSetLoadEvent
//****************************************************************************
// @Function void ADC_vStartParReqChNum(ubyte ubChannelNum)
//
//----------------------------------------------------------------------------
// @Description This function strarts conversion request of analog
// channel.The possible values for the request channels are:
// Bit 4 = 1 -> analog channel 4 is requested for
// conversion
// Bit 5 = 1 -> analog channel 5 is requested for
// conversion
// Bit 6 = 1 -> analog channel 6 is requested for
// conversion
// Bit 7 = 1 -> analog channel 7 is requested for
// conversion
//
//----------------------------------------------------------------------------
// @Returnvalue None
//
//----------------------------------------------------------------------------
// @Parameters ubChannelNum:
// Name of the Valid Flag Register
//
//----------------------------------------------------------------------------
// @Date 2025/4/27
//
//****************************************************************************
void ADC_vStartParReqChNum(ubyte ubChannelNum)
{
SFR_PAGE(_ad6, SST1); // switch to page 6
ADC_CRPR1 |= ubChannelNum ; // requested channel number
SFR_PAGE(_ad0, RST1); // restore the old ADC page
} // End of function ADC_vStartParReqChNum
//****************************************************************************
// @Function ubyte ADC_ubBusy(void)
//
//----------------------------------------------------------------------------
// @Description This function checks the conversion state of the current
// ADC-channel by examination of the busy flag (BUSY). It
// returns '1' while a conversion is running.
//
//----------------------------------------------------------------------------
// @Returnvalue 1 if conversion is currently active, else 0
//
//----------------------------------------------------------------------------
// @Parameters None
//
//----------------------------------------------------------------------------
// @Date 2025/4/27
//
//****************************************************************************
ubyte ADC_ubBusy(void)
{
ubyte ubResult = 0;
SFR_PAGE(_ad0, SST1); // switch to page 0
ubResult = ADC_GLOBSTR & 0x01;
SFR_PAGE(_ad0, RST1); // restore the old ADC page
return(ubResult);
} // End of function ADC_ubBusy
//****************************************************************************
// @Function uword ADC_uwGetResultData0(void)
//
//----------------------------------------------------------------------------
// @Description This function reads the 8- or 10-bit conversion results
// from result register 0
//
//----------------------------------------------------------------------------
// @Returnvalue Conversion Result
//
//----------------------------------------------------------------------------
// @Parameters None
//
//----------------------------------------------------------------------------
// @Date 2025/4/27
//
//****************************************************************************
uword ADC_uwGetResultData0(void)
{
uword uwResult = 0;
SFR_PAGE(_ad2, SST1); // switch to page 2
if ( ADC_RESR0L & 0x10 ) // if Result Register0 contains valid data
{
// 10-bit conversion (without accumulation)
uwResult = ((ADC_RESR0L >> 6) & 0x03); // Result Register0 Low
uwResult = (((uword)(ADC_RESR0H << 2)) + uwResult); // Result Register0 High
}
SFR_PAGE(_ad0, RST1); // restore the old ADC page
return(uwResult);
} // End of function ADC_uwGetResultData0
// USER CODE BEGIN (ADC_General,10)
// USER CODE END