74 lines
3.0 KiB
Plaintext
74 lines
3.0 KiB
Plaintext
Protel Design System Design Rule Check
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PCB File : E:\liumin\PCB\20241203Ò£¿ØÆ÷\PCB1.PcbDoc
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Date : 2025/5/26
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Time : 16:35:58
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WARNING: Unplated multi-layer pad(s) detected
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Pad P1-1(-0.9446mm,41.26mm) Multi-Layer on Net 24V
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Pad P1-2(-0.9446mm,38.72mm) Multi-Layer on Net 24V
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Pad P1-3(-0.9446mm,36.18mm) Multi-Layer on Net 24VG
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Pad P1-4(-0.9446mm,33.64mm) Multi-Layer on Net 24VG
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Pad P1-5(-0.9446mm,31.1mm) Multi-Layer on Net NETLABEL49
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Pad P1-6(-0.9446mm,28.56mm) Multi-Layer on Net NETLABEL50
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Pad P1-7(-0.9446mm,26.02mm) Multi-Layer on Net NETLABEL51
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Pad P1-8(-0.9446mm,23.48mm) Multi-Layer on Net NETLABEL52
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Pad P1-9(-0.9446mm,20.94mm) Multi-Layer on Net NETLABEL53
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Pad P1-10(-0.9446mm,18.4mm) Multi-Layer on Net NETLABEL54
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Pad P1-11(-0.9446mm,15.86mm) Multi-Layer on Net NETLABEL55
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Pad P1-12(-0.9446mm,13.32mm) Multi-Layer on Net NETLABEL56
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Pad P1-13(-0.9446mm,10.78mm) Multi-Layer on Net NETLABEL57
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Pad P1-14(-0.97mm,8.24mm) Multi-Layer on Net NETLABEL58
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Pad P2-1(46.4446mm,41.26mm) Multi-Layer on Net CAN0H
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Pad P2-2(46.4446mm,38.72mm) Multi-Layer on Net CAN0H
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Pad P2-3(46.4446mm,36.18mm) Multi-Layer on Net CAN0L
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Pad P2-4(46.4446mm,33.64mm) Multi-Layer on Net CAN0L
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Pad P2-5(46.4446mm,31.1mm) Multi-Layer on Net NETLABEL59
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Pad P2-6(46.4446mm,28.56mm) Multi-Layer on Net NETLABEL60
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Pad P2-7(46.4446mm,26.02mm) Multi-Layer on Net NETLABEL62
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Pad P2-8(46.4446mm,23.48mm) Multi-Layer on Net NETLABEL61
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Pad P2-9(46.4446mm,20.94mm) Multi-Layer on Net NETLABEL63
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Pad P2-10(46.4446mm,18.4mm) Multi-Layer on Net NETLABEL64
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Pad P2-11(46.4446mm,15.86mm) Multi-Layer on Net NETLABEL65
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Pad P2-12(46.4446mm,13.32mm) Multi-Layer on Net NETLABEL66
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Pad P2-13(46.4446mm,10.78mm) Multi-Layer on Net NETLABEL67
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Pad P2-14(46.47mm,8.24mm) Multi-Layer on Net NETLABEL68
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Processing Rule : Net Antennae (Tolerance=0mm) (All)
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Rule Violations :0
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Processing Rule : Silk to Silk (Clearance=0mm) (All),(All)
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Rule Violations :0
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Processing Rule : Silk To Solder Mask (Clearance=0mm) (IsPad),(All)
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Rule Violations :0
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Processing Rule : Minimum Solder Mask Sliver (Gap=0mm) (All),(All)
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Rule Violations :0
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Processing Rule : Hole To Hole Clearance (Gap=0mm) (All),(All)
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Rule Violations :0
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Processing Rule : Hole Size Constraint (Min=0.0254mm) (Max=5mm) (All)
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Rule Violations :0
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Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
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Rule Violations :0
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Processing Rule : Width Constraint (Min=0.1mm) (Max=4mm) (Preferred=0.5mm) (All)
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Rule Violations :0
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Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
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Rule Violations :0
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Processing Rule : Clearance Constraint (Gap=0.15mm) (All),(All)
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Rule Violations :0
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Processing Rule : Un-Routed Net Constraint ( (All) )
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Rule Violations :0
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Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
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Rule Violations :0
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Violations Detected : 0
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Time Elapsed : 00:00:01 |