445 lines
16 KiB
C
445 lines
16 KiB
C
//****************************************************************************
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// @Module Analog / Digital Converter (ADC)
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// @Filename ADC.C
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// @Project CL2.0.dav
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//----------------------------------------------------------------------------
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// @Controller Infineon XC886CLM-8FF
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//
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// @Compiler Keil
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//
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// @Codegenerator 1.3
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//
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// @Description: This file contains functions that use the ADC module.
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//
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//----------------------------------------------------------------------------
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// @Date 2025/4/27 16:05:22
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//
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,1)
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// USER CODE END
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//****************************************************************************
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// @Project Includes
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//****************************************************************************
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#include "MAIN.H"
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// USER CODE BEGIN (ADC_General,2)
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// USER CODE END
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//****************************************************************************
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// @Macros
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,3)
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// USER CODE END
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//****************************************************************************
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// @Defines
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,4)
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// USER CODE END
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//****************************************************************************
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// @Typedefs
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,5)
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// USER CODE END
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//****************************************************************************
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// @Imported Global Variables
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,6)
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// USER CODE END
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//****************************************************************************
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// @Global Variables
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,7)
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// USER CODE END
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//****************************************************************************
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// @External Prototypes
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,8)
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// USER CODE END
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//****************************************************************************
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// @Prototypes Of Local Functions
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//****************************************************************************
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// USER CODE BEGIN (ADC_General,9)
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// USER CODE END
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//****************************************************************************
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// @Function void ADC_vInit(void)
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//
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//----------------------------------------------------------------------------
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// @Description This is the initialization function of the ADC function
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// library. It is assumed that the SFRs used by this library
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// are in their reset state.
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//
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// Following SFR fields will be initialized:
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// GLOBCTR - Global Control
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// PRAR - Priority and Arbitration Register
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// ETRCR - External Trigger Control Register
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// CHCTRx - Channel Control Register x
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// RCRx - Result Control Register x
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//
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//----------------------------------------------------------------------------
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// @Returnvalue None
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//
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//----------------------------------------------------------------------------
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// @Parameters None
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//
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//----------------------------------------------------------------------------
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// @Date 2025/4/27
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//
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//****************************************************************************
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// USER CODE BEGIN (ADC_Init,1)
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// USER CODE END
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void ADC_vInit(void)
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{
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// USER CODE BEGIN (ADC_Init,2)
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// USER CODE END
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/// -----------------------------------------------------------------------
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/// Configuration of Global Control:
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/// -----------------------------------------------------------------------
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/// - the ADC module clock is enabled
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/// - the ADC module clock = 24.00 MHz
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///
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/// - the result is 10 bits wide
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/// --- Conversion Timing -----------------
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/// - conversion time (CTC) = 17.38 us
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/// - Configure global control functions
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SFR_PAGE(_ad0, noSST); // switch to page 0
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ADC_GLOBCTR = 0x30; // load global control register
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/// -----------------------------------------------------------------------
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/// Configuration of Priority and Arbitration:
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/// -----------------------------------------------------------------------
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/// - the priority of request source 0 is low
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/// - the wait-for-start mode is selected for source 0
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/// - the priority of request source 1 is high
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/// - the wait-for-start mode is selected for source 1
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/// - the arbitration started by pending conversion request is selected
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/// - Arbitration Slot 0 is disabled
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/// - Arbitration Slot 1 is enabled
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ADC_PRAR = 0x94; // load Priority and Arbitration register
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SFR_PAGE(_ad1, noSST); // switch to page 1
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/// -----------------------------------------------------------------------
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/// Configuration of Channel Control Registers:
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/// -----------------------------------------------------------------------
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/// Configuration of Channel 7
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/// - the result register0 is selected
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/// - the limit check 0 is selected
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ADC_CHCTR7 = 0x00; // load channel control register
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SFR_PAGE(_ad0, noSST); // switch to page 0
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/// -----------------------------------------------------------------------
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/// Configuration of Sample Time Control:
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/// -----------------------------------------------------------------------
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ADC_INPCR0 = 0x00; // load input class register
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SFR_PAGE(_ad4, noSST); // switch to page 4
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/// -----------------------------------------------------------------------
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/// Configuration of Result Control Registers:
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/// -----------------------------------------------------------------------
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/// Configuration of Result Control Register 0
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/// - the data reduction filter is disabled
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/// - the event interrupt is disabled
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/// - the wait-for-read mode is enabled
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/// - the VF reset by read access to RESRxH/RESRAxH
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ADC_RCR0 = 0xC0; // load result control register 0
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/// Configuration of Result Control Register 1
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/// - the data reduction filter is disabled
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/// - the event interrupt is disabled
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/// - the wait-for-read mode is disabled
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/// - the VF unchaned by read access to RESRxH/RESRAxH
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ADC_RCR1 = 0x00; // load result control register 1
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/// Configuration of Result Control Register 2
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/// - the data reduction filter is disabled
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/// - the event interrupt is disabled
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/// - the wait-for-read mode is disabled
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/// - the VF unchaned by read access to RESRxH/RESRAxH
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ADC_RCR2 = 0x00; // load result control register 2
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/// Configuration of Result Control Register 3
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/// - the data reduction filter is disabled
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/// - the event interrupt is disabled
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/// - the wait-for-read mode is disabled
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/// - the VF unchaned by read access to RESRxH/RESRAxH
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ADC_RCR3 = 0x00; // load result control register 3
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SFR_PAGE(_ad5, noSST); // switch to page 5
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/// -----------------------------------------------------------------------
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/// Configuration of Channel Interrupt Node Pointer Register:
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/// -----------------------------------------------------------------------
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/// - the SR 0 line become activated if channel 0 interrupt is generated
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/// - the SR 0 line become activated if channel 1 interrupt is generated
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/// - the SR 0 line become activated if channel 2 interrupt is generated
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/// - the SR 0 line become activated if channel 3 interrupt is generated
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/// - the SR 0 line become activated if channel 4 interrupt is generated
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/// - the SR 0 line become activated if channel 5 interrupt is generated
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/// - the SR 0 line become activated if channel 6 interrupt is generated
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/// - the SR 0 line become activated if channel 7 interrupt is generated
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ADC_CHINPR = 0x00; // load channel interrupt node pointer
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// register
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/// -----------------------------------------------------------------------
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/// Configuration of Event Interrupt Node Pointer Registers:
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/// -----------------------------------------------------------------------
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/// - the SR 0 line become activated if the event 0 interrupt is generated
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/// - the SR 0 line become activated if the event 1 interrupt is generated
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/// - the SR 0 line become activated if the event 4 interrupt is generated
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/// - the SR 0 line become activated if the event 5 interrupt is generated
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/// - the SR 0 line become activated if the event 6 interrupt is generated
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/// - the SR 0 line become activated if the event 7 interrupt is generated
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ADC_EVINPR = 0x00; // load event interrupt set flag register
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SFR_PAGE(_ad0, noSST); // switch to page 0
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/// -----------------------------------------------------------------------
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/// Configuration of Limit Check Boundary:
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/// -----------------------------------------------------------------------
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ADC_LCBR = 0xB7; // load limit check boundary register
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/// -----------------------------------------------------------------------
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/// Configuration of External Trigger Control:
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/// -----------------------------------------------------------------------
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/// - the trigger input ETR00 is selected for Source 0
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/// - the trigger input ETR10 is selected for Source 1
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/// - the synchronizing stage is not in external trigger input REQTR0 path
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/// - the synchronizing stage is not in external trigger input REQTR1 path
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ADC_ETRCR = 0x00; // load external trigger control register
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SFR_PAGE(_ad6, noSST); // switch to page 6
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/// -----------------------------------------------------------------------
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/// Configuration of Conversion Queue Mode Register:
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/// -----------------------------------------------------------------------
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/// - the gating line is permanently 0
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/// - the external trigger is disabled
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/// - the trigger mode 0 is selected
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ADC_QMR0 = 0x00; // load queue mode register
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/// -----------------------------------------------------------------------
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/// Configuration of Conversion Request Mode Registers:
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/// -----------------------------------------------------------------------
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/// - the gating line is permanently 1
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/// - the external trigger is disabled
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/// - the source interrupt is disabled
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/// - the autoscan functionality is disabled
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ADC_CRMR1 = 0x01; // load conversion request mode register 1
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SFR_PAGE(_ad0, noSST); // switch to page 0
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ADC_GLOBCTR |= 0x80; // turn on Analog part
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/// - ADC-Interrupt (EADC) remains disabled
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// USER CODE BEGIN (ADC_Init,3)
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// USER CODE END
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} // End of function ADC_vInit
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//****************************************************************************
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// @Function void ADC_vSetLoadEvent(void)
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//
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//----------------------------------------------------------------------------
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// @Description This function generates load event.
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//
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//----------------------------------------------------------------------------
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// @Returnvalue None
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//
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//----------------------------------------------------------------------------
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// @Parameters None
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//
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//----------------------------------------------------------------------------
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// @Date 2025/4/27
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//
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//****************************************************************************
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void ADC_vSetLoadEvent(void)
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{
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SFR_PAGE(_ad6, SST1); // switch to page 6
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ADC_CRMR1 |= 0x40; // set LDEV
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SFR_PAGE(_ad0, RST1); // restore the old ADC page
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} // End of function ADC_vSetLoadEvent
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//****************************************************************************
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// @Function void ADC_vStartParReqChNum(ubyte ubChannelNum)
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//
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//----------------------------------------------------------------------------
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// @Description This function strarts conversion request of analog
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// channel.The possible values for the request channels are:
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// Bit 4 = 1 -> analog channel 4 is requested for
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// conversion
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// Bit 5 = 1 -> analog channel 5 is requested for
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// conversion
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// Bit 6 = 1 -> analog channel 6 is requested for
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// conversion
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// Bit 7 = 1 -> analog channel 7 is requested for
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// conversion
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//
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//----------------------------------------------------------------------------
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// @Returnvalue None
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//
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//----------------------------------------------------------------------------
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// @Parameters ubChannelNum:
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// Name of the Valid Flag Register
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//
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//----------------------------------------------------------------------------
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// @Date 2025/4/27
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//
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//****************************************************************************
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void ADC_vStartParReqChNum(ubyte ubChannelNum)
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{
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SFR_PAGE(_ad6, SST1); // switch to page 6
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ADC_CRPR1 |= ubChannelNum ; // requested channel number
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SFR_PAGE(_ad0, RST1); // restore the old ADC page
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} // End of function ADC_vStartParReqChNum
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//****************************************************************************
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// @Function ubyte ADC_ubBusy(void)
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//
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//----------------------------------------------------------------------------
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// @Description This function checks the conversion state of the current
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// ADC-channel by examination of the busy flag (BUSY). It
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// returns '1' while a conversion is running.
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//
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//----------------------------------------------------------------------------
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// @Returnvalue 1 if conversion is currently active, else 0
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//
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//----------------------------------------------------------------------------
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// @Parameters None
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//
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//----------------------------------------------------------------------------
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// @Date 2025/4/27
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//
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//****************************************************************************
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ubyte ADC_ubBusy(void)
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{
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ubyte ubResult = 0;
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SFR_PAGE(_ad0, SST1); // switch to page 0
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ubResult = ADC_GLOBSTR & 0x01;
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SFR_PAGE(_ad0, RST1); // restore the old ADC page
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return(ubResult);
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} // End of function ADC_ubBusy
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//****************************************************************************
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// @Function uword ADC_uwGetResultData0(void)
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//
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//----------------------------------------------------------------------------
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// @Description This function reads the 8- or 10-bit conversion results
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// from result register 0
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//
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//----------------------------------------------------------------------------
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// @Returnvalue Conversion Result
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//
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//----------------------------------------------------------------------------
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// @Parameters None
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//
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//----------------------------------------------------------------------------
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// @Date 2025/4/27
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//
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//****************************************************************************
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uword ADC_uwGetResultData0(void)
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{
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uword uwResult = 0;
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SFR_PAGE(_ad2, SST1); // switch to page 2
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if ( ADC_RESR0L & 0x10 ) // if Result Register0 contains valid data
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{
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// 10-bit conversion (without accumulation)
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uwResult = ((ADC_RESR0L >> 6) & 0x03); // Result Register0 Low
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uwResult = (((uword)(ADC_RESR0H << 2)) + uwResult); // Result Register0 High
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}
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SFR_PAGE(_ad0, RST1); // restore the old ADC page
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return(uwResult);
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} // End of function ADC_uwGetResultData0
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// USER CODE BEGIN (ADC_General,10)
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// USER CODE END
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