liumin/H_PCB
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liumin
2025-11-08 13:16:57 +08:00
commit 35be67fe06
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Project Logs for PCB_Project2/PCB1 PCB ECO 2024-12-8 10-01-45.LOG Normal file
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Added Component: Designator=W1(TEST)
Added Component: Designator=W2(TEST)
Added Component: Designator=W3(TEST)
Added Component: Designator=W4(TEST)
Added Component: Designator=WC1(Test-1)
Added Component: Designator=WC2(Test-1)
Added Pin To Net: NetName=BV24VG Pin=W1-1
Added Pin To Net: NetName=OUT2 Pin=W2-1
Added Pin To Net: NetName=OUT1 Pin=W3-1
Added Pin To Net: NetName=BV24V Pin=W4-1
Added Pin To Net: NetName=CAN0H Pin=WC1-1
Added Pin To Net: NetName=CAN0L Pin=WC2-1
Added Member To Class: ClassName=Sheet1 Member=Component W1 Test
Added Member To Class: ClassName=Sheet1 Member=Component W2 Test
Added Member To Class: ClassName=Sheet1 Member=Component W3 Test
Added Member To Class: ClassName=Sheet1 Member=Component W4 Test
Added Member To Class: ClassName=Sheet1 Member=Component WC1 Test
Added Member To Class: ClassName=Sheet1 Member=Component WC2 Test