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<div id="projectname">SemiDrive SSDK Appication Program Interface<span id="projectnumber"> PTG3.0</span>
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="headertitle"><div class="title">spi_nor_config</div></div>
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</div><!--header-->
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<div class="contents">
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<p><code>#include <<a class="el" href="sdrv__spi__nor_8h_source.html">sdrv_spi_nor.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:a1e6927fa1486224044e568f9c370519b"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#a1e6927fa1486224044e568f9c370519b">id</a></td></tr>
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<tr class="memitem:acde2a8e18b0b1e15c456c0dd5f02bd11"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#acde2a8e18b0b1e15c456c0dd5f02bd11">cs</a></td></tr>
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<tr class="memitem:ac4f06ea26ed6bd7ae83b92d64ac10b78"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#ac4f06ea26ed6bd7ae83b92d64ac10b78">baudrate</a></td></tr>
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<tr class="separator:ac4f06ea26ed6bd7ae83b92d64ac10b78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae105bb3b74567c7ebe4f73166430fa72"><td class="memItemLeft" align="right" valign="top">enum <a class="el" href="sdrv__spi__nor_8h.html#ad95b05ecc5a986bbe8c243ef23761d37">spi_nor_xfer_mode</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#ae105bb3b74567c7ebe4f73166430fa72">xfer_mode</a></td></tr>
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<tr class="memitem:a081b67ac745cb37a0bb73c55c929729f"><td class="memItemLeft" align="right" valign="top">enum <a class="el" href="sdrv__spi__nor_8h.html#ab7ad7e657d0e6d660b2c72772133ccf3">spi_nor_device_mode</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#a081b67ac745cb37a0bb73c55c929729f">dev_mode</a></td></tr>
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<tr class="memitem:a1312f6e7d28ff84aabd80952688c3065"><td class="memItemLeft" align="right" valign="top">enum <a class="el" href="sdrv__spi__nor_8h.html#a17c31d3f7e7ff5409e885cfe369d857e">spi_memory_type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#a1312f6e7d28ff84aabd80952688c3065">mem_type</a></td></tr>
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<tr class="memitem:a6d553fde28851ace7330b3e4beb05ebd"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#a6d553fde28851ace7330b3e4beb05ebd">async_mode</a></td></tr>
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<tr class="memitem:a7d5e9edf5b039b091fb7a0796a2d13d3"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#a7d5e9edf5b039b091fb7a0796a2d13d3">hyperbus_mode</a></td></tr>
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<tr class="memitem:af45c89fa272cc07af15406f0cbf8ad42"><td class="memItemLeft" align="right" valign="top">bool </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#af45c89fa272cc07af15406f0cbf8ad42">sw_rst</a></td></tr>
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<tr class="memitem:a79677d54156a7a00eeb04213433f7e02"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__nor__config.html#a79677d54156a7a00eeb04213433f7e02">force_size</a></td></tr>
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<tr class="separator:a79677d54156a7a00eeb04213433f7e02"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<h2 class="groupheader">Field Documentation</h2>
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<a id="a6d553fde28851ace7330b3e4beb05ebd" name="a6d553fde28851ace7330b3e4beb05ebd"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a6d553fde28851ace7330b3e4beb05ebd">◆ </a></span>async_mode</h2>
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<td class="memname">bool async_mode</td>
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</div><div class="memdoc">
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<p >use async mode </p>
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<a id="ac4f06ea26ed6bd7ae83b92d64ac10b78" name="ac4f06ea26ed6bd7ae83b92d64ac10b78"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ac4f06ea26ed6bd7ae83b92d64ac10b78">◆ </a></span>baudrate</h2>
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<td class="memname">uint32_t baudrate</td>
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</div><div class="memdoc">
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<p >config baudrate </p>
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</div>
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</div>
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<a id="acde2a8e18b0b1e15c456c0dd5f02bd11" name="acde2a8e18b0b1e15c456c0dd5f02bd11"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#acde2a8e18b0b1e15c456c0dd5f02bd11">◆ </a></span>cs</h2>
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<td class="memname">uint8_t cs</td>
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</div><div class="memdoc">
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<p >config chip selet </p>
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</div>
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</div>
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<a id="a081b67ac745cb37a0bb73c55c929729f" name="a081b67ac745cb37a0bb73c55c929729f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a081b67ac745cb37a0bb73c55c929729f">◆ </a></span>dev_mode</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi__nor_8h.html#ab7ad7e657d0e6d660b2c72772133ccf3">spi_nor_device_mode</a> dev_mode</td>
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</table>
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</div><div class="memdoc">
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<p >device trans mode LOCKSTEP/PARALLEL/SINGLE </p>
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</div>
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</div>
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<a id="a79677d54156a7a00eeb04213433f7e02" name="a79677d54156a7a00eeb04213433f7e02"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a79677d54156a7a00eeb04213433f7e02">◆ </a></span>force_size</h2>
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<td class="memname">uint32_t force_size</td>
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</div><div class="memdoc">
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<p >spi nor force size </p>
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</div>
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</div>
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<a id="a7d5e9edf5b039b091fb7a0796a2d13d3" name="a7d5e9edf5b039b091fb7a0796a2d13d3"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a7d5e9edf5b039b091fb7a0796a2d13d3">◆ </a></span>hyperbus_mode</h2>
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<td class="memname">bool hyperbus_mode</td>
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</div><div class="memdoc">
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<p >hyperbus mode </p>
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</div>
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<a id="a1e6927fa1486224044e568f9c370519b" name="a1e6927fa1486224044e568f9c370519b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1e6927fa1486224044e568f9c370519b">◆ </a></span>id</h2>
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<td class="memname">uint8_t id</td>
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</div><div class="memdoc">
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<p >config id </p>
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</div>
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</div>
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<a id="a1312f6e7d28ff84aabd80952688c3065" name="a1312f6e7d28ff84aabd80952688c3065"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1312f6e7d28ff84aabd80952688c3065">◆ </a></span>mem_type</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi__nor_8h.html#a17c31d3f7e7ff5409e885cfe369d857e">spi_memory_type</a> mem_type</td>
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</div><div class="memdoc">
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<p >flash device type </p>
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<a id="af45c89fa272cc07af15406f0cbf8ad42" name="af45c89fa272cc07af15406f0cbf8ad42"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af45c89fa272cc07af15406f0cbf8ad42">◆ </a></span>sw_rst</h2>
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<td class="memname">bool sw_rst</td>
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<p >softwate reset device </p>
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</div>
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</div>
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<a id="ae105bb3b74567c7ebe4f73166430fa72" name="ae105bb3b74567c7ebe4f73166430fa72"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ae105bb3b74567c7ebe4f73166430fa72">◆ </a></span>xfer_mode</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi__nor_8h.html#ad95b05ecc5a986bbe8c243ef23761d37">spi_nor_xfer_mode</a> xfer_mode</td>
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</div><div class="memdoc">
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<p >trans mode, dma/intterrupt/polling </p>
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</div>
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</div>
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<hr/>The documentation for this struct was generated from the following file:<ul>
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<li>Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/<a class="el" href="sdrv__spi__nor_8h_source.html">sdrv_spi_nor.h</a></li>
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</ul>
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