sdrv_gpio.h

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#ifndef SDRV_GPIO_H_
#define SDRV_GPIO_H_
 
#include <sdrv_common.h>
#include <sdrv_pinctrl.h>
#include <types.h>
 
enum sdrv_gpio_error {
    SDRV_GPIO_BAD_PIN = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_GPIO,
                                          1), /* GPIO Pin Index Wrong. */
    SDRV_GPIO_CTRL_NULL = SDRV_ERROR_STATUS(SDRV_STATUS_GROUP_GPIO,
                                            2), /* GPIO Controller is NULL. */
    SDRV_GPIO_IRQ_ATTACH_FAIL = SDRV_ERROR_STATUS(
        SDRV_STATUS_GROUP_GPIO, 3), /* GPIO Attach Irq failed. */
};
 
typedef enum gpio_direction {
    GPIO_DIR_OUT, 
    GPIO_DIR_IN,  
} gpio_direction_e;
 
typedef enum gpio_interrupt {
    GPIO_INTR_DISABLE,      /* INPUT. Interrupt disable. */
    GPIO_INTR_HIGH_LEVEL,   /* INPUT. Interrupt on high level. */
    GPIO_INTR_LOW_LEVEL,    /* INPUT. Interrupt on low level. */
    GPIO_INTR_RISING_EDGE,  /* INPUT. Interrupt on rising edge. */
    GPIO_INTR_FALLING_EDGE, /* INPUT. Interrupt on falling edge. */
    GPIO_INTR_BOTH_EDGE,    /* INPUT. Interrupt on both edges. */
} gpio_interrupt_e;
 
typedef enum gpio_interrupt_share {
    GPIO_INTR_SF = 0x1,   
    GPIO_INTR_SP0 = 0x2,  
    GPIO_INTR_SP1 = 0x4,  
    GPIO_INTR_SX0 = 0x8,  
    GPIO_INTR_SX1 = 0x10, 
} gpio_interrupt_share_e;
 
typedef struct sdrv_gpio {
    paddr_t base;
    uint32_t pin_start;
    uint32_t pin_num;
} sdrv_gpio_t;
 
typedef void (*sdrv_gpio_interrupt_handler_t)(uint32_t irq, uint32_t pin,
                                              void *arg);
 
status_t sdrv_gpio_set_pin_direction(uint32_t pin_index, gpio_direction_e dir);
 
status_t sdrv_gpio_set_pin_output_level(uint32_t pin_index, bool level);
 
bool sdrv_gpio_get_pin_output_level(uint32_t pin_index);
 
status_t sdrv_gpio_toggle_pin_output_level(uint32_t pin_index);
 
bool sdrv_gpio_read_pin_input_level(uint32_t pin_index);
 
status_t sdrv_gpio_set_pin_interrupt(uint32_t pin_index, gpio_interrupt_e intr);
 
status_t sdrv_gpio_pin_interrupt_enable(uint32_t pin_index);
 
status_t sdrv_gpio_pin_interrupt_disable(uint32_t pin_index);
 
bool sdrv_gpio_pin_interrupt_status(uint32_t pin_index);
 
status_t sdrv_gpio_clear_pin_interrupt_status(uint32_t pin_index);
 
status_t sdrv_gpio_set_pin_async_interrupt(uint32_t pin_index,
                                           gpio_interrupt_e intr);
 
status_t sdrv_gpio_pin_async_interrupt_enable(uint32_t pin_index);
 
status_t sdrv_gpio_pin_async_interrupt_disable(uint32_t pin_index);
 
bool sdrv_gpio_pin_async_interrupt_status(uint32_t pin_index);
 
status_t sdrv_gpio_clear_pin_async_interrupt_status(uint32_t pin_index);
 
status_t sdrv_gpio_register_interrupt_handler(
    uint32_t pin_index, sdrv_gpio_interrupt_handler_t handler, void *arg);
 
status_t sdrv_gpio_unregister_interrupt_handler(uint32_t pin_index);
 
status_t sdrv_gpio_interrupt_share_with(uint32_t pin_index, uint32_t mask);
 
status_t sdrv_gpio_cancel_interrupt_share_with(uint32_t pin_index,
                                               uint32_t mask);
 
status_t sdrv_gpio_ctrl_set_pin_direction(sdrv_gpio_t *gpio_ctrl,
                                          uint32_t pin_index,
                                          gpio_direction_e dir);
 
status_t sdrv_gpio_ctrl_set_pin_output_level(sdrv_gpio_t *gpio_ctrl,
                                             uint32_t pin_index, bool level);
 
status_t sdrv_gpio_ctrl_toggle_pin_output_level(sdrv_gpio_t *gpio_ctrl,
                                                uint32_t pin_index);
 
bool sdrv_gpio_ctrl_read_pin_input_level(sdrv_gpio_t *gpio_ctrl,
                                         uint32_t pin_index);
 
bool sdrv_gpio_ctrl_get_pin_output_level(sdrv_gpio_t *gpio_ctrl,
                                         uint32_t pin_index);
 
status_t sdrv_gpio_ctrl_set_pin_interrupt(sdrv_gpio_t *gpio_ctrl,
                                          uint32_t pin_index,
                                          gpio_interrupt_e intr);
 
status_t sdrv_gpio_ctrl_pin_interrupt_enable(sdrv_gpio_t *gpio_ctrl,
                                             uint32_t pin_index);
 
status_t sdrv_gpio_ctrl_pin_interrupt_disable(sdrv_gpio_t *gpio_ctrl,
                                              uint32_t pin_index);
 
bool sdrv_gpio_ctrl_pin_interrupt_status(sdrv_gpio_t *gpio_ctrl,
                                         uint32_t pin_index);
 
status_t sdrv_gpio_ctrl_clear_pin_interrupt_status(sdrv_gpio_t *gpio_ctrl,
                                                   uint32_t pin_index);
 
status_t sdrv_gpio_ctrl_set_pin_async_interrupt(sdrv_gpio_t *gpio_ctrl,
                                                uint32_t pin_index,
                                                gpio_interrupt_e intr);
 
status_t sdrv_gpio_ctrl_pin_async_interrupt_enable(sdrv_gpio_t *gpio_ctrl,
                                                   uint32_t pin_index);
 
status_t sdrv_gpio_ctrl_pin_async_interrupt_disable(sdrv_gpio_t *gpio_ctrl,
                                                    uint32_t pin_index);
 
bool sdrv_gpio_ctrl_pin_async_interrupt_status(sdrv_gpio_t *gpio_ctrl,
                                                   uint32_t pin_index);
 
status_t sdrv_gpio_ctrl_clear_pin_async_interrupt_status(sdrv_gpio_t *gpio_ctrl,
                                                         uint32_t pin_index);
 
#endif /* SDRV_GPIO_H_ */