修改喂狗芯片为100ms
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72
.gitignore
vendored
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72
.gitignore
vendored
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# ##############################
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# 1. 忽略所有编译目录(不管层级)
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# ##############################
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**/IAR/
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**/IAR_*/
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**/Debug/
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**/FlashDebug/
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**/Release/
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**/SES/
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**/Output/
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**/settings/
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# ##############################
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# 2. 忽略所有 IAR/SES 编译产物
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# ##############################
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**/*.dep
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**/*.out
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**/*.bin
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**/*.elf
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**/*.map
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**/*.lst
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**/*.o
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**/*.a
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**/*.pbi
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**/*.pbi.dep
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**/*.xcl
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**/*.r79
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**/*.sdf
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**/*.sim
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**/*.icf
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**/*.wsdt
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**/*.ninja_log
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# ##############################
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# 3. 强制保留工程和源码文件(兜底!关键!)
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# ##############################
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!**/*.eww
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!**/*.ewp
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!**/*.ewd
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!**/*.ewt
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!**/*.custom_argvars
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!**/*.c
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!**/*.h
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# ##############################
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# 4. 系统/编辑器垃圾文件
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# ##############################
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.DS_Store
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._*
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Thumbs.db
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Desktop.ini
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.vscode/
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.idea/
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*.swp
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*.swo
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*.log
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*.tmp
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# 忽略 IAR 工具生成的 browse/调试文件
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**/*.pbd
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**/*.pbdb
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**/*.sf.*.bat
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**/*.sf.*.pbi
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**/*.ninja_log
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# 忽略 IAR 工具链自动生成的调试/浏览文件
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**/*.ninja_log
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**/*.pbd
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**/*.pbd.browse
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**/*.pbw
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**/*.cspy.bat
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**/*.cspy.ps1
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@@ -98,7 +98,7 @@ sdrv_uart_t g_console_uart;
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static sdrv_uart_config_t console_uart_config = {
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static sdrv_uart_config_t console_uart_config = {
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.base = DEVICE_BASE(CONSOLE_UART),
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.base = DEVICE_BASE(CONSOLE_UART),
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.irq = DEVICE_INTR(CONSOLE_UART),
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.irq = DEVICE_INTR(CONSOLE_UART),
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.baud = 4608000,
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.baud = 4000000,
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.data_bits = SDRV_UART_CHAR_8_BITS,
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.data_bits = SDRV_UART_CHAR_8_BITS,
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.stop_bits = SDRV_UART_STOP_1_BIT,
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.stop_bits = SDRV_UART_STOP_1_BIT,
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.parity = SDRV_UART_NO_PARITY,
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.parity = SDRV_UART_NO_PARITY,
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@@ -184,6 +184,7 @@ int main(void)
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sdrv_gpio_set_pin_output_level(GPIO_B9, 1); //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
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sdrv_gpio_set_pin_output_level(GPIO_B9, 1); //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
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External_wdt_refresh();
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// Timer<65><72>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṩLWIP sys_now<6F>ӿڻ<D3BF>ȡ<EFBFBD><C8A1>ǰʱ<C7B0><CAB1>
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// Timer<65><72>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṩLWIP sys_now<6F>ӿڻ<D3BF>ȡ<EFBFBD><C8A1>ǰʱ<C7B0><CAB1>
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btm_init();
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btm_init();
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@@ -223,13 +224,14 @@ int main(void)
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sdrv_gpio_set_pin_output_level(GPIO_Y1, 0); //E2дʹ<D0B4><CAB9>
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sdrv_gpio_set_pin_output_level(GPIO_Y1, 0); //E2дʹ<D0B4><CAB9>
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External_wdt_refresh();
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External_wdt_refresh();
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printf("feed 1! \r\n");
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board_norflash_init();//flash <20><>ʼ<EFBFBD><CABC>
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board_norflash_init();//flash <20><>ʼ<EFBFBD><CABC>
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External_wdt_refresh();
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initSpi();
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initSpi();
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External_wdt_refresh();
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// ETH<54><48>ʼ<EFBFBD><CABC>
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// ETH<54><48>ʼ<EFBFBD><CABC>
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board_eth_init();
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board_eth_init();
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External_wdt_refresh();
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// wdt_init(WDT_OUTms);
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// wdt_init(WDT_OUTms);
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// wrbyte_24c02(0x00,1);
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// wrbyte_24c02(0x00,1);
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@@ -266,7 +268,8 @@ int main(void)
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UdpSendToData(UDPCB_1, BOOT_Arr, 2, des_ipaddr, BOOT_TX_PORT);
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UdpSendToData(UDPCB_1, BOOT_Arr, 2, des_ipaddr, BOOT_TX_PORT);
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}
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}
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ssdk_printf(SSDK_INFO, "SSDK E3 boot! verison V1.28 \r\n");
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ssdk_printf(SSDK_INFO, "SSDK E3 boot! verison V1.30 \r\n");
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for(;;)
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for(;;)
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{
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{
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@@ -288,7 +291,7 @@ int main(void)
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RgWDT500msflg = 0;
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RgWDT500msflg = 0;
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External_wdt_refresh();
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External_wdt_refresh();
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printf("RUN2F! \r\n");
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printf("RUN33! \r\n");
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}
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}
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}
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}
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}
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}
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@@ -72,7 +72,7 @@ void External_wdt_refresh(void)
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// sdrv_wdt_refresh(wdt_type);//ι<><CEB9>
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// sdrv_wdt_refresh(wdt_type);//ι<><CEB9>
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sdrv_gpio_toggle_pin_output_level(WDTGPIO);
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sdrv_gpio_toggle_pin_output_level(WDTGPIO);
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// printf("wdtfeed! \r\n");
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// printf("feed wdt! \r\n");
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}
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}
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@@ -184,7 +184,6 @@ static void eth_mac_init(dwc_eth_config_t *cfg, struct eqos_priv *eqos)
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phy_speed_t speed = (cfg->phy[0].phy_addr == ~0) ?
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phy_speed_t speed = (cfg->phy[0].phy_addr == ~0) ?
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PHY_SPEED_1000 : cfg->phy[0].speed;
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PHY_SPEED_1000 : cfg->phy[0].speed;
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dwmac_core_init(cfg->base, cfg->mtu, speed, cfg->mac_addr);
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dwmac_core_init(cfg->base, cfg->mtu, speed, cfg->mac_addr);
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dwmac_mac_rx_queue_mcbc_routing(cfg->base, 0);
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dwmac_mac_rx_queue_mcbc_routing(cfg->base, 0);
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}
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}
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@@ -286,6 +285,7 @@ static err_t dwc_eth_init(struct net_driver_s *dev)
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ASSERT(eqos->rx_dma_buf);
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ASSERT(eqos->rx_dma_buf);
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memset(eqos->rx_dma_buf, 0, EQOS_RX_BUFFER_SIZE);
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memset(eqos->rx_dma_buf, 0, EQOS_RX_BUFFER_SIZE);
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#endif
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#endif
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//init phy
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//init phy
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phy_init(ð_dev->phy_bus);
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phy_init(ð_dev->phy_bus);
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@@ -776,10 +776,10 @@ int dwc_eth_probe(struct net_driver_s *dev, dwc_eth_config_t *cfg)
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phy_dev_register(&dw_eth_dev->phy_bus, &cfg->phy[i]);
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phy_dev_register(&dw_eth_dev->phy_bus, &cfg->phy[i]);
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}
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}
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External_wdt_refresh();
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int ret = netdev_register(dev, NET_LL_ETHERNET);
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int ret = netdev_register(dev, NET_LL_ETHERNET);
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External_wdt_refresh();
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irq_attach(cfg->irq_num, dwc_eth_irq_handler, dev);
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irq_attach(cfg->irq_num, dwc_eth_irq_handler, dev);
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irq_enable(cfg->irq_num);
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irq_enable(cfg->irq_num);
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return ret;
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return ret;
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@@ -18,7 +18,6 @@
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#include "regs_base.h"
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#include "regs_base.h"
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#include "phy/phy.h"
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#include "phy/phy.h"
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#include "sdrv_mac_lld.h"
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#include "sdrv_mac_lld.h"
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#include <wdt_refresh.h>
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static uint8_t deafult_mac_addr[6] = {0x00, 0x1f, 0x29, 0x00, 0x12, 0x15};
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static uint8_t deafult_mac_addr[6] = {0x00, 0x1f, 0x29, 0x00, 0x12, 0x15};
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@@ -658,7 +657,7 @@ int32_t dwmac_dma_reset(uint32_t regbase)
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if (!(readl(regbase + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
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if (!(readl(regbase + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
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break;
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break;
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mdelay(1); //20251106 <20><EFBFBD>Ϊ1<CEAA><31>10ʵ<30><CAB5><EFBFBD><EFBFBD>ʱΪ140ms
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mdelay(1);//20251106 <20><EFBFBD>Ϊ1<CEAA><31>10ʵ<30><CAB5><EFBFBD><EFBFBD>ʱΪ140ms
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}
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}
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if (limit <= 0) {
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if (limit <= 0) {
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@@ -272,7 +272,7 @@ static int sdrv_hyperbus_wait_idle(struct spi_nor *nor)
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}
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}
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// ssdk_printf(SSDK_INFO, "flash_status = 0x%x \r\n", flash_status);
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ssdk_printf(SSDK_INFO, "flash_status = 0x%x \r\n", flash_status);
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if ((flash_status & BIT(7)))
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if ((flash_status & BIT(7)))
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break;
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break;
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@@ -624,7 +624,7 @@ static int sdrv_spibus_wait_idle(struct spi_nor *nor)
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}
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}
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}
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}
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// ssdk_printf(SSDK_INFO, "flash_status = 0x%x \r\n", flash_status);
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ssdk_printf(SSDK_INFO, "flash_status = 0x%x \r\n", flash_status);
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if (!(flash_status & BIT(0)))
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if (!(flash_status & BIT(0)))
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break;
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break;
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@@ -1098,9 +1098,9 @@ static void sdrv_xspi_polling_handler(void *arg)
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}
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}
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nor->xfer_info_bottom.opt_result = ret ? FLASH_OPT_FAILED : FLASH_OPT_PENDING;
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nor->xfer_info_bottom.opt_result = ret ? FLASH_OPT_FAILED : FLASH_OPT_PENDING;
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// ssdk_printf(SSDK_DEBUG, "xfer_type = %d, xfer size = %lld, xfer result = %d\r\n",
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ssdk_printf(SSDK_DEBUG, "xfer_type = %d, xfer size = %lld, xfer result = %d\r\n",
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// nor->xfer_info_bottom.opt_type == FLASH_OPT_READ, nor->xfer_info_bottom.size,
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nor->xfer_info_bottom.opt_type == FLASH_OPT_READ, nor->xfer_info_bottom.size,
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// nor->xfer_info_bottom.opt_result);
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nor->xfer_info_bottom.opt_result);
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if ((nor->xfer_info_bottom.size == 0 || nor->xfer_info_bottom.buf == NULL) &&
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if ((nor->xfer_info_bottom.size == 0 || nor->xfer_info_bottom.buf == NULL) &&
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nor->xfer_info_bottom.opt_result == FLASH_OPT_PENDING) {
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nor->xfer_info_bottom.opt_result == FLASH_OPT_PENDING) {
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@@ -40,8 +40,10 @@ static err_t netdev_init_fn(struct netif *netif)
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}
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}
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if (dev->d_init) {
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if (dev->d_init) {
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dev->d_init(dev);
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External_wdt_refresh();
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dev->d_init(dev);
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External_wdt_refresh();
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}
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}
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return ERR_OK;
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return ERR_OK;
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@@ -58,6 +60,7 @@ err_t netdev_register(struct net_driver_s *dev, enum net_lltype_e lltype)
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ip_2_ip4(&dev->d_netmask),
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ip_2_ip4(&dev->d_netmask),
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ip_2_ip4(&dev->d_gateway),
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ip_2_ip4(&dev->d_gateway),
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dev, netdev_init_fn, netif_input);
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dev, netdev_init_fn, netif_input);
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netif_set_default(&dev->d_netif);
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netif_set_default(&dev->d_netif);
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netif_set_up(&dev->d_netif);
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netif_set_up(&dev->d_netif);
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BIN
tools/sdtools/sdtools.rar
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BIN
tools/sdtools/sdtools.rar
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BIN
tools/sdtools/sfs/sfs.rar
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BIN
tools/sdtools/sfs/sfs.rar
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