45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/**
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* @file sdrv_recovery_hw.h
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* @brief semidrive recovery latent module hardware header file
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*
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* @copyright Copyright (c) 2022 Semidrive Semiconductor.
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* All rights reserved.
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*/
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#ifndef SDRV_RECOVERY_HW_H
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#define SDRV_RECOVERY_HW_H
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#include <types.h>
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/* BTM recovery register offset */
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#define BTM_G0_EN_OFFSET 0x04
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#define BTM_G1_EN_OFFSET 0x24
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#define BTM_INT_STA_OFFSET 0x40
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#define BTM_INT_STA_EN_OFFSET 0x44
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#define BTM_INT_SIG_EN_OFFSET 0x48
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/* ETIMER recovery register offset */
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#define ETIMER_SW_RST_OFFSET 0xA8U
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#define ETIMER_DMA_CTRL_OFFSET 0xB0U
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#define ETIMER_G0_EN_OFFSET 0x10CU
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#define ETIMER_G1_EN_OFFSET 0x12CU
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#define ETIMER_LCNT_A_EN_OFFSET 0x14CU
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#define ETIMER_LCNT_B_EN_OFFSET 0x16CU
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#define ETIMER_LCNT_C_EN_OFFSET 0x18CU
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#define ETIMER_LCNT_D_EN_OFFSET 0x1ACU
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#define ETIMER_CPT_CTRL_OFFSET 0x210U
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#define ETIMER_CMP_CTRL_OFFSET 0x2E0U
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#define ETIMER_INT_STA_OFFSET 0x0U
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#define ETIMER_INT_STA_EN_OFFSET 0x4U
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#define ETIMER_INT_SIG_EN_OFFSET 0x8U
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/* EPWM recovery register offset */
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#define EPWM_SW_RST_OFFSET 0xA8U
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#define EPWM_DMA_CTRL_OFFSET 0xB8U
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#define EPWM_G0_EN_OFFSET 0x10CU
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#define EPWM_G1_EN_OFFSET 0x12CU
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#define EPWM_CMP_CTRL_OFFSET 0x2E0U
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#define EPWM_INT_STA_OFFSET 0x0U
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#define EPWM_INT_STA_EN_OFFSET 0x4U
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#define EPWM_INT_SIG_EN_OFFSET 0x8U
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#endif /* SDRV_RECOVERY_HW_H */
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