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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_ee023d43c33bfccc31aa50a48a76892b.html">include</a></li> </ul>
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<div class="textblock"><code>#include &lt;stdint.h&gt;</code><br />
<code>#include &lt;stdbool.h&gt;</code><br />
<code>#include &lt;regs_base.h&gt;</code><br />
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__adc.html">sdrv_adc</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__adc__rc__cfg.html">sdrv_adc_rc_cfg</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__adc__rcht__entry__cfg.html">sdrv_adc_rcht_entry_cfg</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__adc__rc__entry__cfg.html">sdrv_adc_rc_entry_cfg</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__adc__ana__param__cfg.html">sdrv_adc_ana_param_cfg</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__adc__fifo__cfg.html">sdrv_adc_fifo_cfg</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__adc__sync__cfg.html">sdrv_adc_sync_cfg</a></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:a014d5e2d0e7860dcc27d57da72e29455"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a014d5e2d0e7860dcc27d57da72e29455">sdrv_adc_init</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, unsigned int clk_div)</td></tr>
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<tr class="memitem:a2cd258d70c6b0c8036d5e10581aa9152"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a2cd258d70c6b0c8036d5e10581aa9152">sdrv_adc_rc_cfg</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, unsigned int rc_nbr, <a class="el" href="sdrv__adc_8h.html#a02bbaea955117f943305e5af43d906d0">sdrv_adc_rc_cfg_t</a> *rc_cfg)</td></tr>
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<tr class="memitem:a426aac059a0af33a3aba5743413f6894"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a426aac059a0af33a3aba5743413f6894">sdrv_adc_rc_stop_tmr</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, unsigned int rc_nbr)</td></tr>
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<tr class="memitem:a3d06b1104829388374224a4ebe5d0d9f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a3d06b1104829388374224a4ebe5d0d9f">sdrv_adc_rc_soft_trg</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, unsigned int rc_nbr)</td></tr>
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<tr class="memitem:ad2604a3c103a66bbf18b33696904fd21"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#ad2604a3c103a66bbf18b33696904fd21">sdrv_adc_rcht_ready</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, uint8_t ready_len)</td></tr>
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<tr class="memitem:aa3e25e8a10e6e985c721900f8baed386"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#aa3e25e8a10e6e985c721900f8baed386">sdrv_adc_rcht_clr_ready</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX)</td></tr>
<tr class="separator:aa3e25e8a10e6e985c721900f8baed386"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4600a52d134367629ac639c3ccbf0fea"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a4600a52d134367629ac639c3ccbf0fea">sdrv_adc_rcht_entry_cfg</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, unsigned int entry_nbr, <a class="el" href="sdrv__adc_8h.html#a09cc3a4372f54206a7b1ea4a1d4e5273">sdrv_adc_rcht_entry_cfg_t</a> entry_cfg)</td></tr>
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<tr class="memitem:a18ff0efeb6c1a48dde7c0652157e0e26"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a18ff0efeb6c1a48dde7c0652157e0e26">sdrv_adc_ana_param_cfg</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, unsigned int param_nbr, <a class="el" href="sdrv__adc_8h.html#a683ba426fdb771185750788d9c7b457d">sdrv_adc_ana_param_cfg_t</a> aparam_cfg)</td></tr>
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<tr class="memitem:ac1aa0ecdb702bf96a0a31b1c694312f9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#ac1aa0ecdb702bf96a0a31b1c694312f9">sdrv_adc_fifo_cfg</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, <a class="el" href="sdrv__adc_8h.html#a0b07b6d131e9c574518d2ee2ffd85338">sdrv_adc_fifo_cfg_t</a> *fifo_cfg)</td></tr>
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<tr class="memitem:a18d1567da46c6e35dce4555a44b7a5d5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a18d1567da46c6e35dce4555a44b7a5d5">sdrv_adc_fifo_rc_cfg</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, <a class="el" href="sdrv__adc_8h.html#a805f76630226d47d9cb22030775b1599">sdrv_adc_fifo_rc_cfg_t</a> rc_cfg)</td></tr>
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<tr class="memitem:abe5b146c6de386eed0e13e94f76b4934"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#abe5b146c6de386eed0e13e94f76b4934">sdrv_adc_fifo_status</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX)</td></tr>
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<tr class="memitem:a9897dbe58737f92135d07340bdebc793"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a9897dbe58737f92135d07340bdebc793">sdrv_adc_read_fifo</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX)</td></tr>
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<tr class="memitem:a0af1a01cbe8f7104795c9da5d99cf9c0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a0af1a01cbe8f7104795c9da5d99cf9c0">sdrv_adc_sync_cfg</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, <a class="el" href="sdrv__adc_8h.html#ac3f3c6d2d256abeec5c9b07e5684d8b4">sdrv_adc_sync_cfg_t</a> sync_cfg, uint8_t *slot_cid, unsigned int len)</td></tr>
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<tr class="memitem:af222849c195796ff151ca02393913a42"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#af222849c195796ff151ca02393913a42">sdrv_adc_sync_start</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX)</td></tr>
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<tr class="memitem:a89836eff6fc0a2dc2e0743d3bad78e4d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a89836eff6fc0a2dc2e0743d3bad78e4d">sdrv_adc_sync_slot_reset</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX)</td></tr>
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<tr class="memitem:a81cb1c700169828f9bc51cf69577b70a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__adc_8h.html#a81cb1c700169828f9bc51cf69577b70a">sdrv_adc_stop</a> (<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *sdrv_adcX, bool rc_tmr_stop)</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><dl class="section copyright"><dt>Copyright</dt><dd>Copyright (c) 2021 Semidrive Semiconductor. All rights reserved. </dd></dl>
</div><h2 class="groupheader">Macro Definition Documentation</h2>
<a id="aa76cddcf85547f25a94144887eaf83b4" name="aa76cddcf85547f25a94144887eaf83b4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa76cddcf85547f25a94144887eaf83b4">&#9670;&nbsp;</a></span>ADC_CH_POLAR_NEG</h2>
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<td class="memname">#define ADC_CH_POLAR_NEG&#160;&#160;&#160;0u</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a88586af56bcda364a5396a116f4457af">&#9670;&nbsp;</a></span>ADC_CH_POLAR_POS</h2>
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<td class="memname">#define ADC_CH_POLAR_POS&#160;&#160;&#160;1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a></td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab3e540151a53d7ff70a762b04b831343">&#9670;&nbsp;</a></span>ADC_CH_SEL_TAISHAN</h2>
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<td class="memname">#define ADC_CH_SEL_TAISHAN</td>
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<td class="paramtype">&#160;</td>
<td class="paramname">ch, </td>
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<td class="paramtype">&#160;</td>
<td class="paramname">polar, </td>
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<td class="paramname">mux&#160;</td>
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<td></td><td>&#160;&#160;&#160; ((((mux) &amp; 0x7u) &lt;&lt; 6) | (((polar) &amp; 0x1u) &lt;&lt; 3) | ((ch) &amp; 0x7u))</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3070b65285e05ab93c183287941849eb">&#9670;&nbsp;</a></span>ADC_DCH_SEL_TAISHAN</h2>
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<td class="memname">#define ADC_DCH_SEL_TAISHAN</td>
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<td class="paramname">ch_p, </td>
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<td class="paramtype">&#160;</td>
<td class="paramname">ch_n, </td>
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<td class="paramtype">&#160;</td>
<td class="paramname">mux&#160;</td>
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<td>)</td>
<td></td><td>&#160;&#160;&#160; ((((mux) &amp; 0x7u) &lt;&lt; 6) | (((ch_p) &amp; 0x7u) &lt;&lt; 3) | ((ch_n) &amp; 0x7u))</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a262ee63a2eec54b00b26687d90f0c98f">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_CCN_MSK</h2>
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<td class="memname">#define SADC_ANA_PARAM_CCN_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a0b8a30ddd8b17babf00504c26cddf3a3">SADC_ANA_PARAM_CCN_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a0b8a30ddd8b17babf00504c26cddf3a3">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_CCN_POS</h2>
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<td class="memname">#define SADC_ANA_PARAM_CCN_POS&#160;&#160;&#160;(12)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3004f6e0ea51d050124590fc86fe4f17">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_CCP_MSK</h2>
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<td class="memname">#define SADC_ANA_PARAM_CCP_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#aa883a94fb15dd94cf4c864e7e4af15c6">SADC_ANA_PARAM_CCP_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa883a94fb15dd94cf4c864e7e4af15c6">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_CCP_POS</h2>
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<td class="memname">#define SADC_ANA_PARAM_CCP_POS&#160;&#160;&#160;(8)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a49749f81e3c9aae3ea05c3597e86b38d">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_CCT_MSK</h2>
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<td class="memname">#define SADC_ANA_PARAM_CCT_MSK&#160;&#160;&#160;(0x1Fu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#adf005213de073347480e18c57defd6e9">SADC_ANA_PARAM_CCT_POS</a>)</td>
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<a id="adf005213de073347480e18c57defd6e9" name="adf005213de073347480e18c57defd6e9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#adf005213de073347480e18c57defd6e9">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_CCT_POS</h2>
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<td class="memname">#define SADC_ANA_PARAM_CCT_POS&#160;&#160;&#160;(16)</td>
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<a id="aa097818019eb1cb3ac2f086df8f2ce42" name="aa097818019eb1cb3ac2f086df8f2ce42"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa097818019eb1cb3ac2f086df8f2ce42">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_DIFF_SEL</h2>
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<td class="memname">#define SADC_ANA_PARAM_DIFF_SEL&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 5)</td>
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<a id="a4280293a1bfc55321a9a4ff9ad06f24c" name="a4280293a1bfc55321a9a4ff9ad06f24c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4280293a1bfc55321a9a4ff9ad06f24c">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_REF_SEL</h2>
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<td class="memname">#define SADC_ANA_PARAM_REF_SEL&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 4)</td>
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<a id="a1f22fc5fc0c651005651e35d9b1a69ea" name="a1f22fc5fc0c651005651e35d9b1a69ea"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1f22fc5fc0c651005651e35d9b1a69ea">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_SAMCTRL_MSK</h2>
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<td class="memname">#define SADC_ANA_PARAM_SAMCTRL_MSK&#160;&#160;&#160;(0x7u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a653b2d05f61ebad606ff544ff2973f77">SADC_ANA_PARAM_SAMCTRL_POS</a>)</td>
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<a id="a653b2d05f61ebad606ff544ff2973f77" name="a653b2d05f61ebad606ff544ff2973f77"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a653b2d05f61ebad606ff544ff2973f77">&#9670;&nbsp;</a></span>SADC_ANA_PARAM_SAMCTRL_POS</h2>
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<td class="memname">#define SADC_ANA_PARAM_SAMCTRL_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aecf399ee9a21af59447d4e80b6a466f4">&#9670;&nbsp;</a></span>SADC_ANA_REF_PART1_PD</h2>
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<td class="memname">#define SADC_ANA_REF_PART1_PD&#160;&#160;&#160;(1U &lt;&lt; 0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab167ed2edefa8ad243d1f8b9747aa1d5">&#9670;&nbsp;</a></span>SADC_ANA_REF_PART1_PDBISA</h2>
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<td class="memname">#define SADC_ANA_REF_PART1_PDBISA&#160;&#160;&#160;(1U &lt;&lt; 1)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a11de60632b333f34c5faacdc24a0f6b6">&#9670;&nbsp;</a></span>SADC_CLK_CTRL_DIV_BYPASS</h2>
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<td class="memname">#define SADC_CLK_CTRL_DIV_BYPASS&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a4b162715f9bfd4f0bd815044f47766c8">&#9670;&nbsp;</a></span>SADC_CLK_CTRL_REFH_MSK</h2>
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<td class="memname">#define SADC_CLK_CTRL_REFH_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a11d19fc96f840b0c9302388fff7f1a9e">SADC_CLK_CTRL_REFH_POS</a>)</td>
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<a id="a11d19fc96f840b0c9302388fff7f1a9e" name="a11d19fc96f840b0c9302388fff7f1a9e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a11d19fc96f840b0c9302388fff7f1a9e">&#9670;&nbsp;</a></span>SADC_CLK_CTRL_REFH_POS</h2>
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<td class="memname">#define SADC_CLK_CTRL_REFH_POS&#160;&#160;&#160;(8)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa060ca4a9af110b761fa848bcf93eabb">&#9670;&nbsp;</a></span>SADC_CLK_CTRL_REFL_MSK</h2>
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<td class="memname">#define SADC_CLK_CTRL_REFL_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ad4a51c479047f5fc68b2dec61044e251">SADC_CLK_CTRL_REFL_POS</a>)</td>
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<a id="ad4a51c479047f5fc68b2dec61044e251" name="ad4a51c479047f5fc68b2dec61044e251"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad4a51c479047f5fc68b2dec61044e251">&#9670;&nbsp;</a></span>SADC_CLK_CTRL_REFL_POS</h2>
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<td class="memname">#define SADC_CLK_CTRL_REFL_POS&#160;&#160;&#160;(12)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac41d411eb40af7822f4c4dca787063ae">&#9670;&nbsp;</a></span>SADC_DCOC_EN</h2>
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<td class="memname">#define SADC_DCOC_EN&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 4)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a9b230f3f1fa697367d67c7527db1e6ea">&#9670;&nbsp;</a></span>SADC_DCOC_OVWR</h2>
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<td class="memname">#define SADC_DCOC_OVWR&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 8)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5c41623b3827dc0bf53c18682d724e73">&#9670;&nbsp;</a></span>SADC_DCOC_START</h2>
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<td class="memname">#define SADC_DCOC_START&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 3)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae2960fbb8df06c752be547472bbba59d">&#9670;&nbsp;</a></span>SADC_DCOC_TIMES_MSK</h2>
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<td class="memname">#define SADC_DCOC_TIMES_MSK&#160;&#160;&#160;(0x7u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ada1b5443d0f2a5310dabf62a2a1ecd78">SADC_DCOC_TIMES_POS</a>)</td>
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<a id="ada1b5443d0f2a5310dabf62a2a1ecd78" name="ada1b5443d0f2a5310dabf62a2a1ecd78"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ada1b5443d0f2a5310dabf62a2a1ecd78">&#9670;&nbsp;</a></span>SADC_DCOC_TIMES_POS</h2>
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<td class="memname">#define SADC_DCOC_TIMES_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2750455a69e508a0e1082facbb3d27f0">&#9670;&nbsp;</a></span>SADC_DCOC_VALUE_DONE</h2>
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<td class="memname">#define SADC_DCOC_VALUE_DONE&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 31)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a19279e29a6848c9361c3ebb404cec581">&#9670;&nbsp;</a></span>SADC_DCOC_VALUE_MSK</h2>
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<td class="memname">#define SADC_DCOC_VALUE_MSK&#160;&#160;&#160;(0xFFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#aefd7ea765583ce7e3ddba791880c7767">SADC_DCOC_VALUE_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aefd7ea765583ce7e3ddba791880c7767">&#9670;&nbsp;</a></span>SADC_DCOC_VALUE_POS</h2>
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<td class="memname">#define SADC_DCOC_VALUE_POS&#160;&#160;&#160;(16)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a90fcd6345e908d1509885cb12dc8da74">&#9670;&nbsp;</a></span>SADC_DCOC_VALUE_SIGN</h2>
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<td class="memname">#define SADC_DCOC_VALUE_SIGN&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 28)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3b7b0503b07987c2fad047be8c4a28d7">&#9670;&nbsp;</a></span>SADC_DMA_CH0EN_F0RC0</h2>
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<td class="memname">#define SADC_DMA_CH0EN_F0RC0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 11)</td>
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<a id="ae649f5e4571ee281bebbd39489712e88" name="ae649f5e4571ee281bebbd39489712e88"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae649f5e4571ee281bebbd39489712e88">&#9670;&nbsp;</a></span>SADC_DMA_CH0EN_F1RC1</h2>
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<td class="memname">#define SADC_DMA_CH0EN_F1RC1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 10)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a9f44c546f6ea1332096d8e98bc2daa34">&#9670;&nbsp;</a></span>SADC_DMA_CH0EN_F2RC2</h2>
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<td class="memname">#define SADC_DMA_CH0EN_F2RC2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 9)</td>
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<a id="a9794ebefcbb460b4a2bdadef952f4b33" name="a9794ebefcbb460b4a2bdadef952f4b33"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9794ebefcbb460b4a2bdadef952f4b33">&#9670;&nbsp;</a></span>SADC_DMA_CH0EN_F3RC3</h2>
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<td class="memname">#define SADC_DMA_CH0EN_F3RC3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 8)</td>
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<a id="ab25911e804ab69bcf9c91c4f2715e52e" name="ab25911e804ab69bcf9c91c4f2715e52e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab25911e804ab69bcf9c91c4f2715e52e">&#9670;&nbsp;</a></span>SADC_DMA_CH0EN_RCHT</h2>
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<td class="memname">#define SADC_DMA_CH0EN_RCHT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 12)</td>
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<a id="a044a89b358c4277c4f11974af778cee2" name="a044a89b358c4277c4f11974af778cee2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a044a89b358c4277c4f11974af778cee2">&#9670;&nbsp;</a></span>SADC_DMA_CH1EN_F0RC0</h2>
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<td class="memname">#define SADC_DMA_CH1EN_F0RC0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 19)</td>
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<a id="a60895ab814a25219cf8222a82b7f9ca7" name="a60895ab814a25219cf8222a82b7f9ca7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a60895ab814a25219cf8222a82b7f9ca7">&#9670;&nbsp;</a></span>SADC_DMA_CH1EN_F1RC1</h2>
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<td class="memname">#define SADC_DMA_CH1EN_F1RC1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 18)</td>
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<a id="ac74430347d58be6fd13c8cef789aec0f" name="ac74430347d58be6fd13c8cef789aec0f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac74430347d58be6fd13c8cef789aec0f">&#9670;&nbsp;</a></span>SADC_DMA_CH1EN_F2RC2</h2>
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<td class="memname">#define SADC_DMA_CH1EN_F2RC2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 17)</td>
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<a id="ae94daf581df5958821d54c7b64977550" name="ae94daf581df5958821d54c7b64977550"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae94daf581df5958821d54c7b64977550">&#9670;&nbsp;</a></span>SADC_DMA_CH1EN_F3RC3</h2>
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<td class="memname">#define SADC_DMA_CH1EN_F3RC3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 16)</td>
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<a id="ae33c50d7bf7bc60a50f012c8786db6e3" name="ae33c50d7bf7bc60a50f012c8786db6e3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae33c50d7bf7bc60a50f012c8786db6e3">&#9670;&nbsp;</a></span>SADC_DMA_CH1EN_RCHT</h2>
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<td class="memname">#define SADC_DMA_CH1EN_RCHT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 20)</td>
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<a id="a9eb8567dc4032bbea2c2eb6bf32882cf" name="a9eb8567dc4032bbea2c2eb6bf32882cf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9eb8567dc4032bbea2c2eb6bf32882cf">&#9670;&nbsp;</a></span>SADC_DMA_MODE_FIFO0</h2>
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<td class="memname">#define SADC_DMA_MODE_FIFO0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 3)</td>
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<a id="a8b83b6b6f56d9da62c507833c8281966" name="a8b83b6b6f56d9da62c507833c8281966"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8b83b6b6f56d9da62c507833c8281966">&#9670;&nbsp;</a></span>SADC_DMA_MODE_FIFO1</h2>
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<td class="memname">#define SADC_DMA_MODE_FIFO1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 2)</td>
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<a id="a74b6b8f1568fefa2df8875bc8506f91c" name="a74b6b8f1568fefa2df8875bc8506f91c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a74b6b8f1568fefa2df8875bc8506f91c">&#9670;&nbsp;</a></span>SADC_DMA_MODE_FIFO2</h2>
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<td class="memname">#define SADC_DMA_MODE_FIFO2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 1)</td>
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<a id="ab46242bd17aeff280edbd7a2edcc1a78" name="ab46242bd17aeff280edbd7a2edcc1a78"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab46242bd17aeff280edbd7a2edcc1a78">&#9670;&nbsp;</a></span>SADC_DMA_MODE_FIFO3</h2>
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<td class="memname">#define SADC_DMA_MODE_FIFO3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 0)</td>
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<a id="abef7785d3f659a9792497e2028324a65" name="abef7785d3f659a9792497e2028324a65"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abef7785d3f659a9792497e2028324a65">&#9670;&nbsp;</a></span>SADC_DMA_MODE_RCHT</h2>
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<td class="memname">#define SADC_DMA_MODE_RCHT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 4)</td>
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<a id="a406813d6d7fde7e79e6bcdc2268d3d81" name="a406813d6d7fde7e79e6bcdc2268d3d81"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a406813d6d7fde7e79e6bcdc2268d3d81">&#9670;&nbsp;</a></span>SADC_FIFO_CFG_BYPASS</h2>
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<td class="memname">#define SADC_FIFO_CFG_BYPASS&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 4)</td>
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<a id="acd74ea64551a516e69d9f8d8966c3546" name="acd74ea64551a516e69d9f8d8966c3546"></a>
<h2 class="memtitle"><span class="permalink"><a href="#acd74ea64551a516e69d9f8d8966c3546">&#9670;&nbsp;</a></span>SADC_FIFO_CFG_PACK16_AMSEL</h2>
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<td class="memname">#define SADC_FIFO_CFG_PACK16_AMSEL&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 8)</td>
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<a id="ada46da21c8a0af6e29fb9cb5650e17cf" name="ada46da21c8a0af6e29fb9cb5650e17cf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ada46da21c8a0af6e29fb9cb5650e17cf">&#9670;&nbsp;</a></span>SADC_FIFO_CFG_PACK_M_16</h2>
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<td class="memname">#define SADC_FIFO_CFG_PACK_M_16&#160;&#160;&#160;(0u)</td>
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<a id="ac706e80bd998d68498a014a47a809cb1" name="ac706e80bd998d68498a014a47a809cb1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac706e80bd998d68498a014a47a809cb1">&#9670;&nbsp;</a></span>SADC_FIFO_CFG_PACK_M_32</h2>
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<td class="memname">#define SADC_FIFO_CFG_PACK_M_32&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<a id="afe029c8b7f1c22149f3a3708de96689e" name="afe029c8b7f1c22149f3a3708de96689e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afe029c8b7f1c22149f3a3708de96689e">&#9670;&nbsp;</a></span>SADC_FIFO_CFG_PACK_M_64</h2>
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<td class="memname">#define SADC_FIFO_CFG_PACK_M_64&#160;&#160;&#160;(2<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<a id="a909abe1eb827cb116a911c97f712de0e" name="a909abe1eb827cb116a911c97f712de0e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a909abe1eb827cb116a911c97f712de0e">&#9670;&nbsp;</a></span>SADC_FIFO_CFG_PACK_M_MSK</h2>
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<td class="memname">#define SADC_FIFO_CFG_PACK_M_MSK&#160;&#160;&#160;(0x3u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a6aaa32e16fcbf1425c66c79600a9cef4">SADC_FIFO_CFG_PACK_M_POS</a>)</td>
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<a id="a6aaa32e16fcbf1425c66c79600a9cef4" name="a6aaa32e16fcbf1425c66c79600a9cef4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6aaa32e16fcbf1425c66c79600a9cef4">&#9670;&nbsp;</a></span>SADC_FIFO_CFG_PACK_M_POS</h2>
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<td class="memname">#define SADC_FIFO_CFG_PACK_M_POS&#160;&#160;&#160;(0)</td>
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<a id="a7a016833bb519f0f049b1bd1ba79e398" name="a7a016833bb519f0f049b1bd1ba79e398"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7a016833bb519f0f049b1bd1ba79e398">&#9670;&nbsp;</a></span>SADC_HTC_DONE_LEN_MSK</h2>
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<td class="memname">#define SADC_HTC_DONE_LEN_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a6ea174b6b7f193e03c2d51b79a67e37f">SADC_HTC_DONE_LEN_POS</a>)</td>
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<a id="a6ea174b6b7f193e03c2d51b79a67e37f" name="a6ea174b6b7f193e03c2d51b79a67e37f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6ea174b6b7f193e03c2d51b79a67e37f">&#9670;&nbsp;</a></span>SADC_HTC_DONE_LEN_POS</h2>
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<td class="memname">#define SADC_HTC_DONE_LEN_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a28847488102409b3ee859329da8bece9">&#9670;&nbsp;</a></span>SADC_HTC_READY</h2>
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<td class="memname">#define SADC_HTC_READY&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 31)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a02b4ca991afa6c3fcae5e6ff2ee21e61">&#9670;&nbsp;</a></span>SADC_HTC_READY_LEN_MSK</h2>
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<td class="memname">#define SADC_HTC_READY_LEN_MSK&#160;&#160;&#160;(0xFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a1a2a5b621cdea6e909220eede3e025de">SADC_HTC_READY_LEN_POS</a>)</td>
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<a id="a1a2a5b621cdea6e909220eede3e025de" name="a1a2a5b621cdea6e909220eede3e025de"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1a2a5b621cdea6e909220eede3e025de">&#9670;&nbsp;</a></span>SADC_HTC_READY_LEN_POS</h2>
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<td class="memname">#define SADC_HTC_READY_LEN_POS&#160;&#160;&#160;(8)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a231a621b9722611dde2be5f9648efa60">&#9670;&nbsp;</a></span>SADC_INIT_DONE</h2>
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<td class="memname">#define SADC_INIT_DONE&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 24)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac6116c038b784e61e2c2d200946ca2c7">&#9670;&nbsp;</a></span>SADC_INIT_START</h2>
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<td class="memname">#define SADC_INIT_START&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 20)</td>
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<a id="a7da8abca212711047b072b7b299bab45" name="a7da8abca212711047b072b7b299bab45"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7da8abca212711047b072b7b299bab45">&#9670;&nbsp;</a></span>SADC_INIT_VALUE_MSK</h2>
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<td class="memname">#define SADC_INIT_VALUE_MSK&#160;&#160;&#160;(0xFFFFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ae38b5b9ed11a21a7187211cb98ab2aa9">SADC_INIT_VALUE_POS</a>)</td>
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<a id="ae38b5b9ed11a21a7187211cb98ab2aa9" name="ae38b5b9ed11a21a7187211cb98ab2aa9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae38b5b9ed11a21a7187211cb98ab2aa9">&#9670;&nbsp;</a></span>SADC_INIT_VALUE_POS</h2>
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<td class="memname">#define SADC_INIT_VALUE_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2c8213564a2268685c26826197fa117d">&#9670;&nbsp;</a></span>SADC_INT_STAT_END_COV_RC0</h2>
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<td class="memname">#define SADC_INT_STAT_END_COV_RC0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 3)</td>
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<a id="a63585ba15376c8de0fcf647baae69fed" name="a63585ba15376c8de0fcf647baae69fed"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a63585ba15376c8de0fcf647baae69fed">&#9670;&nbsp;</a></span>SADC_INT_STAT_END_COV_RC1</h2>
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<td class="memname">#define SADC_INT_STAT_END_COV_RC1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 2)</td>
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<a id="aabd8339fa945ff60c0ca4ed5eb959873" name="aabd8339fa945ff60c0ca4ed5eb959873"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aabd8339fa945ff60c0ca4ed5eb959873">&#9670;&nbsp;</a></span>SADC_INT_STAT_END_COV_RC2</h2>
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<td class="memname">#define SADC_INT_STAT_END_COV_RC2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 1)</td>
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<a id="a30c00cd7941101a3f87d41e47d0a4c01" name="a30c00cd7941101a3f87d41e47d0a4c01"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a30c00cd7941101a3f87d41e47d0a4c01">&#9670;&nbsp;</a></span>SADC_INT_STAT_END_COV_RC3</h2>
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<td class="memname">#define SADC_INT_STAT_END_COV_RC3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 0)</td>
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<a id="a7623289515170c2e7859edc5dbb393c6" name="a7623289515170c2e7859edc5dbb393c6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7623289515170c2e7859edc5dbb393c6">&#9670;&nbsp;</a></span>SADC_INT_STAT_END_COV_RCHT</h2>
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<td class="memname">#define SADC_INT_STAT_END_COV_RCHT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 4)</td>
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<a id="a7886796e77ce1970eb1f1c2601703ac3" name="a7886796e77ce1970eb1f1c2601703ac3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7886796e77ce1970eb1f1c2601703ac3">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_CONT</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_CONT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 24)</td>
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<a id="af619636b5e209e273acd9b2a34de3dd6" name="af619636b5e209e273acd9b2a34de3dd6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af619636b5e209e273acd9b2a34de3dd6">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE0</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 16)</td>
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<a id="a17a8c4e386a43ad29991b47dbe950eb2" name="a17a8c4e386a43ad29991b47dbe950eb2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a17a8c4e386a43ad29991b47dbe950eb2">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE1</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 17)</td>
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<a id="ab9197aa718d17e8833b973ad3dbfb559" name="ab9197aa718d17e8833b973ad3dbfb559"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab9197aa718d17e8833b973ad3dbfb559">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE2</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 18)</td>
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<a id="a554ee22c92dec9eba4ea253d43426470" name="a554ee22c92dec9eba4ea253d43426470"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a554ee22c92dec9eba4ea253d43426470">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE3</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 19)</td>
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<a id="a70431e1641a808987ba0129f1485c2a2" name="a70431e1641a808987ba0129f1485c2a2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a70431e1641a808987ba0129f1485c2a2">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE4</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE4&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 20)</td>
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<a id="a83bb440da521ccd085f12ad8f25c5bbe" name="a83bb440da521ccd085f12ad8f25c5bbe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a83bb440da521ccd085f12ad8f25c5bbe">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE5</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE5&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 21)</td>
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<a id="a68a0690dfc3356397efc6c7417d10725" name="a68a0690dfc3356397efc6c7417d10725"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a68a0690dfc3356397efc6c7417d10725">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE6</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE6&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 22)</td>
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<a id="a7d442a3e239153430d48ca6e3f251870" name="a7d442a3e239153430d48ca6e3f251870"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7d442a3e239153430d48ca6e3f251870">&#9670;&nbsp;</a></span>SADC_INT_STAT_MNT_SINGLE7</h2>
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<td class="memname">#define SADC_INT_STAT_MNT_SINGLE7&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 23)</td>
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<a id="a6eec88dc6322bf80727a8a528aa93e44" name="a6eec88dc6322bf80727a8a528aa93e44"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6eec88dc6322bf80727a8a528aa93e44">&#9670;&nbsp;</a></span>SADC_INT_STAT_SUB_FIFO0</h2>
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<td class="memname">#define SADC_INT_STAT_SUB_FIFO0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 8)</td>
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<a id="acc17c6cb2e8013408b2fdd0fcb5603e8" name="acc17c6cb2e8013408b2fdd0fcb5603e8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#acc17c6cb2e8013408b2fdd0fcb5603e8">&#9670;&nbsp;</a></span>SADC_INT_STAT_SUB_FIFO1</h2>
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<td class="memname">#define SADC_INT_STAT_SUB_FIFO1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 9)</td>
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<a id="ad5618b0a9ed686c8db99ab61a3e5a4fd" name="ad5618b0a9ed686c8db99ab61a3e5a4fd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad5618b0a9ed686c8db99ab61a3e5a4fd">&#9670;&nbsp;</a></span>SADC_INT_STAT_SUB_FIFO2</h2>
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<td class="memname">#define SADC_INT_STAT_SUB_FIFO2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 10)</td>
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<a id="a8fb8105712050d41a29ffde943bfac49" name="a8fb8105712050d41a29ffde943bfac49"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8fb8105712050d41a29ffde943bfac49">&#9670;&nbsp;</a></span>SADC_INT_STAT_SUB_FIFO3</h2>
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<td class="memname">#define SADC_INT_STAT_SUB_FIFO3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 11)</td>
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<a id="a9bbe9e62353111aa7114e594620fc6f8" name="a9bbe9e62353111aa7114e594620fc6f8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9bbe9e62353111aa7114e594620fc6f8">&#9670;&nbsp;</a></span>SADC_INT_STAT_TS_OVF</h2>
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<td class="memname">#define SADC_INT_STAT_TS_OVF&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 12)</td>
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<a id="a9cc15da101e9051dd786ddbc152db09b" name="a9cc15da101e9051dd786ddbc152db09b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9cc15da101e9051dd786ddbc152db09b">&#9670;&nbsp;</a></span>SADC_MNT_THRES_HIGH_MSK</h2>
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<td class="memname">#define SADC_MNT_THRES_HIGH_MSK&#160;&#160;&#160;(0xFFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#aca2c7556b86bae18e76ca48023cfbe4d">SADC_MNT_THRES_HIGH_POS</a>)</td>
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<a id="aca2c7556b86bae18e76ca48023cfbe4d" name="aca2c7556b86bae18e76ca48023cfbe4d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aca2c7556b86bae18e76ca48023cfbe4d">&#9670;&nbsp;</a></span>SADC_MNT_THRES_HIGH_POS</h2>
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<td class="memname">#define SADC_MNT_THRES_HIGH_POS&#160;&#160;&#160;(0)</td>
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<a id="ac185949232ecd25ad03dfd186b165cd7" name="ac185949232ecd25ad03dfd186b165cd7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac185949232ecd25ad03dfd186b165cd7">&#9670;&nbsp;</a></span>SADC_MNT_THRES_LOW_MSK</h2>
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<td class="memname">#define SADC_MNT_THRES_LOW_MSK&#160;&#160;&#160;(0xFFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a1a1c43c7f36c212c75ea9e7f29e46100">SADC_MNT_THRES_LOW_POS</a>)</td>
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<a id="a1a1c43c7f36c212c75ea9e7f29e46100" name="a1a1c43c7f36c212c75ea9e7f29e46100"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1a1c43c7f36c212c75ea9e7f29e46100">&#9670;&nbsp;</a></span>SADC_MNT_THRES_LOW_POS</h2>
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<td class="memname">#define SADC_MNT_THRES_LOW_POS&#160;&#160;&#160;(16)</td>
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<a id="ac31702f4555aff6eeb227c009bfe5ceb" name="ac31702f4555aff6eeb227c009bfe5ceb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac31702f4555aff6eeb227c009bfe5ceb">&#9670;&nbsp;</a></span>SADC_MNT_THRES_MODE_BETWEEN</h2>
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<td class="memname">#define SADC_MNT_THRES_MODE_BETWEEN&#160;&#160;&#160;(0x2u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ab3349aa189a4e4f287008b182b2cc3a7">SADC_MNT_THRES_MODE_POS</a>)</td>
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<a id="a4a2ac0b7b3994350e6c2d482e2690449" name="a4a2ac0b7b3994350e6c2d482e2690449"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4a2ac0b7b3994350e6c2d482e2690449">&#9670;&nbsp;</a></span>SADC_MNT_THRES_MODE_CLOSE</h2>
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<td class="memname">#define SADC_MNT_THRES_MODE_CLOSE&#160;&#160;&#160;(0x3u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ab3349aa189a4e4f287008b182b2cc3a7">SADC_MNT_THRES_MODE_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5788e5d2b13fca4ae43d6a8d4cc43a77">&#9670;&nbsp;</a></span>SADC_MNT_THRES_MODE_HIGHER</h2>
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<td class="memname">#define SADC_MNT_THRES_MODE_HIGHER&#160;&#160;&#160;(0x0u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ab3349aa189a4e4f287008b182b2cc3a7">SADC_MNT_THRES_MODE_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a31f9b68ae675dfbaa81d09b6c130bea1">&#9670;&nbsp;</a></span>SADC_MNT_THRES_MODE_LOWER</h2>
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<td class="memname">#define SADC_MNT_THRES_MODE_LOWER&#160;&#160;&#160;(0x1u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ab3349aa189a4e4f287008b182b2cc3a7">SADC_MNT_THRES_MODE_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aef7263c92cb46eb37c5d5bc8a4c32e0d">&#9670;&nbsp;</a></span>SADC_MNT_THRES_MODE_MSK</h2>
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<td class="memname">#define SADC_MNT_THRES_MODE_MSK&#160;&#160;&#160;(0x3u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ab3349aa189a4e4f287008b182b2cc3a7">SADC_MNT_THRES_MODE_POS</a>)</td>
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<a id="ab3349aa189a4e4f287008b182b2cc3a7" name="ab3349aa189a4e4f287008b182b2cc3a7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab3349aa189a4e4f287008b182b2cc3a7">&#9670;&nbsp;</a></span>SADC_MNT_THRES_MODE_POS</h2>
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<td class="memname">#define SADC_MNT_THRES_MODE_POS&#160;&#160;&#160;(28)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a08c2d480d6c30fa4f550f60973a4312a">&#9670;&nbsp;</a></span>SADC_RC_ENTRY_AMSEL_MSK</h2>
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<td class="memname">#define SADC_RC_ENTRY_AMSEL_MSK&#160;&#160;&#160;(0x1FFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a3a7034832c1a76a716f4685a8c1d34f4">SADC_RC_ENTRY_AMSEL_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3a7034832c1a76a716f4685a8c1d34f4">&#9670;&nbsp;</a></span>SADC_RC_ENTRY_AMSEL_POS</h2>
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<td class="memname">#define SADC_RC_ENTRY_AMSEL_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2f39643926de83fbe77f95be6342a4a9">&#9670;&nbsp;</a></span>SADC_RC_ENTRY_CSEL_MSK</h2>
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<td class="memname">#define SADC_RC_ENTRY_CSEL_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a29f589d12ac4bf1af269d3ebba71a268">SADC_RC_ENTRY_CSEL_POS</a>)</td>
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<a id="a29f589d12ac4bf1af269d3ebba71a268" name="a29f589d12ac4bf1af269d3ebba71a268"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a29f589d12ac4bf1af269d3ebba71a268">&#9670;&nbsp;</a></span>SADC_RC_ENTRY_CSEL_POS</h2>
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<td class="memname">#define SADC_RC_ENTRY_CSEL_POS&#160;&#160;&#160;(12)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a38a5e1ffb2333a0504719fd8b4f33640">&#9670;&nbsp;</a></span>SADC_RC_ENTRY_RPT_CNT_MSK</h2>
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<td class="memname">#define SADC_RC_ENTRY_RPT_CNT_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a06e38152c91d901eddd925a7dd7fe141">SADC_RC_ENTRY_RPT_CNT_POS</a>)</td>
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<a id="a06e38152c91d901eddd925a7dd7fe141" name="a06e38152c91d901eddd925a7dd7fe141"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a06e38152c91d901eddd925a7dd7fe141">&#9670;&nbsp;</a></span>SADC_RC_ENTRY_RPT_CNT_POS</h2>
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<td class="memname">#define SADC_RC_ENTRY_RPT_CNT_POS&#160;&#160;&#160;(24)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a4d176b92fd55e821ebcf45c186ed2d2e">&#9670;&nbsp;</a></span>SADC_RC_ENTRY_RPT_MODE</h2>
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<td class="memname">#define SADC_RC_ENTRY_RPT_MODE&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 16)</td>
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<a id="a229dc9ad88993a801b990afb6dd63da4" name="a229dc9ad88993a801b990afb6dd63da4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a229dc9ad88993a801b990afb6dd63da4">&#9670;&nbsp;</a></span>SADC_RC_OVWR_CUR_EN</h2>
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<td class="memname">#define SADC_RC_OVWR_CUR_EN&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 16)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#accc636f17acf91be7bdfaa87e8eaffa2">&#9670;&nbsp;</a></span>SADC_RC_Q_CUR_MSK</h2>
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<td class="memname">#define SADC_RC_Q_CUR_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a04a550684ed384f4d856528e03cd1326">SADC_RC_Q_CUR_POS</a>)</td>
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<a id="a04a550684ed384f4d856528e03cd1326" name="a04a550684ed384f4d856528e03cd1326"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a04a550684ed384f4d856528e03cd1326">&#9670;&nbsp;</a></span>SADC_RC_Q_CUR_POS</h2>
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<td class="memname">#define SADC_RC_Q_CUR_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1990a161f6a89c5e9e8783c061b5f821">&#9670;&nbsp;</a></span>SADC_RC_Q_END_MSK</h2>
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<td class="memname">#define SADC_RC_Q_END_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#ad52034c7cc0e84fd9f6930cfe93aec96">SADC_RC_Q_END_POS</a>)</td>
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<a id="ad52034c7cc0e84fd9f6930cfe93aec96" name="ad52034c7cc0e84fd9f6930cfe93aec96"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad52034c7cc0e84fd9f6930cfe93aec96">&#9670;&nbsp;</a></span>SADC_RC_Q_END_POS</h2>
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<td class="memname">#define SADC_RC_Q_END_POS&#160;&#160;&#160;(8)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af2c8e8a5551a194dbadfe1b10cced621">&#9670;&nbsp;</a></span>SADC_RC_Q_START_MSK</h2>
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<td class="memname">#define SADC_RC_Q_START_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a5035d111a1fa8cc1dbfd860fea939377">SADC_RC_Q_START_POS</a>)</td>
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<a id="a5035d111a1fa8cc1dbfd860fea939377" name="a5035d111a1fa8cc1dbfd860fea939377"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5035d111a1fa8cc1dbfd860fea939377">&#9670;&nbsp;</a></span>SADC_RC_Q_START_POS</h2>
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<td class="memname">#define SADC_RC_Q_START_POS&#160;&#160;&#160;(4)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa50e4f9fdb0df349e9db64ffa11baf78">&#9670;&nbsp;</a></span>SADC_RC_SOFT_TRG</h2>
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<td class="memname">#define SADC_RC_SOFT_TRG&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 15)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3a68a5e5d9f83c2d361f013e598acad5">&#9670;&nbsp;</a></span>SADC_RC_TIMER_COMPARE_MSK</h2>
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<td class="memname">#define SADC_RC_TIMER_COMPARE_MSK&#160;&#160;&#160;(0xFFFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a2a7355d90c50c987d1c50be5568524e9">SADC_RC_TIMER_COMPARE_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2a7355d90c50c987d1c50be5568524e9">&#9670;&nbsp;</a></span>SADC_RC_TIMER_COMPARE_POS</h2>
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<td class="memname">#define SADC_RC_TIMER_COMPARE_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab870c8343136f6f72708e09107720c37">&#9670;&nbsp;</a></span>SADC_RC_TIMER_TERMINAL_MSK</h2>
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<td class="memname">#define SADC_RC_TIMER_TERMINAL_MSK&#160;&#160;&#160;(0xFFFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a3d7559b2eed436fbc4e18121a91fb241">SADC_RC_TIMER_TERMINAL_POS</a>)</td>
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<a id="a3d7559b2eed436fbc4e18121a91fb241" name="a3d7559b2eed436fbc4e18121a91fb241"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3d7559b2eed436fbc4e18121a91fb241">&#9670;&nbsp;</a></span>SADC_RC_TIMER_TERMINAL_POS</h2>
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<td class="memname">#define SADC_RC_TIMER_TERMINAL_POS&#160;&#160;&#160;(16)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a22a20dcc4c17c15808c3f245114c04fe">&#9670;&nbsp;</a></span>SADC_RC_TMR_SLAVE</h2>
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<td class="memname">#define SADC_RC_TMR_SLAVE&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 13)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a74f0c82986209181b5c5faac58737c49">&#9670;&nbsp;</a></span>SADC_RC_TRG_EN</h2>
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<td class="memname">#define SADC_RC_TRG_EN&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 17)</td>
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<a id="abe8a8fe65162013e7710af4550f717a8" name="abe8a8fe65162013e7710af4550f717a8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abe8a8fe65162013e7710af4550f717a8">&#9670;&nbsp;</a></span>SADC_RC_TRG_MODE_SW</h2>
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<td class="memname">#define SADC_RC_TRG_MODE_SW&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 14)</td>
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<a id="a4b30b439c9ac9ef60eade2ac465fe641" name="a4b30b439c9ac9ef60eade2ac465fe641"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4b30b439c9ac9ef60eade2ac465fe641">&#9670;&nbsp;</a></span>SADC_RC_TRG_START</h2>
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<td class="memname">#define SADC_RC_TRG_START&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 12)</td>
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<a id="a7815f3f983a7b067459f43926abbe21e" name="a7815f3f983a7b067459f43926abbe21e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7815f3f983a7b067459f43926abbe21e">&#9670;&nbsp;</a></span>SADC_RCHT_ENTRY_AMSEL_MSK</h2>
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<td class="memname">#define SADC_RCHT_ENTRY_AMSEL_MSK&#160;&#160;&#160;(0x1FFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#aecfa29fc192474abf31ecff9e81ad036">SADC_RCHT_ENTRY_AMSEL_POS</a>)</td>
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<a id="aecfa29fc192474abf31ecff9e81ad036" name="aecfa29fc192474abf31ecff9e81ad036"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aecfa29fc192474abf31ecff9e81ad036">&#9670;&nbsp;</a></span>SADC_RCHT_ENTRY_AMSEL_POS</h2>
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<td class="memname">#define SADC_RCHT_ENTRY_AMSEL_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa03edb4d8d2b95600e9bb505d15c1869">&#9670;&nbsp;</a></span>SADC_RCHT_ENTRY_CSEL_MSK</h2>
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<td class="memname">#define SADC_RCHT_ENTRY_CSEL_MSK&#160;&#160;&#160;(0xFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a4cb16f178e77c5f95e7a99867ca88c44">SADC_RCHT_ENTRY_CSEL_POS</a>)</td>
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<a id="a4cb16f178e77c5f95e7a99867ca88c44" name="a4cb16f178e77c5f95e7a99867ca88c44"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4cb16f178e77c5f95e7a99867ca88c44">&#9670;&nbsp;</a></span>SADC_RCHT_ENTRY_CSEL_POS</h2>
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<td class="memname">#define SADC_RCHT_ENTRY_CSEL_POS&#160;&#160;&#160;(12)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3d1d21112a62172a8ae07bab44a1f05c">&#9670;&nbsp;</a></span>SADC_RCHT_ENTRY_RPT_CNT_MSK</h2>
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<td class="memname">#define SADC_RCHT_ENTRY_RPT_CNT_MSK&#160;&#160;&#160;(0x7u &lt;&lt; <a class="el" href="sdrv__adc_8h.html#aa8d674498755f0e5b116e88708d3c150">SADC_RCHT_ENTRY_RPT_CNT_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa8d674498755f0e5b116e88708d3c150">&#9670;&nbsp;</a></span>SADC_RCHT_ENTRY_RPT_CNT_POS</h2>
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<td class="memname">#define SADC_RCHT_ENTRY_RPT_CNT_POS&#160;&#160;&#160;(24)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af70f0be050af4e0a94f84abc453a599b">&#9670;&nbsp;</a></span>SADC_RCHT_ENTRY_RPT_MODE</h2>
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<td class="memname">#define SADC_RCHT_ENTRY_RPT_MODE&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 16)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa740b111ce727f2faf88f9ecb113b94d">&#9670;&nbsp;</a></span>SADC_SCH_CFG_ASYNC_STALL</h2>
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<td class="memname">#define SADC_SCH_CFG_ASYNC_STALL&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 12)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac35868e630e0a28fd8b658d31f4ef1b1">&#9670;&nbsp;</a></span>SADC_SCH_CFG_MODE_MASTER</h2>
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<td class="memname">#define SADC_SCH_CFG_MODE_MASTER&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 9)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a261dea8f23bb2d172e63591ad6b3b875">&#9670;&nbsp;</a></span>SADC_SCH_CFG_MODE_SYNC</h2>
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<td class="memname">#define SADC_SCH_CFG_MODE_SYNC&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 10)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8f07e837ad637ff74485b4538f211c69">&#9670;&nbsp;</a></span>SADC_SCH_CFG_ROT_EN</h2>
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<td class="memname">#define SADC_SCH_CFG_ROT_EN&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 11)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac8bb6d0db795dcc7c6f41aa4898b2298">&#9670;&nbsp;</a></span>SADC_SCH_CFG_RST_DONE</h2>
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<td class="memname">#define SADC_SCH_CFG_RST_DONE&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 28)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2a0cc30a423c0d29b38bc964325871c3">&#9670;&nbsp;</a></span>SADC_SCH_CFG_SLOT_CONST</h2>
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<td class="memname">#define SADC_SCH_CFG_SLOT_CONST&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 8)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a4466db19344de8342b115146ac23301e">&#9670;&nbsp;</a></span>SADC_SCH_CFG_SLOT_HALT</h2>
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<td class="memname">#define SADC_SCH_CFG_SLOT_HALT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 24)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ad9d380c33ab0f9a97c5d0b9e7f76cae7">&#9670;&nbsp;</a></span>SADC_SCH_CFG_SLOT_ITVL_MSK</h2>
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<td class="memname">#define SADC_SCH_CFG_SLOT_ITVL_MSK&#160;&#160;&#160;(0xFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a32fbcc74103f00bca793516b19e96cdf">SADC_SCH_CFG_SLOT_ITVL_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a32fbcc74103f00bca793516b19e96cdf">&#9670;&nbsp;</a></span>SADC_SCH_CFG_SLOT_ITVL_POS</h2>
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<td class="memname">#define SADC_SCH_CFG_SLOT_ITVL_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a92422abb86601bedfc22725f3e7650ab">&#9670;&nbsp;</a></span>SADC_SCH_CFG_SLOT_RST</h2>
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<td class="memname">#define SADC_SCH_CFG_SLOT_RST&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 25)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa55ebea3c967578c4b772ffb8f68f143">&#9670;&nbsp;</a></span>SADC_SCH_CFG_SLV_DLY_MSK</h2>
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<td class="memname">#define SADC_SCH_CFG_SLV_DLY_MSK&#160;&#160;&#160;(0xFFu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#aee4a6d0e7f07747ca2638eb7c766d016">SADC_SCH_CFG_SLV_DLY_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aee4a6d0e7f07747ca2638eb7c766d016">&#9670;&nbsp;</a></span>SADC_SCH_CFG_SLV_DLY_POS</h2>
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<td class="memname">#define SADC_SCH_CFG_SLV_DLY_POS&#160;&#160;&#160;(16)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aba009b2957e7e17971b33977f88d26e8">&#9670;&nbsp;</a></span>SADC_SCH_CFG_TS_RST</h2>
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<td class="memname">#define SADC_SCH_CFG_TS_RST&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 31)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aac2322b202d58a5e7c66cdc9a7b1e316">&#9670;&nbsp;</a></span>SADC_SCH_CFG_TS_VLD</h2>
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<td class="memname">#define SADC_SCH_CFG_TS_VLD&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 30)</td>
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<a id="aa4df941755b071ef44f447c0c8ef8931" name="aa4df941755b071ef44f447c0c8ef8931"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa4df941755b071ef44f447c0c8ef8931">&#9670;&nbsp;</a></span>SADC_SCH_CID_CNT</h2>
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<td class="memname">#define SADC_SCH_CID_CNT&#160;&#160;&#160;(<a class="el" href="sdrv__adc_8h.html#aee4a329d2436077ee9d00f01ede4bc5c">SDRV_ADC_CID_PART_CNT</a> * <a class="el" href="sdrv__adc_8h.html#a95e22a2c0061203aca4dbdb8c482d4d3">SADC_SCH_CID_CNT_PER_REG</a>)</td>
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<a id="a95e22a2c0061203aca4dbdb8c482d4d3" name="a95e22a2c0061203aca4dbdb8c482d4d3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a95e22a2c0061203aca4dbdb8c482d4d3">&#9670;&nbsp;</a></span>SADC_SCH_CID_CNT_PER_REG</h2>
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<td class="memname">#define SADC_SCH_CID_CNT_PER_REG&#160;&#160;&#160;(32 / <a class="el" href="sdrv__adc_8h.html#a27c36ea574b5c3e01f57b62ff41bbc27">SADC_SCH_CID_WIDTH_BIT</a>)</td>
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<a id="a30e945f610916df1129e17b7bcab0948" name="a30e945f610916df1129e17b7bcab0948"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a30e945f610916df1129e17b7bcab0948">&#9670;&nbsp;</a></span>SADC_SCH_CID_MSK</h2>
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<td class="memname">#define SADC_SCH_CID_MSK&#160;&#160;&#160;(0x7u)</td>
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<a id="af67fd138ce195046cda3de61e2cd9d01" name="af67fd138ce195046cda3de61e2cd9d01"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af67fd138ce195046cda3de61e2cd9d01">&#9670;&nbsp;</a></span>SADC_SCH_CID_MV_NEXT</h2>
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<td class="memname">#define SADC_SCH_CID_MV_NEXT&#160;&#160;&#160;(7<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<a id="a27c36ea574b5c3e01f57b62ff41bbc27" name="a27c36ea574b5c3e01f57b62ff41bbc27"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a27c36ea574b5c3e01f57b62ff41bbc27">&#9670;&nbsp;</a></span>SADC_SCH_CID_WIDTH_BIT</h2>
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<td class="memname">#define SADC_SCH_CID_WIDTH_BIT&#160;&#160;&#160;(4)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#abb19d2e24fea6eb1ebdfb42b658d1a42">&#9670;&nbsp;</a></span>SADC_SOFT_RST_ANA</h2>
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<td class="memname">#define SADC_SOFT_RST_ANA&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 1)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a9318a7f903bf92e53a101a17aed918c7">&#9670;&nbsp;</a></span>SADC_SOFT_RST_DIG</h2>
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<td class="memname">#define SADC_SOFT_RST_DIG&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 0)</td>
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<a id="a218c426d0bd422d6259419aa9ce8492d" name="a218c426d0bd422d6259419aa9ce8492d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a218c426d0bd422d6259419aa9ce8492d">&#9670;&nbsp;</a></span>SADC_SOFT_RST_RC0TMR</h2>
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<td class="memname">#define SADC_SOFT_RST_RC0TMR&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 2)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a84b076beabdc0b5b1da2bcb25ae6028c">&#9670;&nbsp;</a></span>SADC_SOFT_RST_RC1TMR</h2>
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<td class="memname">#define SADC_SOFT_RST_RC1TMR&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 3)</td>
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<a id="a6a49eb81082fd24fe72f1bc3ebdfb84d" name="a6a49eb81082fd24fe72f1bc3ebdfb84d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6a49eb81082fd24fe72f1bc3ebdfb84d">&#9670;&nbsp;</a></span>SADC_SOFT_RST_RC2TMR</h2>
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<td class="memname">#define SADC_SOFT_RST_RC2TMR&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 4)</td>
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<a id="a26e3a588b2af4252d59706014ef8428f" name="a26e3a588b2af4252d59706014ef8428f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a26e3a588b2af4252d59706014ef8428f">&#9670;&nbsp;</a></span>SADC_SOFT_RST_RC3TMR</h2>
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<td class="memname">#define SADC_SOFT_RST_RC3TMR&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 5)</td>
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<a id="ab6582315d0adcd474d3ed3030c4fc565" name="ab6582315d0adcd474d3ed3030c4fc565"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab6582315d0adcd474d3ed3030c4fc565">&#9670;&nbsp;</a></span>SADC_SOFT_RST_RC_POS</h2>
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<td class="memname">#define SADC_SOFT_RST_RC_POS&#160;&#160;&#160;(2)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3d7c90b8123b5c4d6922f484b1779f2b">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_EMPTY</h2>
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<td class="memname">#define SADC_SUB_FIFO_EMPTY&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 24)</td>
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<a id="a348cd99ebb8a1b398e91c62ebbdc00d7" name="a348cd99ebb8a1b398e91c62ebbdc00d7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a348cd99ebb8a1b398e91c62ebbdc00d7">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_FULL</h2>
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<td class="memname">#define SADC_SUB_FIFO_FULL&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 25)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a483067bf19f1a68fb319e3942733ae15">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_RC_EN_MSK</h2>
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<td class="memname">#define SADC_SUB_FIFO_RC_EN_MSK&#160;&#160;&#160;(0x1Fu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a5f40dbbb8606ce270dd0f062c4c3f1fe">SADC_SUB_FIFO_RC_EN_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5f40dbbb8606ce270dd0f062c4c3f1fe">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_RC_EN_POS</h2>
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<td class="memname">#define SADC_SUB_FIFO_RC_EN_POS&#160;&#160;&#160;(16)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a951932a36470e1f99b23afc513c08e66">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_SADDR_MSK</h2>
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<td class="memname">#define SADC_SUB_FIFO_SADDR_MSK&#160;&#160;&#160;(0x7Fu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a82b92d7e5cfd53ece21b72849cdf507c">SADC_SUB_FIFO_SADDR_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a82b92d7e5cfd53ece21b72849cdf507c">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_SADDR_POS</h2>
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<td class="memname">#define SADC_SUB_FIFO_SADDR_POS&#160;&#160;&#160;(0)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a691a14ac227e3fd02a812d04f03d2c50">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_THRES_MSK</h2>
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<td class="memname">#define SADC_SUB_FIFO_THRES_MSK&#160;&#160;&#160;(0x7Fu &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a6f071b3386cf07e43a362a786e33dfa6">SADC_SUB_FIFO_THRES_POS</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6f071b3386cf07e43a362a786e33dfa6">&#9670;&nbsp;</a></span>SADC_SUB_FIFO_THRES_POS</h2>
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<td class="memname">#define SADC_SUB_FIFO_THRES_POS&#160;&#160;&#160;(8)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae0da9d2c88caff37ea24a5926bd2b6c3">&#9670;&nbsp;</a></span>sdrv_adc1</h2>
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<td class="memname">#define sdrv_adc1&#160;&#160;&#160;((<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *)APB_ADC1_BASE)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab43b9fa14806280bb927b437d493b6c2">&#9670;&nbsp;</a></span>sdrv_adc2</h2>
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<td class="memname">#define sdrv_adc2&#160;&#160;&#160;((<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *)APB_ADC2_BASE)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa580870daa55365480ad11cc8c06656d">&#9670;&nbsp;</a></span>sdrv_adc3</h2>
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<td class="memname">#define sdrv_adc3&#160;&#160;&#160;((<a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *)APB_ADC3_BASE)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a4953bee4734838559dc9a78ff142c085">&#9670;&nbsp;</a></span>SDRV_ADC_ANA_PARAM_CNT</h2>
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<td class="memname">#define SDRV_ADC_ANA_PARAM_CNT&#160;&#160;&#160;(16<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aee4a329d2436077ee9d00f01ede4bc5c">&#9670;&nbsp;</a></span>SDRV_ADC_CID_PART_CNT</h2>
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<td class="memname">#define SDRV_ADC_CID_PART_CNT&#160;&#160;&#160;(8<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2520684788ac9bcf3c2f7f43c438b698">&#9670;&nbsp;</a></span>SDRV_ADC_CLK_DIV_MAX</h2>
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<td class="memname">#define SDRV_ADC_CLK_DIV_MAX&#160;&#160;&#160;32 /* max clock division ratio */</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af009d128c40f44d5f9bd68d8372e802c">&#9670;&nbsp;</a></span>SDRV_ADC_CLK_DIV_MIN</h2>
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<td class="memname">#define SDRV_ADC_CLK_DIV_MIN&#160;&#160;&#160;5 /* recommended min clock division ratio */</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aed650ee2a4cd6121dbb10b7506e2e719">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_INPUT_ALL</h2>
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<td class="memname">#define SDRV_ADC_FIFO_INPUT_ALL&#160;&#160;&#160;(0x1Fu)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae919dd3420e4c8b5048e54286206e2fd">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_INPUT_RC0</h2>
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<td class="memname">#define SDRV_ADC_FIFO_INPUT_RC0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 3)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af6430a15c5b1f823b6ee9026e73fcb91">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_INPUT_RC1</h2>
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<td class="memname">#define SDRV_ADC_FIFO_INPUT_RC1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 2)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab7f62e8e00d5adce1646f5646392e71c">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_INPUT_RC2</h2>
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<td class="memname">#define SDRV_ADC_FIFO_INPUT_RC2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 1)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af10745a827916162bcece1029fedaa95">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_INPUT_RC3</h2>
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<td class="memname">#define SDRV_ADC_FIFO_INPUT_RC3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 0)</td>
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<p>Descriptor for configuring FIFO data source. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a01cd69885b0bd8331a78f8e890e28026">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_INPUT_RCHT</h2>
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<td class="memname">#define SDRV_ADC_FIFO_INPUT_RCHT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 4)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aacf9b6828066b058d08db4510c567745">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_MODE_PACK16</h2>
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<td class="memname">#define SDRV_ADC_FIFO_MODE_PACK16&#160;&#160;&#160;(0u)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a345b9f2fc01788393328ee238b98d248">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_MODE_PACK32</h2>
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<td class="memname">#define SDRV_ADC_FIFO_MODE_PACK32&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a91952270c3530b8e55fbad182ac8b786">&#9670;&nbsp;</a></span>SDRV_ADC_FIFO_MODE_PACK64</h2>
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<td class="memname">#define SDRV_ADC_FIFO_MODE_PACK64&#160;&#160;&#160;(2<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#afbf7f8af43c1ef4af7c7afb61ed8ac60">&#9670;&nbsp;</a></span>SDRV_ADC_INPUT_DIFF</h2>
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<td class="memname">#define SDRV_ADC_INPUT_DIFF&#160;&#160;&#160;1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1ceaad113fddf408d38d8a753d750edb">&#9670;&nbsp;</a></span>SDRV_ADC_INPUT_SINGLE</h2>
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<td class="memname">#define SDRV_ADC_INPUT_SINGLE&#160;&#160;&#160;0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a7ccedb5cdf48c8eaf62761599e1e0a94">&#9670;&nbsp;</a></span>SDRV_ADC_MNT_SINGLE_CNT</h2>
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<td class="memname">#define SDRV_ADC_MNT_SINGLE_CNT&#160;&#160;&#160;(8<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ace45a0552320f5c4d9dfa2a84c6837d7">&#9670;&nbsp;</a></span>SDRV_ADC_POLL_TMO</h2>
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<td class="memname">#define SDRV_ADC_POLL_TMO&#160;&#160;&#160;(1000 * 1000u)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a46f9c35cfa8f56e2127c065fb85341a8">&#9670;&nbsp;</a></span>SDRV_ADC_RC_CNT</h2>
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<td class="memname">#define SDRV_ADC_RC_CNT&#160;&#160;&#160;(4<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<a id="a51d445309bdc467688c8356851e56796" name="a51d445309bdc467688c8356851e56796"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a51d445309bdc467688c8356851e56796">&#9670;&nbsp;</a></span>SDRV_ADC_RC_ENTRY_CNT</h2>
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<td class="memname">#define SDRV_ADC_RC_ENTRY_CNT&#160;&#160;&#160;(16<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a68ebd436da4e4523c766aaa919bc4438">&#9670;&nbsp;</a></span>SDRV_ADC_RC_REPM_HW_TRG</h2>
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<td class="memname">#define SDRV_ADC_RC_REPM_HW_TRG&#160;&#160;&#160;0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a7802127796aa1d580f47ad49ad2988a8">&#9670;&nbsp;</a></span>SDRV_ADC_RC_REPM_SW_TRG</h2>
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<td class="memname">#define SDRV_ADC_RC_REPM_SW_TRG&#160;&#160;&#160;1</td>
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<a id="a0991070fdbd51dab8337264b09636188" name="a0991070fdbd51dab8337264b09636188"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0991070fdbd51dab8337264b09636188">&#9670;&nbsp;</a></span>SDRV_ADC_RC_TMR_MODE_MASTER</h2>
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<td class="memname">#define SDRV_ADC_RC_TMR_MODE_MASTER&#160;&#160;&#160;0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3b08d1cfeeb580e335a3552051a530e7">&#9670;&nbsp;</a></span>SDRV_ADC_RC_TMR_MODE_SLAVE</h2>
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<td class="memname">#define SDRV_ADC_RC_TMR_MODE_SLAVE&#160;&#160;&#160;1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5533638a48d63504a8152ba9a2a071c7">&#9670;&nbsp;</a></span>SDRV_ADC_RC_TRG_MODE_HW</h2>
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<td class="memname">#define SDRV_ADC_RC_TRG_MODE_HW&#160;&#160;&#160;0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac4077c092e157418a6bf3cb62df733df">&#9670;&nbsp;</a></span>SDRV_ADC_RC_TRG_MODE_SW</h2>
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<td class="memname">#define SDRV_ADC_RC_TRG_MODE_SW&#160;&#160;&#160;1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a737982e84051c80ea05427f0ebfeb78c">&#9670;&nbsp;</a></span>SDRV_ADC_RCHT_ENTRY_CNT</h2>
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<td class="memname">#define SDRV_ADC_RCHT_ENTRY_CNT&#160;&#160;&#160;(32<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5e342a8a75005b616cd32c2e0e179683">&#9670;&nbsp;</a></span>SDRV_ADC_RCHT_REPEAT_1</h2>
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<td class="memname">#define SDRV_ADC_RCHT_REPEAT_1&#160;&#160;&#160;0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a0683d7dcd2df219c2a3931cea5f38aca">&#9670;&nbsp;</a></span>SDRV_ADC_RCHT_REPEAT_16</h2>
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<td class="memname">#define SDRV_ADC_RCHT_REPEAT_16&#160;&#160;&#160;4</td>
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<a id="a4c27a8f28ef85fd4cbb3fd5960ca6524" name="a4c27a8f28ef85fd4cbb3fd5960ca6524"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4c27a8f28ef85fd4cbb3fd5960ca6524">&#9670;&nbsp;</a></span>SDRV_ADC_RCHT_REPEAT_2</h2>
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<td class="memname">#define SDRV_ADC_RCHT_REPEAT_2&#160;&#160;&#160;1</td>
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<a id="abbeeb1ba6bb6911055d671e43e2e15ec" name="abbeeb1ba6bb6911055d671e43e2e15ec"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abbeeb1ba6bb6911055d671e43e2e15ec">&#9670;&nbsp;</a></span>SDRV_ADC_RCHT_REPEAT_4</h2>
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<td class="memname">#define SDRV_ADC_RCHT_REPEAT_4&#160;&#160;&#160;2</td>
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<a id="abac14c41c4a46b0911f3efecb714b532" name="abac14c41c4a46b0911f3efecb714b532"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abac14c41c4a46b0911f3efecb714b532">&#9670;&nbsp;</a></span>SDRV_ADC_RCHT_REPEAT_8</h2>
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<td class="memname">#define SDRV_ADC_RCHT_REPEAT_8&#160;&#160;&#160;3</td>
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<a id="aa511b02633a24d630cf2a53086a75555" name="aa511b02633a24d630cf2a53086a75555"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa511b02633a24d630cf2a53086a75555">&#9670;&nbsp;</a></span>SDRV_ADC_REF_VREFP1</h2>
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<td class="memname">#define SDRV_ADC_REF_VREFP1&#160;&#160;&#160;0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1aeb00c30f3c3a09330dd5fa178a0b77">&#9670;&nbsp;</a></span>SDRV_ADC_REF_VREFP2</h2>
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<td class="memname">#define SDRV_ADC_REF_VREFP2&#160;&#160;&#160;1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aee4e2f098e5c8ad932088bf6c1ba9e0d">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_10D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_10D5&#160;&#160;&#160;3</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a9344775f859283529f02065bf76fdebf">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_130D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_130D5&#160;&#160;&#160;7</td>
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<a id="ae03ad0d6456ed35d695353e3a9444f80" name="ae03ad0d6456ed35d695353e3a9444f80"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae03ad0d6456ed35d695353e3a9444f80">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_18D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_18D5&#160;&#160;&#160;4</td>
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<a id="a85b1b644f710036bc7903feb87ce9dab" name="a85b1b644f710036bc7903feb87ce9dab"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a85b1b644f710036bc7903feb87ce9dab">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_2D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_2D5&#160;&#160;&#160;0</td>
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<a id="a843235649d37e969b3fcaa1e2375d815" name="a843235649d37e969b3fcaa1e2375d815"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a843235649d37e969b3fcaa1e2375d815">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_34D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_34D5&#160;&#160;&#160;5</td>
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<a id="a17efd45c1f50c42ce9246732cff07084" name="a17efd45c1f50c42ce9246732cff07084"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a17efd45c1f50c42ce9246732cff07084">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_4D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_4D5&#160;&#160;&#160;1</td>
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<a id="a0597b054f50c0f9b4baf9b4b8e413e12" name="a0597b054f50c0f9b4baf9b4b8e413e12"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0597b054f50c0f9b4baf9b4b8e413e12">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_66D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_66D5&#160;&#160;&#160;6</td>
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<a id="a27ae8747e88462c5e751c8a400d6ee45" name="a27ae8747e88462c5e751c8a400d6ee45"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a27ae8747e88462c5e751c8a400d6ee45">&#9670;&nbsp;</a></span>SDRV_ADC_SAMPLE_TIME_6D5</h2>
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<td class="memname">#define SDRV_ADC_SAMPLE_TIME_6D5&#160;&#160;&#160;2</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1b8b6ce0003f7b4c67e553b9ba8788fe">&#9670;&nbsp;</a></span>SDRV_ADC_START_ALL</h2>
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<td class="memname">#define SDRV_ADC_START_ALL&#160;&#160;&#160;((1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; <a class="el" href="sdrv__adc_8h.html#a46f9c35cfa8f56e2127c065fb85341a8">SDRV_ADC_RC_CNT</a>) - 1)</td>
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<a id="a1366e74330511580a609dbbf6ae692f7" name="a1366e74330511580a609dbbf6ae692f7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1366e74330511580a609dbbf6ae692f7">&#9670;&nbsp;</a></span>SDRV_ADC_START_RC0</h2>
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<td class="memname">#define SDRV_ADC_START_RC0&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 0)</td>
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<p>Descriptor for starting multiple RC timer at the same time. </p>
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<a id="a18382e748d52a9f6157bbf04b32c0a81" name="a18382e748d52a9f6157bbf04b32c0a81"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a18382e748d52a9f6157bbf04b32c0a81">&#9670;&nbsp;</a></span>SDRV_ADC_START_RC1</h2>
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<td class="memname">#define SDRV_ADC_START_RC1&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 1)</td>
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<a id="a26dc0d28c5b79eafe2164f045316a3fe" name="a26dc0d28c5b79eafe2164f045316a3fe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a26dc0d28c5b79eafe2164f045316a3fe">&#9670;&nbsp;</a></span>SDRV_ADC_START_RC2</h2>
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<td class="memname">#define SDRV_ADC_START_RC2&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 2)</td>
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<a id="a351fbd55109b1ca3b90aaab1ec1595e5" name="a351fbd55109b1ca3b90aaab1ec1595e5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a351fbd55109b1ca3b90aaab1ec1595e5">&#9670;&nbsp;</a></span>SDRV_ADC_START_RC3</h2>
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<td class="memname">#define SDRV_ADC_START_RC3&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a> &lt;&lt; 3)</td>
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<a id="aa471811023c116f054071db1ec707b45" name="aa471811023c116f054071db1ec707b45"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa471811023c116f054071db1ec707b45">&#9670;&nbsp;</a></span>SDRV_ADC_SUB_FIFO_CNT</h2>
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<td class="memname">#define SDRV_ADC_SUB_FIFO_CNT&#160;&#160;&#160;(4<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<h2 class="groupheader">Typedef Documentation</h2>
<a id="a683ba426fdb771185750788d9c7b457d" name="a683ba426fdb771185750788d9c7b457d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a683ba426fdb771185750788d9c7b457d">&#9670;&nbsp;</a></span>sdrv_adc_ana_param_cfg_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__adc__ana__param__cfg.html">sdrv_adc_ana_param_cfg</a> <a class="el" href="sdrv__adc_8h.html#a683ba426fdb771185750788d9c7b457d">sdrv_adc_ana_param_cfg_t</a></td>
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<p>Analog Param configuration info. </p>
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<a id="afd230a1e8587f6b265a598928270f5b4" name="afd230a1e8587f6b265a598928270f5b4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afd230a1e8587f6b265a598928270f5b4">&#9670;&nbsp;</a></span>sdrv_adc_dma_src_cfg_t</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08">sdrv_adc_dma_src_cfg</a> <a class="el" href="sdrv__adc_8h.html#afd230a1e8587f6b265a598928270f5b4">sdrv_adc_dma_src_cfg_t</a></td>
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<p>Describe which source to trigger DMA request. </p>
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<a id="a0b07b6d131e9c574518d2ee2ffd85338" name="a0b07b6d131e9c574518d2ee2ffd85338"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0b07b6d131e9c574518d2ee2ffd85338">&#9670;&nbsp;</a></span>sdrv_adc_fifo_cfg_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__adc__fifo__cfg.html">sdrv_adc_fifo_cfg</a> <a class="el" href="sdrv__adc_8h.html#a0b07b6d131e9c574518d2ee2ffd85338">sdrv_adc_fifo_cfg_t</a></td>
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<p>FIFO configuration info. </p>
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<a id="a805f76630226d47d9cb22030775b1599" name="a805f76630226d47d9cb22030775b1599"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a805f76630226d47d9cb22030775b1599">&#9670;&nbsp;</a></span>sdrv_adc_fifo_rc_cfg_t</h2>
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<td class="memname">typedef unsigned int <a class="el" href="sdrv__adc_8h.html#a805f76630226d47d9cb22030775b1599">sdrv_adc_fifo_rc_cfg_t</a></td>
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<a id="a02bbaea955117f943305e5af43d906d0" name="a02bbaea955117f943305e5af43d906d0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a02bbaea955117f943305e5af43d906d0">&#9670;&nbsp;</a></span>sdrv_adc_rc_cfg_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__adc__rc__cfg.html">sdrv_adc_rc_cfg</a> <a class="el" href="sdrv__adc_8h.html#a02bbaea955117f943305e5af43d906d0">sdrv_adc_rc_cfg_t</a></td>
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<p>RC(Request Channel) configuration info. </p>
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<a id="a1141e84557fc51ffe9d03ce24683e86d" name="a1141e84557fc51ffe9d03ce24683e86d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1141e84557fc51ffe9d03ce24683e86d">&#9670;&nbsp;</a></span>sdrv_adc_rc_entry_cfg_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__adc__rc__entry__cfg.html">sdrv_adc_rc_entry_cfg</a> <a class="el" href="sdrv__adc_8h.html#a1141e84557fc51ffe9d03ce24683e86d">sdrv_adc_rc_entry_cfg_t</a></td>
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<p>RC(Request Channel) entry configuration info. </p>
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<a id="ae627ae80d38c47ffbc81d4118edee267" name="ae627ae80d38c47ffbc81d4118edee267"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae627ae80d38c47ffbc81d4118edee267">&#9670;&nbsp;</a></span>sdrv_adc_rc_start_flag_t</h2>
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<td class="memname">typedef unsigned int <a class="el" href="sdrv__adc_8h.html#ae627ae80d38c47ffbc81d4118edee267">sdrv_adc_rc_start_flag_t</a></td>
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<a id="a09cc3a4372f54206a7b1ea4a1d4e5273" name="a09cc3a4372f54206a7b1ea4a1d4e5273"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a09cc3a4372f54206a7b1ea4a1d4e5273">&#9670;&nbsp;</a></span>sdrv_adc_rcht_entry_cfg_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__adc__rcht__entry__cfg.html">sdrv_adc_rcht_entry_cfg</a> <a class="el" href="sdrv__adc_8h.html#a09cc3a4372f54206a7b1ea4a1d4e5273">sdrv_adc_rcht_entry_cfg_t</a></td>
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<p>RCHT(Request Channel Hardware Trigger) entry configuration info. </p>
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<a id="ac3f3c6d2d256abeec5c9b07e5684d8b4" name="ac3f3c6d2d256abeec5c9b07e5684d8b4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac3f3c6d2d256abeec5c9b07e5684d8b4">&#9670;&nbsp;</a></span>sdrv_adc_sync_cfg_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__adc__sync__cfg.html">sdrv_adc_sync_cfg</a> <a class="el" href="sdrv__adc_8h.html#ac3f3c6d2d256abeec5c9b07e5684d8b4">sdrv_adc_sync_cfg_t</a></td>
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<p>Sync mode configuration info. </p>
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<a id="a4fd5b7141b1e383619fd96cb5bd273bf" name="a4fd5b7141b1e383619fd96cb5bd273bf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4fd5b7141b1e383619fd96cb5bd273bf">&#9670;&nbsp;</a></span>sdrv_adc_sync_cid_t</h2>
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<td class="memname">typedef enum <a class="el" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1d">sdrv_adc_sync_cid</a> <a class="el" href="sdrv__adc_8h.html#a4fd5b7141b1e383619fd96cb5bd273bf">sdrv_adc_sync_cid_t</a></td>
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<p>Descriptor for configuring slot CID in sync mode. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a0474ab16366ca253d67da5f14943e439">&#9670;&nbsp;</a></span>sdrv_adc_t</h2>
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<td class="memname">typedef volatile struct <a class="el" href="structsdrv__adc.html">sdrv_adc</a> <a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a></td>
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<p>Registers of ADC Controller. </p>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a62f2a3e21b90aaa1c0030ba025c34c08">&#9670;&nbsp;</a></span>sdrv_adc_dma_src_cfg</h2>
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<td class="memname">enum <a class="el" href="sdrv__adc_8h.html#a62f2a3e21b90aaa1c0030ba025c34c08">sdrv_adc_dma_src_cfg</a></td>
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<p>Describe which source to trigger DMA request. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a62f2a3e21b90aaa1c0030ba025c34c08a4b3534cd759c24b88c4f4b44eb18223c" name="a62f2a3e21b90aaa1c0030ba025c34c08a4b3534cd759c24b88c4f4b44eb18223c"></a>SDRV_ADC_DMA_SRC_FIFO&#160;</td><td class="fielddoc"><p >fifo threshold </p>
</td></tr>
<tr><td class="fieldname"><a id="a62f2a3e21b90aaa1c0030ba025c34c08ae04dd33b97968d97667db7aa0c34d846" name="a62f2a3e21b90aaa1c0030ba025c34c08ae04dd33b97968d97667db7aa0c34d846"></a>SDRV_ADC_DMA_SRC_RC0&#160;</td><td class="fielddoc"><p >RC0 conversion done </p>
</td></tr>
<tr><td class="fieldname"><a id="a62f2a3e21b90aaa1c0030ba025c34c08a0efb5fe1dd0aac8fce67a7e6d74c7b19" name="a62f2a3e21b90aaa1c0030ba025c34c08a0efb5fe1dd0aac8fce67a7e6d74c7b19"></a>SDRV_ADC_DMA_SRC_RC1&#160;</td><td class="fielddoc"><p >RC1 conversion done </p>
</td></tr>
<tr><td class="fieldname"><a id="a62f2a3e21b90aaa1c0030ba025c34c08a6965491462daa06241b0ee7c6cf15ba3" name="a62f2a3e21b90aaa1c0030ba025c34c08a6965491462daa06241b0ee7c6cf15ba3"></a>SDRV_ADC_DMA_SRC_RC2&#160;</td><td class="fielddoc"><p >RC2 conversion done </p>
</td></tr>
<tr><td class="fieldname"><a id="a62f2a3e21b90aaa1c0030ba025c34c08a965e814cb0cb9e230509a3c5d566aac0" name="a62f2a3e21b90aaa1c0030ba025c34c08a965e814cb0cb9e230509a3c5d566aac0"></a>SDRV_ADC_DMA_SRC_RC3&#160;</td><td class="fielddoc"><p >RC3 conversion done </p>
</td></tr>
<tr><td class="fieldname"><a id="a62f2a3e21b90aaa1c0030ba025c34c08ad5a5e117c3dda438e4946d3c3004f81d" name="a62f2a3e21b90aaa1c0030ba025c34c08ad5a5e117c3dda438e4946d3c3004f81d"></a>SDRV_ADC_DMA_SRC_RCHT&#160;</td><td class="fielddoc"><p >RCHT conversion done </p>
</td></tr>
</table>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aa0837abac3ae1b7e1cd79dd0c4ca1d1d">&#9670;&nbsp;</a></span>sdrv_adc_sync_cid</h2>
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<td class="memname">enum <a class="el" href="sdrv__adc_8h.html#aa0837abac3ae1b7e1cd79dd0c4ca1d1d">sdrv_adc_sync_cid</a></td>
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<p>Descriptor for configuring slot CID in sync mode. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="aa0837abac3ae1b7e1cd79dd0c4ca1d1da0a747f587d00801b289b452e47bdecde" name="aa0837abac3ae1b7e1cd79dd0c4ca1d1da0a747f587d00801b289b452e47bdecde"></a>SDRV_ADC_SYNC_CID_RC0&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa0837abac3ae1b7e1cd79dd0c4ca1d1dab724a4ca505979a4585e3c4ac9977a78" name="aa0837abac3ae1b7e1cd79dd0c4ca1d1dab724a4ca505979a4585e3c4ac9977a78"></a>SDRV_ADC_SYNC_CID_RC1&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa0837abac3ae1b7e1cd79dd0c4ca1d1dabade9d7b2484a44b621d4d9edd75ccfb" name="aa0837abac3ae1b7e1cd79dd0c4ca1d1dabade9d7b2484a44b621d4d9edd75ccfb"></a>SDRV_ADC_SYNC_CID_RC2&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa0837abac3ae1b7e1cd79dd0c4ca1d1daebf1105ffd48ad254c75f442d0a7b436" name="aa0837abac3ae1b7e1cd79dd0c4ca1d1daebf1105ffd48ad254c75f442d0a7b436"></a>SDRV_ADC_SYNC_CID_RC3&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa0837abac3ae1b7e1cd79dd0c4ca1d1daee4caecf85fe4d412b682e4e8e2e5326" name="aa0837abac3ae1b7e1cd79dd0c4ca1d1daee4caecf85fe4d412b682e4e8e2e5326"></a>SDRV_ADC_SYNC_CID_RCHT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa0837abac3ae1b7e1cd79dd0c4ca1d1dadbc645f6ecfbdf9aa5d91a3f1edcfa13" name="aa0837abac3ae1b7e1cd79dd0c4ca1d1dadbc645f6ecfbdf9aa5d91a3f1edcfa13"></a>SDRV_ADC_SYNC_CID_MERGE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aa0837abac3ae1b7e1cd79dd0c4ca1d1da35786a6428d3b87144e0d65a31f2168d" name="aa0837abac3ae1b7e1cd79dd0c4ca1d1da35786a6428d3b87144e0d65a31f2168d"></a>SDRV_ADC_SYNC_CID_IDLE&#160;</td><td class="fielddoc"></td></tr>
</table>
</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a18ff0efeb6c1a48dde7c0652157e0e26">&#9670;&nbsp;</a></span>sdrv_adc_ana_param_cfg()</h2>
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<td class="memname">void <a class="el" href="structsdrv__adc__ana__param__cfg.html">sdrv_adc_ana_param_cfg</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>param_nbr</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a683ba426fdb771185750788d9c7b457d">sdrv_adc_ana_param_cfg_t</a>&#160;</td>
<td class="paramname"><em>aparam_cfg</em>&#160;</td>
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<td>)</td>
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<p>Configure one of the analog parameter array. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">param_nbr</td><td>parameter number [0, 15] </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">aparam_cfg</td><td>analog parameter configuration info </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a31650648a015be174a0f0ed6aa69ca34">&#9670;&nbsp;</a></span>sdrv_adc_Async_start()</h2>
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<td class="memname">void sdrv_adc_Async_start </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Put ADC in Async mode and start working. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
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</dd>
</dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a1e83982c006730a8fc9828895584094e">&#9670;&nbsp;</a></span>sdrv_adc_clear_int_status()</h2>
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<td class="memname">void sdrv_adc_clear_int_status </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>int_bits</em>&#160;</td>
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<td>)</td>
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<p>Clear ADC normal interrupt status. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">int_bits</td><td>interrupt bits to be cleared </td></tr>
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</dd>
</dl>
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<a id="a0c0ed133fe569190d344eb5adf21648d" name="a0c0ed133fe569190d344eb5adf21648d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0c0ed133fe569190d344eb5adf21648d">&#9670;&nbsp;</a></span>sdrv_adc_clr_slave_mode()</h2>
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<td class="memname">void sdrv_adc_clr_slave_mode </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Set ADC controller to Master mode. </p>
<p >Call this if it's set ot Slave mode and Slave mode isn't needed any more.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a8f7a32ec6bd3a82e4c24c2657944dbab">&#9670;&nbsp;</a></span>sdrv_adc_dma_disable()</h2>
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<td class="memname">void sdrv_adc_dma_disable </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Disable DMA request of the ADC controller. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a id="a3161c001f72655956f17661eea289497" name="a3161c001f72655956f17661eea289497"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3161c001f72655956f17661eea289497">&#9670;&nbsp;</a></span>sdrv_adc_dma_enable()</h2>
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<td class="memname">void sdrv_adc_dma_enable </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#afd230a1e8587f6b265a598928270f5b4">sdrv_adc_dma_src_cfg_t</a>&#160;</td>
<td class="paramname"><em>req_src</em>&#160;</td>
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<p>Configure the source to trigger DMA request and enable it. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">req_src</td><td>DMA request source </td></tr>
</table>
</dd>
</dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a4cdf99eeeba0a05089e21be4881f384d">&#9670;&nbsp;</a></span>sdrv_adc_fifo_addr()</h2>
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<td class="memname">uintptr_t sdrv_adc_fifo_addr </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
<td></td>
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<p>Return FIFO address of the ADC controller. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ac1aa0ecdb702bf96a0a31b1c694312f9">&#9670;&nbsp;</a></span>sdrv_adc_fifo_cfg()</h2>
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<td class="memname">void <a class="el" href="structsdrv__adc__fifo__cfg.html">sdrv_adc_fifo_cfg</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0b07b6d131e9c574518d2ee2ffd85338">sdrv_adc_fifo_cfg_t</a> *&#160;</td>
<td class="paramname"><em>fifo_cfg</em>&#160;</td>
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<td>)</td>
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<p>Configure FIFO working mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">fifo_cfg</td><td>fifo configuration parameter </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a18d1567da46c6e35dce4555a44b7a5d5">&#9670;&nbsp;</a></span>sdrv_adc_fifo_rc_cfg()</h2>
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<td class="memname">void sdrv_adc_fifo_rc_cfg </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a805f76630226d47d9cb22030775b1599">sdrv_adc_fifo_rc_cfg_t</a>&#160;</td>
<td class="paramname"><em>rc_cfg</em>&#160;</td>
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<td>)</td>
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<p>Configure which RC or RCHT could insert its data into FIFO. </p>
<p >After initialization, FIFO receives data from all RC and RCHT. Call this only if data from some RC or RCHT isn't needed.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">rc_cfg</td><td>could be any or combine of SDRV_ADC_FIFO_INPUT_RC* </td></tr>
</table>
</dd>
</dl>
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<a id="abe5b146c6de386eed0e13e94f76b4934" name="abe5b146c6de386eed0e13e94f76b4934"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abe5b146c6de386eed0e13e94f76b4934">&#9670;&nbsp;</a></span>sdrv_adc_fifo_status()</h2>
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<td class="memname">uint32_t sdrv_adc_fifo_status </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Get ADC FIFO status. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ae8f38b79f83a962f6f878a743812df53">&#9670;&nbsp;</a></span>sdrv_adc_get_dc_offset()</h2>
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<td class="memname">int16_t sdrv_adc_get_dc_offset </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Get current data calibration offset value of ADC controller. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">current</td><td>dc_offset value </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a014d5e2d0e7860dcc27d57da72e29455">&#9670;&nbsp;</a></span>sdrv_adc_init()</h2>
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<td class="memname">void sdrv_adc_init </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>clk_div</em>&#160;</td>
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<p>ADC controller init. </p>
<p >This function initializes the ADC controller device. Excluding clock divison ratio, the controller is initialized for common usage. If user need special configuration, call other functions after initialization.</p>
<p >Note: Call this function when switching between sync mode and Async mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">clk_div</td><td>clock division ratio for analog part </td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a9d8bd07c37b445ace70368b3306981ae">&#9670;&nbsp;</a></span>sdrv_adc_int_status_en_cfg()</h2>
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<td class="memname">void sdrv_adc_int_status_en_cfg </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>int_bits</em>, </td>
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<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em>&#160;</td>
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<td></td>
<td>)</td>
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<p>Enable or disable ADC controller to record normal interrupt status. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">int_bits</td><td>interrupt bits </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>set int_bits or clear int_bits </td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a5feef46c02a31df7e133a34a98d61174">&#9670;&nbsp;</a></span>sdrv_adc_int_status_sig_en_cfg()</h2>
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<td class="memname">void sdrv_adc_int_status_sig_en_cfg </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>int_bits</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>enable</em>&#160;</td>
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<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<p>Enable or disable ADC controller to trigger normal interrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">int_bits</td><td>interrupt bits </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">enable</td><td>set int_bits or clear int_bits </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aa3f2b2aa2a0f1532c674ff8880cce0b4">&#9670;&nbsp;</a></span>sdrv_adc_power_ctrl()</h2>
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<td class="memname">void sdrv_adc_power_ctrl </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td></td>
<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>down</em>&#160;</td>
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<td>)</td>
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<p>ADC analog reference configuration. </p>
<p >This function control BIAS and SAR analog part power down or power on.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">down</td><td>true for power down, false for power on </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a2cd258d70c6b0c8036d5e10581aa9152">&#9670;&nbsp;</a></span>sdrv_adc_rc_cfg()</h2>
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<td class="memname">void <a class="el" href="structsdrv__adc__rc__cfg.html">sdrv_adc_rc_cfg</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>rc_nbr</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a02bbaea955117f943305e5af43d906d0">sdrv_adc_rc_cfg_t</a> *&#160;</td>
<td class="paramname"><em>rc_cfg</em>&#160;</td>
</tr>
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<td></td>
<td>)</td>
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<p>RC(Request Channel) configuration. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">int_bits</td><td>rc number [0, 3] </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">rc_cfg</td><td>RC configuration parameter </td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#af295451dc2e376cb6e9209f91ebf7479">&#9670;&nbsp;</a></span>sdrv_adc_rc_entry_cfg()</h2>
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<td class="memname">void <a class="el" href="structsdrv__adc__rc__entry__cfg.html">sdrv_adc_rc_entry_cfg</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>rc_nbr</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>entry_nbr</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a1141e84557fc51ffe9d03ce24683e86d">sdrv_adc_rc_entry_cfg_t</a>&#160;</td>
<td class="paramname"><em>entry_cfg</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
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<p>Configure RC(Request Channel) entry. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">rc_nbr</td><td>RC number [0, 3] </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">entry_nbr</td><td>entry number [0, 15] </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">entry_cfg</td><td>entry configuration parameter, including channel info </td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a3d06b1104829388374224a4ebe5d0d9f">&#9670;&nbsp;</a></span>sdrv_adc_rc_soft_trg()</h2>
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<td class="memname">void sdrv_adc_rc_soft_trg </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>rc_nbr</em>&#160;</td>
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<td></td>
<td>)</td>
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<p>Trigger ADC conversion once if the RC is in software trigger mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">int_bits</td><td>rc number [0, 3] </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a226f81219c1b0eb9ab3217b2c6de80dc">&#9670;&nbsp;</a></span>sdrv_adc_rc_start_timers()</h2>
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<td class="memname">void sdrv_adc_rc_start_timers </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#ae627ae80d38c47ffbc81d4118edee267">sdrv_adc_rc_start_flag_t</a>&#160;</td>
<td class="paramname"><em>rc_flags</em>&#160;</td>
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<td>)</td>
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<p>Start multiple RC timer at the same time to trigger ADC conversion. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">rc_flags</td><td>flag of one or multiple rc number </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aca52a48544c92c4655233cdcee991d1e">&#9670;&nbsp;</a></span>sdrv_adc_rc_start_tmr()</h2>
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<td class="memname">void sdrv_adc_rc_start_tmr </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>rc_nbr</em>&#160;</td>
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<td>)</td>
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<p>Start RC timer to trigger ADC conversion. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">int_bits</td><td>rc number [0, 3] </td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a426aac059a0af33a3aba5743413f6894">&#9670;&nbsp;</a></span>sdrv_adc_rc_stop_tmr()</h2>
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<td class="memname">void sdrv_adc_rc_stop_tmr </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>rc_nbr</em>&#160;</td>
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<td>)</td>
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<p>Stop RC timer. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">int_bits</td><td>rc number [0, 3] </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aa3e25e8a10e6e985c721900f8baed386">&#9670;&nbsp;</a></span>sdrv_adc_rcht_clr_ready()</h2>
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<td class="memname">void sdrv_adc_rcht_clr_ready </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Clear RCHT(Request Channel Hardware Trigger) ready. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a4600a52d134367629ac639c3ccbf0fea">&#9670;&nbsp;</a></span>sdrv_adc_rcht_entry_cfg()</h2>
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<td class="memname">void <a class="el" href="structsdrv__adc__rcht__entry__cfg.html">sdrv_adc_rcht_entry_cfg</a> </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>entry_nbr</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a09cc3a4372f54206a7b1ea4a1d4e5273">sdrv_adc_rcht_entry_cfg_t</a>&#160;</td>
<td class="paramname"><em>entry_cfg</em>&#160;</td>
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<td></td>
<td>)</td>
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<p>Configure RCHT(Request Channel Hardware Trigger) entry. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">entry_nbr</td><td>entry number [0, 31] </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">entry_cfg</td><td>entry configuration parameter, including channel info </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ad2604a3c103a66bbf18b33696904fd21">&#9670;&nbsp;</a></span>sdrv_adc_rcht_ready()</h2>
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<td class="memname">void sdrv_adc_rcht_ready </td>
<td>(</td>
<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint8_t&#160;</td>
<td class="paramname"><em>ready_len</em>&#160;</td>
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<td></td>
<td>)</td>
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<p>Set RCHT(Request Channel Hardware Trigger) ready. </p>
<p >If RCHT is ready, RCHT receives signals from cross trigger.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">ready_len</td><td>htc ready length in sync mode. The recommended value is (sync slot_interval - 5). It's invalid in Async mode. </td></tr>
</table>
</dd>
</dl>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a9897dbe58737f92135d07340bdebc793">&#9670;&nbsp;</a></span>sdrv_adc_read_fifo()</h2>
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<td class="memname">uint32_t sdrv_adc_read_fifo </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Read ADC FIFO data. </p>
<p >In pack16 mode, reading once returns 2 conversion data. In pack64 mode, must call this twice to get 1 conversion data.</p>
<dl class="params"><dt>Parameters</dt><dd>
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<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
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</dd>
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<h2 class="memtitle"><span class="permalink"><a href="#a6682860213962028a19c587a68a36469">&#9670;&nbsp;</a></span>sdrv_adc_read_int_status()</h2>
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<td class="memname">uint32_t sdrv_adc_read_int_status </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Read ADC normal interrupt status. </p>
<dl class="params"><dt>Parameters</dt><dd>
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<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">normal</td><td>interrupt status </td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a922f3b59c2f4c1a0b5b6aaf87830b4f0">&#9670;&nbsp;</a></span>sdrv_adc_set_dc_offset()</h2>
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<td class="memname">void sdrv_adc_set_dc_offset </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramtype">int16_t&#160;</td>
<td class="paramname"><em>offset</em>&#160;</td>
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<td>)</td>
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<p>Set data calibration offset value of ADC controller. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>dc_offset value </td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#aebcf37a042636cf308ae559912ed87f0">&#9670;&nbsp;</a></span>sdrv_adc_set_slave_mode()</h2>
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<td class="memname">void sdrv_adc_set_slave_mode </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Set ADC controller to Slave mode. </p>
<p >After initialization, ADC controller is in Master mode. Call this if user needs Slave mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
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<h2 class="memtitle"><span class="permalink"><a href="#a81cb1c700169828f9bc51cf69577b70a">&#9670;&nbsp;</a></span>sdrv_adc_stop()</h2>
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<td class="memname">void sdrv_adc_stop </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramtype">bool&#160;</td>
<td class="paramname"><em>rc_tmr_stop</em>&#160;</td>
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<p>Stop ADC from working. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">rc_tmr_stop</td><td>stop RC timer from running or not </td></tr>
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</dd>
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<h2 class="memtitle"><span class="permalink"><a href="#a0af1a01cbe8f7104795c9da5d99cf9c0">&#9670;&nbsp;</a></span>sdrv_adc_sync_cfg()</h2>
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<td class="memname">void <a class="el" href="structsdrv__adc__sync__cfg.html">sdrv_adc_sync_cfg</a> </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em>, </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#ac3f3c6d2d256abeec5c9b07e5684d8b4">sdrv_adc_sync_cfg_t</a>&#160;</td>
<td class="paramname"><em>sync_cfg</em>, </td>
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<td></td>
<td class="paramtype">uint8_t *&#160;</td>
<td class="paramname"><em>slot_cid</em>, </td>
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<td class="paramtype">unsigned int&#160;</td>
<td class="paramname"><em>len</em>&#160;</td>
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<p>Configure slot CIDs and interval if it's in sync mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">sync_cfg</td><td>slot interval and interval mode parameter </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">slot_cid</td><td>slot CID buffer, could be SDRV_ADC_SYNC_CID_* </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>slot CID buffer length [1, 64] </td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a89836eff6fc0a2dc2e0743d3bad78e4d">&#9670;&nbsp;</a></span>sdrv_adc_sync_slot_reset()</h2>
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<td class="memname">void sdrv_adc_sync_slot_reset </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Reset slot CID pointer to 0 in sync mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
</div>
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<a id="af222849c195796ff151ca02393913a42" name="af222849c195796ff151ca02393913a42"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af222849c195796ff151ca02393913a42">&#9670;&nbsp;</a></span>sdrv_adc_sync_start()</h2>
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<td class="memname">void sdrv_adc_sync_start </td>
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<td class="paramtype"><a class="el" href="sdrv__adc_8h.html#a0474ab16366ca253d67da5f14943e439">sdrv_adc_t</a> *&#160;</td>
<td class="paramname"><em>sdrv_adcX</em></td><td>)</td>
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<p>Put ADC in sync mode and start working. </p>
<p >Call <a class="el" href="structsdrv__adc__sync__cfg.html" title="Sync mode configuration info.">sdrv_adc_sync_cfg</a> before this.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">sdrv_adcX</td><td>ADC controller </td></tr>
</table>
</dd>
</dl>
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