134 lines
2.2 KiB
ArmAsm
134 lines
2.2 KiB
ArmAsm
/*
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* context_saverestore.S
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*
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* Copyright (c) 2022 Semidrive Semiconductor.
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* All rights reserved.
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*
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* Description:
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*
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* Revision History:
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* -----------------
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*/
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.macro portMPU_RegisterSave
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MOV r0, #0
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mpu_save_loop:
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MCR p15, 0, r0, c6, c2, 0
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MRC p15, 0, r2, c6, c1, 0
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STR r2, [r1], #4
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MRC p15, 0, r2, c6, c1, 4
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STR r2, [r1], #4
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MRC p15, 0, r2, c6, c1, 2
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STR r2, [r1], #4
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ADD r0, r0, #1
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CMP r0, #16
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BNE mpu_save_loop
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MRC p15, 0, r2, c1, c0, 0
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STR r2, [r1], #4
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.endm
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; /**********************************************************************/
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.macro portMPU_RegisterRestore
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MRC p15, 0, r2, c1, c0, 0
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LDR r0, =(SCTLR_BR | SCTLR_M)
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BIC r2, r2, r0
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MCR p15, 0, r2, c1, c0, 0
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MOV r0, #0
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mpu_restore_loop:
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MCR p15, 0, r0, c6, c2, 0
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LDR r2, [r1], #4
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MCR p15, 0, r2, c6, c1, 0
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LDR r2, [r1], #4
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MCR p15, 0, r2, c6, c1, 4
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LDR r2, [r1], #4
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MCR p15, 0, r2, c6, c1, 2
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ADD r0, r0, #1
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CMP r0, #16
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BNE mpu_restore_loop
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MRC p15, 0, r0, c1, c0, 0
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LDR r2, =(SCTLR_BR | SCTLR_M)
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ORR r0, r0, r2
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LDR r2, [r1], #4
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TST r2, #SCTLR_M
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MCRNE p15, 0, r0, c1, c0, 0
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.endm
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; /**********************************************************************/
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.macro portCPU_RegisterSave
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PUSH {r0-r3, r12}
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STMIA r1, {r0-r12}
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STR lr, [r1, #(4*REG_R15)]
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MRS r2, SPSR
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STR r2, [r1, #(4*REG_CPSR)]
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#if CONFIG_ARCH_WITH_FPU
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ADD r3, r1, #(4*REG_S0)
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VSTMIA r3!, {s0-s31}
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VMRS r2, fpscr
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STR r2, [r3], #4
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#endif
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CPS #SYS_MODE
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ADD r3, r1, #(4*REG_R13)
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STMIA r3!, {sp, lr}
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CPS #SVC_MODE
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ADD r1, r1, #XCPTCONTEXT_SIZE
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portMPU_RegisterSave
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PUSH {lr}
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LDR r0, arch_clean_invalidate_dcache_all_const
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BLX r0
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POP {lr}
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POP {r0-r3, r12}
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MOVS pc, lr
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.endm
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; /**********************************************************************/
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.macro portCPU_RegisterRestore
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#if CONFIG_ARCH_WITH_FPU
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ADD r3, r1, #(4*REG_S0)
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VLDMIA r3!, {s0-s31}
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LDR r2, [r3], #4
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VMSR fpscr, r2
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#endif
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ADD r4, r1, #(4*REG_R15)
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LDMIA r4, {r2, r3}
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MOV lr, r2
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MSR SPSR_cxsf, r3
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CPS #SYS_MODE
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ADD r4, r1, #(4*REG_R13)
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LDMIA r4, {r2, r3}
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MOV sp, r2
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MOV lr, r3
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PUSH {lr}
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MOV lr, r1
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ADD r1, r1, #XCPTCONTEXT_SIZE
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portMPU_RegisterRestore
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LDMIA lr, {r0-r12}
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POP {lr}
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CPS #SVC_MODE
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MOVS pc, lr
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.endm
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