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<li class="navelem"><a class="el" href="dir_14bc92f4b96c8519b376567118ac28b3.html">drivers</a></li><li class="navelem"><a class="el" href="dir_ee023d43c33bfccc31aa50a48a76892b.html">include</a></li> </ul>
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<a href="#nested-classes">Data Structures</a> &#124;
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<div class="headertitle"><div class="title">sdrv_spi.h File Reference</div></div>
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<div class="textblock"><code>#include &lt;<a class="el" href="sdrv__ckgen_8h_source.html">sdrv_ckgen.h</a>&gt;</code><br />
<code>#include &lt;stdbool.h&gt;</code><br />
<code>#include &lt;stdint.h&gt;</code><br />
<code>#include &quot;reg.h&quot;</code><br />
<code>#include &quot;<a class="el" href="sdrv__dma_8h_source.html">sdrv_dma.h</a>&quot;</code><br />
<code>#include &quot;spi_reg.h&quot;</code><br />
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<p><a href="sdrv__spi_8h_source.html">Go to the source code of this file.</a></p>
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__device__config.html">spi_device_config</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__common__config.html">spi_common_config</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionspi__data__ptr.html">spi_data_ptr</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__dma__context.html">spi_dma_context</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structspi__transmit__cb.html">spi_transmit_cb</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__spi.html">sdrv_spi</a></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:afa70f0e34044c249166c92f65c971fce"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#afa70f0e34044c249166c92f65c971fce">sdrv_spi_init</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *spi, struct <a class="el" href="structspi__common__config.html">spi_common_config</a> *cfg)</td></tr>
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<tr class="memitem:abc65dae99842f3d08074995c06ca98de"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#abc65dae99842f3d08074995c06ca98de">sdrv_spi_deinit</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *bus)</td></tr>
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<tr class="memitem:adda87204e6df34bf9dcd7f50952c6454"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#adda87204e6df34bf9dcd7f50952c6454">sdrv_spi_sync_transmit</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *spi, void *tx_buf, void *rx_buf, uint32_t bytes, uint32_t timeout)</td></tr>
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<tr class="memitem:a5aecb616522472bf8460d4d3a0ebccb2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#a5aecb616522472bf8460d4d3a0ebccb2">sdrv_spi_attach_async_callback</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *spi, <a class="el" href="sdrv__spi_8h.html#afe67f453cd960a973f1fd40630a9367f">spi_callback_t</a> cb)</td></tr>
<tr class="separator:a5aecb616522472bf8460d4d3a0ebccb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afdf21b72da31582b5bcadfa581e58403"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#afdf21b72da31582b5bcadfa581e58403">sdrv_spi_async_transmit</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *spi, void *tx_buf, void *rx_buf, uint32_t bytes, enum <a class="el" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871">spi_ops_type</a> type)</td></tr>
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<tr class="memitem:ac902a346291157329878ead1a7a2cd81"><td class="memItemLeft" align="right" valign="top">enum <a class="el" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4a">spi_bus_state</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#ac902a346291157329878ead1a7a2cd81">sdrv_spi_get_status</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *spi)</td></tr>
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<tr class="memitem:a4b800d23a5875a60060e447bb729472a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#a4b800d23a5875a60060e447bb729472a">sdrv_spi_polling</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *bus)</td></tr>
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<tr class="memitem:a3b97c5b629eead84d1e3ba7a1647290d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="sdrv__spi_8h.html#a3b97c5b629eead84d1e3ba7a1647290d">sdrv_spi_slave_get_transmit_len</a> (struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *bus)</td></tr>
<tr class="separator:a3b97c5b629eead84d1e3ba7a1647290d"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><dl class="section copyright"><dt>Copyright</dt><dd>Copyright (c) 2022 Semidrive Semiconductor. All rights reserved. </dd></dl>
</div><h2 class="groupheader">Macro Definition Documentation</h2>
<a id="a156275a204e0532865172fa23f0c5f38" name="a156275a204e0532865172fa23f0c5f38"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a156275a204e0532865172fa23f0c5f38">&#9670;&nbsp;</a></span>BUS_BUSY_ASYNC_MASK</h2>
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<td class="memname">#define BUS_BUSY_ASYNC_MASK&#160;&#160;&#160;(<a class="el" href="sdrv__spi_8h.html#adb57838c33c2acf6bc530c6899268f3f">BUS_BUSY_DMA_MASK</a> | <a class="el" href="sdrv__spi_8h.html#a07294df104272c3d8ae9657eb44188ed">BUS_BUSY_IRQ_MASK</a>)</td>
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<a id="adb57838c33c2acf6bc530c6899268f3f" name="adb57838c33c2acf6bc530c6899268f3f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#adb57838c33c2acf6bc530c6899268f3f">&#9670;&nbsp;</a></span>BUS_BUSY_DMA_MASK</h2>
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<td class="memname">#define BUS_BUSY_DMA_MASK&#160;&#160;&#160;(<a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3">SPI_STATE_DMA_TX</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4">SPI_STATE_DMA_RX</a>)</td>
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<a id="a07294df104272c3d8ae9657eb44188ed" name="a07294df104272c3d8ae9657eb44188ed"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a07294df104272c3d8ae9657eb44188ed">&#9670;&nbsp;</a></span>BUS_BUSY_IRQ_MASK</h2>
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<td class="memname">#define BUS_BUSY_IRQ_MASK&#160;&#160;&#160;(<a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17">SPI_STATE_IRQ_TX</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d">SPI_STATE_IRQ_RX</a>)</td>
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<a id="adefa172e704d98dff7803b2eefaad9b3" name="adefa172e704d98dff7803b2eefaad9b3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#adefa172e704d98dff7803b2eefaad9b3">&#9670;&nbsp;</a></span>BUS_BUSY_MASK</h2>
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<td class="memname">#define BUS_BUSY_MASK&#160;&#160;&#160;(<a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612">SPI_STATE_BUSY_TX</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9">SPI_STATE_BUSY_RX</a>)</td>
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<a id="a72fc44bb3d8fcc7ae6f497532a381a28" name="a72fc44bb3d8fcc7ae6f497532a381a28"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a72fc44bb3d8fcc7ae6f497532a381a28">&#9670;&nbsp;</a></span>BUS_BUSY_STATUS_MASK</h2>
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<td class="memname">#define BUS_BUSY_STATUS_MASK&#160;&#160;&#160;(<a class="el" href="sdrv__spi_8h.html#adefa172e704d98dff7803b2eefaad9b3">BUS_BUSY_MASK</a> | <a class="el" href="sdrv__spi_8h.html#a156275a204e0532865172fa23f0c5f38">BUS_BUSY_ASYNC_MASK</a>)</td>
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<a id="afd1cccf679b3e9d32c05bbe4c1c89d6b" name="afd1cccf679b3e9d32c05bbe4c1c89d6b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afd1cccf679b3e9d32c05bbe4c1c89d6b">&#9670;&nbsp;</a></span>BUS_FIFO_EMPTYE_TIMEOUT</h2>
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<td class="memname">#define BUS_FIFO_EMPTYE_TIMEOUT</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">f_delay, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">&#160;</td>
<td class="paramname">s_delay, </td>
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<td></td>
<td class="paramtype">&#160;</td>
<td class="paramname">e_delay, </td>
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<td></td>
<td class="paramtype">&#160;</td>
<td class="paramname">baudrate&#160;</td>
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<td>)</td>
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<b>Value:</b><div class="fragment"><div class="line"> (((f_delay) + (s_delay) + (e_delay) + <a class="code hl_define" href="sdrv__spi_8h.html#ad9474f23ef13fafe9358d565e1d7fd09">SPI_DATA_WIDTH_MAX</a>) * 1000000 / \</div>
<div class="line"> (baudrate))</div>
<div class="ttc" id="asdrv__spi_8h_html_ad9474f23ef13fafe9358d565e1d7fd09"><div class="ttname"><a href="sdrv__spi_8h.html#ad9474f23ef13fafe9358d565e1d7fd09">SPI_DATA_WIDTH_MAX</a></div><div class="ttdeci">#define SPI_DATA_WIDTH_MAX</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:289</div></div>
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<a id="a2c6964297753588fc32324ec17d19600" name="a2c6964297753588fc32324ec17d19600"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a2c6964297753588fc32324ec17d19600">&#9670;&nbsp;</a></span>BUS_FIFO_STATE_ERR_MASK</h2>
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<td class="memname">#define BUS_FIFO_STATE_ERR_MASK&#160;&#160;&#160; (<a class="el" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a7207f2f552aeff34a7bcb9b7403fd230">SPI_TX_FIFO_UDR</a> | <a class="el" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992ab1e5a03a5c94c3481777120ecc205f3f">SPI_RX_FIFO_OVR</a> | <a class="el" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a5499035c9f82a80f50beac7d38e47490">SPI_TX_DMA_ERR</a> | <a class="el" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a71ed4c726800f4d80ddd9de1882a9aa1">SPI_RX_DMA_ERR</a>)</td>
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<a id="a1b84532d6e4effffca834da46cd776ce" name="a1b84532d6e4effffca834da46cd776ce"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1b84532d6e4effffca834da46cd776ce">&#9670;&nbsp;</a></span>BUS_FIFO_STATE_MASK</h2>
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<td class="memname">#define BUS_FIFO_STATE_MASK&#160;&#160;&#160;(<a class="el" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992af900525e55908f1dce579bc4ae0d8f6c">SPI_RX_FIFO_READ</a> | <a class="el" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992a986363eea4b58740ded6ed9648619f3d">SPI_TX_FIFO_WRITE</a>)</td>
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<a id="a4e60b9a482ed5470d526604aef69e81d" name="a4e60b9a482ed5470d526604aef69e81d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4e60b9a482ed5470d526604aef69e81d">&#9670;&nbsp;</a></span>BUS_STATE_RX_MASK</h2>
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<td class="memname">#define BUS_STATE_RX_MASK&#160;&#160;&#160; (<a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4">SPI_STATE_DMA_RX</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9">SPI_STATE_BUSY_RX</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d">SPI_STATE_IRQ_RX</a>)</td>
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<a id="abc7dc96b22f1ccc677239bf71a38c659" name="abc7dc96b22f1ccc677239bf71a38c659"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abc7dc96b22f1ccc677239bf71a38c659">&#9670;&nbsp;</a></span>BUS_STATE_TX_MASK</h2>
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<td class="memname">#define BUS_STATE_TX_MASK&#160;&#160;&#160; (<a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3">SPI_STATE_DMA_TX</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612">SPI_STATE_BUSY_TX</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17">SPI_STATE_IRQ_TX</a>)</td>
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<a id="abb0e2c03490825f72dd9623465f46771" name="abb0e2c03490825f72dd9623465f46771"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abb0e2c03490825f72dd9623465f46771">&#9670;&nbsp;</a></span>SPI_CLK_PRESSCALE_MAX</h2>
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<td class="memname">#define SPI_CLK_PRESSCALE_MAX&#160;&#160;&#160;0xFFu</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8bf7dfcf71b712a3e785de65bdbda5ba">&#9670;&nbsp;</a></span>SPI_CLK_PRESSCALE_MAX_SHIFT</h2>
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<td class="memname">#define SPI_CLK_PRESSCALE_MAX_SHIFT&#160;&#160;&#160;(8<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<a id="a5bccdf471d844d0fa838d62b6d32b0d5" name="a5bccdf471d844d0fa838d62b6d32b0d5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5bccdf471d844d0fa838d62b6d32b0d5">&#9670;&nbsp;</a></span>SPI_DATA_WIDTH_BYTE</h2>
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<td class="memname">#define SPI_DATA_WIDTH_BYTE&#160;&#160;&#160;8U</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae333aef72b757c59e44911f4b9fa8ac7">&#9670;&nbsp;</a></span>SPI_DATA_WIDTH_HALF_WORD</h2>
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<td class="memname">#define SPI_DATA_WIDTH_HALF_WORD&#160;&#160;&#160;16U</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ad9474f23ef13fafe9358d565e1d7fd09">&#9670;&nbsp;</a></span>SPI_DATA_WIDTH_MAX</h2>
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<td class="memname">#define SPI_DATA_WIDTH_MAX&#160;&#160;&#160;<a class="el" href="sdrv__spi_8h.html#a843b650eed266c4654448858233449b3">SPI_DATA_WIDTH_WORD</a></td>
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<a id="a9eea492119f5ecdd2cd31fc9299b0342" name="a9eea492119f5ecdd2cd31fc9299b0342"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9eea492119f5ecdd2cd31fc9299b0342">&#9670;&nbsp;</a></span>SPI_DATA_WIDTH_MIN</h2>
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<td class="memname">#define SPI_DATA_WIDTH_MIN&#160;&#160;&#160;4U</td>
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<p>Spi transmit data width type only for internal . </p>
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<a id="a843b650eed266c4654448858233449b3" name="a843b650eed266c4654448858233449b3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a843b650eed266c4654448858233449b3">&#9670;&nbsp;</a></span>SPI_DATA_WIDTH_WORD</h2>
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<td class="memname">#define SPI_DATA_WIDTH_WORD&#160;&#160;&#160;32U</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6c750988a9f08a725b6d0037a7272075">&#9670;&nbsp;</a></span>SPI_END_DELAY_MAX</h2>
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<td class="memname">#define SPI_END_DELAY_MAX&#160;&#160;&#160;0xFFu</td>
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<h2 class="memtitle"><span class="permalink"><a href="#adca0d84b2ff4f78bb1e13fe9439c70b1">&#9670;&nbsp;</a></span>SPI_FIFO_LEN</h2>
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<td class="memname">#define SPI_FIFO_LEN&#160;&#160;&#160;16<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a></td>
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<a id="a091e520f3a30102cc0656d19851729f4" name="a091e520f3a30102cc0656d19851729f4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a091e520f3a30102cc0656d19851729f4">&#9670;&nbsp;</a></span>SPI_FRAME_DELAY_MAX</h2>
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<td class="memname">#define SPI_FRAME_DELAY_MAX&#160;&#160;&#160;0xFFu</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ad0145ea5277545fbf67f2a845417190d">&#9670;&nbsp;</a></span>SPI_FRAME_SIZE_MAX</h2>
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<td class="memname">#define SPI_FRAME_SIZE_MAX&#160;&#160;&#160;1024U</td>
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<a id="a28a822f29caab463bf26f12ea0d4055b" name="a28a822f29caab463bf26f12ea0d4055b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a28a822f29caab463bf26f12ea0d4055b">&#9670;&nbsp;</a></span>SPI_FSM_IDLE_STA</h2>
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<td class="memname">#define SPI_FSM_IDLE_STA&#160;&#160;&#160;2U</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5e5c23d0f58ab7e57447c43edd977786">&#9670;&nbsp;</a></span>SPI_FSM_M_STR_STA</h2>
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<td class="memname">#define SPI_FSM_M_STR_STA&#160;&#160;&#160;3U</td>
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<a id="a3974daf80ad452fb69ceb9c9967759e7" name="a3974daf80ad452fb69ceb9c9967759e7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3974daf80ad452fb69ceb9c9967759e7">&#9670;&nbsp;</a></span>SPI_FSM_WAIT_DATA_STA</h2>
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<td class="memname">#define SPI_FSM_WAIT_DATA_STA&#160;&#160;&#160;7U</td>
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<a id="aa43ed3ebaa7c9eb1d52534c22a0bc9f7" name="aa43ed3ebaa7c9eb1d52534c22a0bc9f7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa43ed3ebaa7c9eb1d52534c22a0bc9f7">&#9670;&nbsp;</a></span>SPI_GET_WIDTH_SHIFT</h2>
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<td class="memname">#define SPI_GET_WIDTH_SHIFT</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">width_type</td><td>)</td>
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<b>Value:</b><div class="fragment"><div class="line"> (((width_type) == <a class="code hl_define" href="sdrv__spi_8h.html#a843b650eed266c4654448858233449b3">SPI_DATA_WIDTH_WORD</a> \</div>
<div class="line"> ? 2 \</div>
<div class="line"> : ((width_type) / <a class="code hl_define" href="sdrv__spi_8h.html#a5bccdf471d844d0fa838d62b6d32b0d5">SPI_DATA_WIDTH_BYTE</a>) - 1))</div>
<div class="ttc" id="asdrv__spi_8h_html_a5bccdf471d844d0fa838d62b6d32b0d5"><div class="ttname"><a href="sdrv__spi_8h.html#a5bccdf471d844d0fa838d62b6d32b0d5">SPI_DATA_WIDTH_BYTE</a></div><div class="ttdeci">#define SPI_DATA_WIDTH_BYTE</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:286</div></div>
<div class="ttc" id="asdrv__spi_8h_html_a843b650eed266c4654448858233449b3"><div class="ttname"><a href="sdrv__spi_8h.html#a843b650eed266c4654448858233449b3">SPI_DATA_WIDTH_WORD</a></div><div class="ttdeci">#define SPI_DATA_WIDTH_WORD</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:288</div></div>
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<h2 class="memtitle"><span class="permalink"><a href="#af65410eacccada2e28bb6ce602b5b8df">&#9670;&nbsp;</a></span>SPI_GET_WIDTH_TYPE</h2>
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<td class="memname">#define SPI_GET_WIDTH_TYPE</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname"><a class="el" href="warning__image_8h.html#aca34d28e3d8bcbcadb8edb4e3af24f8c">width</a></td><td>)</td>
<td></td>
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<b>Value:</b><div class="fragment"><div class="line"> (((<a class="code hl_variable" href="logo__rgb565_8h.html#aca34d28e3d8bcbcadb8edb4e3af24f8c">width</a>) &gt; 16U) \</div>
<div class="line"> ? (<a class="code hl_define" href="sdrv__spi_8h.html#a843b650eed266c4654448858233449b3">SPI_DATA_WIDTH_WORD</a>) \</div>
<div class="line"> : ((<a class="code hl_variable" href="logo__rgb565_8h.html#aca34d28e3d8bcbcadb8edb4e3af24f8c">width</a>) &gt; 8U ? <a class="code hl_define" href="sdrv__spi_8h.html#ae333aef72b757c59e44911f4b9fa8ac7">SPI_DATA_WIDTH_HALF_WORD</a> : <a class="code hl_define" href="sdrv__spi_8h.html#a5bccdf471d844d0fa838d62b6d32b0d5">SPI_DATA_WIDTH_BYTE</a>))</div>
<div class="ttc" id="alogo__rgb565_8h_html_aca34d28e3d8bcbcadb8edb4e3af24f8c"><div class="ttname"><a href="logo__rgb565_8h.html#aca34d28e3d8bcbcadb8edb4e3af24f8c">width</a></div><div class="ttdeci">unsigned int width</div><div class="ttdef"><b>Definition:</b> logo_rgb565.h:32912</div></div>
<div class="ttc" id="asdrv__spi_8h_html_ae333aef72b757c59e44911f4b9fa8ac7"><div class="ttname"><a href="sdrv__spi_8h.html#ae333aef72b757c59e44911f4b9fa8ac7">SPI_DATA_WIDTH_HALF_WORD</a></div><div class="ttdeci">#define SPI_DATA_WIDTH_HALF_WORD</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:287</div></div>
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<a id="ab774a36bf63ced3298c0729a47a17c71" name="ab774a36bf63ced3298c0729a47a17c71"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab774a36bf63ced3298c0729a47a17c71">&#9670;&nbsp;</a></span>SPI_INTERNAL_DIV_SHIFT</h2>
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<td class="memname">#define SPI_INTERNAL_DIV_SHIFT&#160;&#160;&#160;(1<a class="el" href="warning__image_8h.html#ae31d80f000b561c9b9f1be374ce459f9">u</a>)</td>
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<a id="af0587c429434e1005892b01645e48fa8" name="af0587c429434e1005892b01645e48fa8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af0587c429434e1005892b01645e48fa8">&#9670;&nbsp;</a></span>SPI_IS_VALID_LEN</h2>
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<td class="memname">#define SPI_IS_VALID_LEN</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">bytes, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">&#160;</td>
<td class="paramname"><a class="el" href="warning__image_8h.html#aca34d28e3d8bcbcadb8edb4e3af24f8c">width</a>&#160;</td>
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<td>)</td>
<td></td><td>&#160;&#160;&#160; (!((bytes) &amp; ((0x1 &lt;&lt; <a class="el" href="sdrv__spi_8h.html#aa43ed3ebaa7c9eb1d52534c22a0bc9f7">SPI_GET_WIDTH_SHIFT</a>(<a class="el" href="sdrv__spi_8h.html#af65410eacccada2e28bb6ce602b5b8df">SPI_GET_WIDTH_TYPE</a>(<a class="el" href="warning__image_8h.html#aca34d28e3d8bcbcadb8edb4e3af24f8c">width</a>))) - 1)))</td>
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<a id="afa17bab318c6a7512972c1b64a2b18af" name="afa17bab318c6a7512972c1b64a2b18af"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afa17bab318c6a7512972c1b64a2b18af">&#9670;&nbsp;</a></span>SPI_PIPE_LINE_SIZE_2B</h2>
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<td class="memname">#define SPI_PIPE_LINE_SIZE_2B&#160;&#160;&#160;5U</td>
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<a id="acd7c046c9f2648053efe2985b5d925f4" name="acd7c046c9f2648053efe2985b5d925f4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#acd7c046c9f2648053efe2985b5d925f4">&#9670;&nbsp;</a></span>SPI_PIPE_LINE_SIZE_4B</h2>
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<td class="memname">#define SPI_PIPE_LINE_SIZE_4B&#160;&#160;&#160;4U</td>
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<a id="a802bcff3f2804926df7745b79a0f5d90" name="a802bcff3f2804926df7745b79a0f5d90"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a802bcff3f2804926df7745b79a0f5d90">&#9670;&nbsp;</a></span>SPI_PIPE_LINE_SIZE_8B</h2>
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<td class="memname">#define SPI_PIPE_LINE_SIZE_8B&#160;&#160;&#160;3U</td>
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<a id="af0d1e7d8ede43a406fb579e42f26aefb" name="af0d1e7d8ede43a406fb579e42f26aefb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af0d1e7d8ede43a406fb579e42f26aefb">&#9670;&nbsp;</a></span>SPI_PIPE_LINE_SIZE_OB</h2>
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<td class="memname">#define SPI_PIPE_LINE_SIZE_OB&#160;&#160;&#160;2U</td>
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</div>
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<a id="a2207d4d5f78e290c424cfa7076bc27ca" name="a2207d4d5f78e290c424cfa7076bc27ca"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a2207d4d5f78e290c424cfa7076bc27ca">&#9670;&nbsp;</a></span>SPI_POL_VEL_ILLEGAL</h2>
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<td class="memname">#define SPI_POL_VEL_ILLEGAL&#160;&#160;&#160;(~0xFu)</td>
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<a id="a90c27baa681bc18d46344992d71ab57e" name="a90c27baa681bc18d46344992d71ab57e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a90c27baa681bc18d46344992d71ab57e">&#9670;&nbsp;</a></span>SPI_READ_FIFO_TIMEOUT_MAX</h2>
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<td class="memname">#define SPI_READ_FIFO_TIMEOUT_MAX</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">f_delay, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype">&#160;</td>
<td class="paramname">s_delay, </td>
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<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">&#160;</td>
<td class="paramname">e_delay, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">&#160;</td>
<td class="paramname">baudrate&#160;</td>
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<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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<b>Value:</b><div class="fragment"><div class="line"> ((((f_delay) + (s_delay) + (e_delay)) * 9 + \</div>
<div class="line"> SPI_DATA_WIDTH_MAX * <a class="code hl_define" href="sdrv__spi_8h.html#adca0d84b2ff4f78bb1e13fe9439c70b1">SPI_FIFO_LEN</a>) * \</div>
<div class="line"> 1000000 / (baudrate))</div>
<div class="ttc" id="asdrv__spi_8h_html_adca0d84b2ff4f78bb1e13fe9439c70b1"><div class="ttname"><a href="sdrv__spi_8h.html#adca0d84b2ff4f78bb1e13fe9439c70b1">SPI_FIFO_LEN</a></div><div class="ttdeci">#define SPI_FIFO_LEN</div><div class="ttdef"><b>Definition:</b> sdrv_spi.h:278</div></div>
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<a id="a07df3436919eaea1ff7263ff7407cd18" name="a07df3436919eaea1ff7263ff7407cd18"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a07df3436919eaea1ff7263ff7407cd18">&#9670;&nbsp;</a></span>SPI_SATE_EXT_FLAGS</h2>
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<td class="memname">#define SPI_SATE_EXT_FLAGS&#160;&#160;&#160; (<a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a6fdd3c8af7c56233ee52eb6504128284">SPI_STATE_IS_UNS_EN</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2a52a6ca5c5b2eebd9437577dab940fa10">SPI_STATE_IS_RO_END</a> | <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2aef19188483bc3cef0dd026926afe2864">SPI_STATE_CS_ACTIVEED</a>)</td>
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<a id="a50d87fa69230646a7373977a9bc5a9ec" name="a50d87fa69230646a7373977a9bc5a9ec"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a50d87fa69230646a7373977a9bc5a9ec">&#9670;&nbsp;</a></span>SPI_SLAVE_IRQ_NICE_ADJUST</h2>
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<td class="memname">#define SPI_SLAVE_IRQ_NICE_ADJUST&#160;&#160;&#160;(-1) /* slave irq nice val */</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a62f0d4c189afde302238c98a8f8c334e">&#9670;&nbsp;</a></span>SPI_START_DELAY_MAX</h2>
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<td class="memname">#define SPI_START_DELAY_MAX&#160;&#160;&#160;0xFFu</td>
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<h2 class="memtitle"><span class="permalink"><a href="#acdcbb0b84130ad701c7e009485f8aec1">&#9670;&nbsp;</a></span>SPI_TIMMING_CFG</h2>
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<td class="memname">#define SPI_TIMMING_CFG</td>
<td>(</td>
<td class="paramtype">&#160;</td>
<td class="paramname">f, </td>
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<td class="paramtype">&#160;</td>
<td class="paramname">s, </td>
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<td class="paramkey"></td>
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<td class="paramtype">&#160;</td>
<td class="paramname">e&#160;</td>
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<td>)</td>
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<b>Value:</b><div class="fragment"><div class="line"> (FV_SPI_TIM_CTRL_START_DLY(s) | FV_SPI_TIM_CTRL_END_DLY(e) | \</div>
<div class="line"> FV_SPI_TIM_CTRL_FRM_DLY(f))</div>
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<h2 class="groupheader">Typedef Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a2105e872f7305ed97dcb5791a32052cc">&#9670;&nbsp;</a></span>sdrv_spi_t</h2>
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<td class="memname">typedef struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> <a class="el" href="sdrv__spi_8h.html#a2105e872f7305ed97dcb5791a32052cc">sdrv_spi_t</a></td>
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<p>Spi bus module handler type . </p>
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<h2 class="memtitle"><span class="permalink"><a href="#afe67f453cd960a973f1fd40630a9367f">&#9670;&nbsp;</a></span>spi_callback_t</h2>
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<td class="memname">typedef void(* spi_callback_t) (void *spi, <a class="el" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187">spi_event_type</a> Event)</td>
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<p>Spi async transmit callback type . </p>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a4caf8d8f829279fba122163d961608a4">&#9670;&nbsp;</a></span>anonymous enum</h2>
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<td class="memname">anonymous enum</td>
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<p>spi status return code </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4aa1a6e55376adccdb541a14a34879efc7" name="a4caf8d8f829279fba122163d961608a4aa1a6e55376adccdb541a14a34879efc7"></a>SDRV_SPI_STATUS_MODE_ERROR&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4aa59f6a5c6be6684a888f7ca860f00165" name="a4caf8d8f829279fba122163d961608a4aa59f6a5c6be6684a888f7ca860f00165"></a>SDRV_SPI_STATUS_GCMD_NO_SUPPORT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4aa77df799302d1fdeb0693ef917249635" name="a4caf8d8f829279fba122163d961608a4aa77df799302d1fdeb0693ef917249635"></a>SDRV_SPI_STATUS_GCMD_TIMEOUT_WRITE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4af8424634fe742b405a4323306a067b06" name="a4caf8d8f829279fba122163d961608a4af8424634fe742b405a4323306a067b06"></a>SDRV_SPI_STATUS_GCMD_TIMEOUT_FINISH&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4a8d5cc2f802332a058f478b7143f771aa" name="a4caf8d8f829279fba122163d961608a4a8d5cc2f802332a058f478b7143f771aa"></a>SDRV_SPI_STATUS_SOFT_CS_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4a67a7c92e4eb92388143aef1b24e4546b" name="a4caf8d8f829279fba122163d961608a4a67a7c92e4eb92388143aef1b24e4546b"></a>SDRV_SPI_STATUS_UCMD_TIMEOUT_WRITE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4a9b67accd93ca91efffcb81f388781dd9" name="a4caf8d8f829279fba122163d961608a4a9b67accd93ca91efffcb81f388781dd9"></a>SDRV_SPI_STATUS_UCMD_TIMEOUT_FINISH&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4a37048d20e259383297bb4ece42199eab" name="a4caf8d8f829279fba122163d961608a4a37048d20e259383297bb4ece42199eab"></a>SDRV_SPI_STATUS_SYNC_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4a90797ba3abbf5391e4bde9b39fd9f981" name="a4caf8d8f829279fba122163d961608a4a90797ba3abbf5391e4bde9b39fd9f981"></a>SDRV_SPI_STATUS_SOFT_CS_WAIT_TIMEOUT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4a739a73ea6ebdfb9f82ff5bf547a4e85e" name="a4caf8d8f829279fba122163d961608a4a739a73ea6ebdfb9f82ff5bf547a4e85e"></a>SDRV_SPI_STATUS_FAIL_DMA_SETUP&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4ad1112caa8dc4c762639f8c931c5b2143" name="a4caf8d8f829279fba122163d961608a4ad1112caa8dc4c762639f8c931c5b2143"></a>SDRV_SPI_STATUS_FAIL_IRQ_SETUP&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4caf8d8f829279fba122163d961608a4aa7ef6aeac205ea1b0186918b24f26911" name="a4caf8d8f829279fba122163d961608a4aa7ef6aeac205ea1b0186918b24f26911"></a>SDRV_SPI_STATUS_PARAM_ILLEGAL&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#aaaef1244e0a05abda3f6d56d6831953e">&#9670;&nbsp;</a></span>data_dir</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#aaaef1244e0a05abda3f6d56d6831953e">data_dir</a></td>
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<p>Spi transmit data direction type . </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="aaaef1244e0a05abda3f6d56d6831953ea7fbd0493407a88ec23c8e571c0447f87" name="aaaef1244e0a05abda3f6d56d6831953ea7fbd0493407a88ec23c8e571c0447f87"></a>SPI_RX_DIR&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="aaaef1244e0a05abda3f6d56d6831953ea2317986d65fff20968785c40b25a4c9b" name="aaaef1244e0a05abda3f6d56d6831953ea2317986d65fff20968785c40b25a4c9b"></a>SPI_TX_DIR&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a94efc98242444def1e6b31c77abcc992">&#9670;&nbsp;</a></span>fifo_state</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#a94efc98242444def1e6b31c77abcc992">fifo_state</a></td>
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<p>Spi fifo state flags. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a94efc98242444def1e6b31c77abcc992af900525e55908f1dce579bc4ae0d8f6c" name="a94efc98242444def1e6b31c77abcc992af900525e55908f1dce579bc4ae0d8f6c"></a>SPI_RX_FIFO_READ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a94efc98242444def1e6b31c77abcc992a986363eea4b58740ded6ed9648619f3d" name="a94efc98242444def1e6b31c77abcc992a986363eea4b58740ded6ed9648619f3d"></a>SPI_TX_FIFO_WRITE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a94efc98242444def1e6b31c77abcc992a7207f2f552aeff34a7bcb9b7403fd230" name="a94efc98242444def1e6b31c77abcc992a7207f2f552aeff34a7bcb9b7403fd230"></a>SPI_TX_FIFO_UDR&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a94efc98242444def1e6b31c77abcc992ab1e5a03a5c94c3481777120ecc205f3f" name="a94efc98242444def1e6b31c77abcc992ab1e5a03a5c94c3481777120ecc205f3f"></a>SPI_RX_FIFO_OVR&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a94efc98242444def1e6b31c77abcc992a5499035c9f82a80f50beac7d38e47490" name="a94efc98242444def1e6b31c77abcc992a5499035c9f82a80f50beac7d38e47490"></a>SPI_TX_DMA_ERR&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a94efc98242444def1e6b31c77abcc992a71ed4c726800f4d80ddd9de1882a9aa1" name="a94efc98242444def1e6b31c77abcc992a71ed4c726800f4d80ddd9de1882a9aa1"></a>SPI_RX_DMA_ERR&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a94efc98242444def1e6b31c77abcc992adf6899b51412eaac3451a1a4c3c1bddb" name="a94efc98242444def1e6b31c77abcc992adf6899b51412eaac3451a1a4c3c1bddb"></a>SPI_TX_ONLY_DONE&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a3b84711f4729b8ef456ee80707f6b579">&#9670;&nbsp;</a></span>irq_type</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#a3b84711f4729b8ef456ee80707f6b579">irq_type</a></td>
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<p>Spi irq type . </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a3b84711f4729b8ef456ee80707f6b579a71da78e64c103e0aca751f529d032ff0" name="a3b84711f4729b8ef456ee80707f6b579a71da78e64c103e0aca751f529d032ff0"></a>SPI_TRASPORT_FINISH&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a3b84711f4729b8ef456ee80707f6b579a1d85271a6ae60d4f4791143f8d33c015" name="a3b84711f4729b8ef456ee80707f6b579a1d85271a6ae60d4f4791143f8d33c015"></a>SPI_RX_READ_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a3b84711f4729b8ef456ee80707f6b579acc5fb717fcf172ebaef7b1df9c4ed7cc" name="a3b84711f4729b8ef456ee80707f6b579acc5fb717fcf172ebaef7b1df9c4ed7cc"></a>SPI_TX_WRITE_REQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a3b84711f4729b8ef456ee80707f6b579a991dd1bc79f63e864f61d13e6401064d" name="a3b84711f4729b8ef456ee80707f6b579a991dd1bc79f63e864f61d13e6401064d"></a>SPI_CS_INVLD_REQ&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#adf7c33c6af2ba76c98bd4e6273a54b4a">&#9670;&nbsp;</a></span>spi_bus_state</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4a">spi_bus_state</a></td>
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<p>Spi bus idle/busy state . </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="adf7c33c6af2ba76c98bd4e6273a54b4aa3b368c531eb77a6e4baaacdeba1c733c" name="adf7c33c6af2ba76c98bd4e6273a54b4aa3b368c531eb77a6e4baaacdeba1c733c"></a>SPI_IDLE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="adf7c33c6af2ba76c98bd4e6273a54b4aa77af10511cd7c60df95c66e904a13643" name="adf7c33c6af2ba76c98bd4e6273a54b4aa77af10511cd7c60df95c66e904a13643"></a>SPI_BUSY&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a6e4d9dc6f78fda72ab158f29bc252f65">&#9670;&nbsp;</a></span>spi_cpha</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#a6e4d9dc6f78fda72ab158f29bc252f65">spi_cpha</a></td>
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<p>Spi sclk phase mode. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a6e4d9dc6f78fda72ab158f29bc252f65a8ce0855eff8bb34bf9bff87b6e6ff62d" name="a6e4d9dc6f78fda72ab158f29bc252f65a8ce0855eff8bb34bf9bff87b6e6ff62d"></a>DATA_CPT_ON_FIRST_SCK_EDGE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a6e4d9dc6f78fda72ab158f29bc252f65abae896865f9b933d6d1d0fcde07995ad" name="a6e4d9dc6f78fda72ab158f29bc252f65abae896865f9b933d6d1d0fcde07995ad"></a>DATA_CPT_ON_SECOND_SCK_EDGE&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#ac55e1067f98be1b5f14a41765304aef8">&#9670;&nbsp;</a></span>spi_cpol</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#ac55e1067f98be1b5f14a41765304aef8">spi_cpol</a></td>
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<p>Spi sclk idle mode. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ac55e1067f98be1b5f14a41765304aef8a4798f253437a781dfe5bac4fc50b282a" name="ac55e1067f98be1b5f14a41765304aef8a4798f253437a781dfe5bac4fc50b282a"></a>SCK_IDLE_LOW&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="ac55e1067f98be1b5f14a41765304aef8ae83e6e93ec3fbacc9189a2212b22dc86" name="ac55e1067f98be1b5f14a41765304aef8ae83e6e93ec3fbacc9189a2212b22dc86"></a>SCK_IDLE_HIGH&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a026256af80b7598708770027a7b574f9">&#9670;&nbsp;</a></span>spi_cs_polarity</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#a026256af80b7598708770027a7b574f9">spi_cs_polarity</a></td>
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<p>Spi cs mode. </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a026256af80b7598708770027a7b574f9af9fd1d20aaa46974b85c22f8b224906a" name="a026256af80b7598708770027a7b574f9af9fd1d20aaa46974b85c22f8b224906a"></a>CS_ACTIVE_LOW&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a026256af80b7598708770027a7b574f9a77105b2f98fec68a5a75c86a058534b5" name="a026256af80b7598708770027a7b574f9a77105b2f98fec68a5a75c86a058534b5"></a>CS_ACTIVE_HIGH&#160;</td><td class="fielddoc"></td></tr>
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<h2 class="memtitle"><span class="permalink"><a href="#a643e09edea30b0fa5e6dcc8797e62a63">&#9670;&nbsp;</a></span>spi_cs_select</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#a643e09edea30b0fa5e6dcc8797e62a63">spi_cs_select</a></td>
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<p>Spi hardware cs select . </p>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a643e09edea30b0fa5e6dcc8797e62a63a3a97d5f36f5f4119204400994c9c7dcd" name="a643e09edea30b0fa5e6dcc8797e62a63a3a97d5f36f5f4119204400994c9c7dcd"></a>CS_SEL_SS0&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a643e09edea30b0fa5e6dcc8797e62a63a3ff078afdd80ff69dea6fb90f517cffe" name="a643e09edea30b0fa5e6dcc8797e62a63a3ff078afdd80ff69dea6fb90f517cffe"></a>CS_SEL_SS1&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a643e09edea30b0fa5e6dcc8797e62a63a10a22689551e5b91b417ff49c21e83fa" name="a643e09edea30b0fa5e6dcc8797e62a63a10a22689551e5b91b417ff49c21e83fa"></a>CS_SEL_SS2&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a643e09edea30b0fa5e6dcc8797e62a63a09c515c068def175e6bd5be3114ab2b5" name="a643e09edea30b0fa5e6dcc8797e62a63a09c515c068def175e6bd5be3114ab2b5"></a>CS_SEL_SS3&#160;</td><td class="fielddoc"></td></tr>
</table>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a4a6a5bf67f1ffa420defb950d8000187">&#9670;&nbsp;</a></span>spi_event_type</h2>
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<table class="memname">
<tr>
<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#a4a6a5bf67f1ffa420defb950d8000187">spi_event_type</a></td>
</tr>
</table>
</div><div class="memdoc">
<p>Spi async transmit callback type . </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a4a6a5bf67f1ffa420defb950d8000187a436ec2bf6cc84a3264aa50aee42303bf" name="a4a6a5bf67f1ffa420defb950d8000187a436ec2bf6cc84a3264aa50aee42303bf"></a>SPI_TRANS_DONE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4a6a5bf67f1ffa420defb950d8000187a8845a938c5b584e72f0e79c60204cf39" name="a4a6a5bf67f1ffa420defb950d8000187a8845a938c5b584e72f0e79c60204cf39"></a>SPI_TRANS_FAIL&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4a6a5bf67f1ffa420defb950d8000187adc1a6d72de187f49cb0d876455719b81" name="a4a6a5bf67f1ffa420defb950d8000187adc1a6d72de187f49cb0d876455719b81"></a>SPI_TRANS_PASS&#160;</td><td class="fielddoc"></td></tr>
</table>
</div>
</div>
<a id="abd4f021695236b6c75b26f924a405871" name="abd4f021695236b6c75b26f924a405871"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abd4f021695236b6c75b26f924a405871">&#9670;&nbsp;</a></span>spi_ops_type</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871">spi_ops_type</a></td>
</tr>
</table>
</div><div class="memdoc">
<p>Spi transmit mode . </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="abd4f021695236b6c75b26f924a405871aae04f0d32e6c569d9741adbc02cbc9ae" name="abd4f021695236b6c75b26f924a405871aae04f0d32e6c569d9741adbc02cbc9ae"></a>OP_MODE_SYNC&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="abd4f021695236b6c75b26f924a405871a28c81e4590d645052a36f77ff08cd824" name="abd4f021695236b6c75b26f924a405871a28c81e4590d645052a36f77ff08cd824"></a>OP_MODE_IRQ&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="abd4f021695236b6c75b26f924a405871ab21821808ecda763084d72510cc11859" name="abd4f021695236b6c75b26f924a405871ab21821808ecda763084d72510cc11859"></a>OP_MODE_DMA&#160;</td><td class="fielddoc"></td></tr>
</table>
</div>
</div>
<a id="a4d47defb9ba5833c0af11d0abaf928c2" name="a4d47defb9ba5833c0af11d0abaf928c2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4d47defb9ba5833c0af11d0abaf928c2">&#9670;&nbsp;</a></span>spi_state</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#a4d47defb9ba5833c0af11d0abaf928c2">spi_state</a></td>
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</table>
</div><div class="memdoc">
<p>Spi Bus state flags. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a8d22ab8335993c85e237f9d8c625138b" name="a4d47defb9ba5833c0af11d0abaf928c2a8d22ab8335993c85e237f9d8c625138b"></a>SPI_STATE_UNINIT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a21aa93a1cb39865cc54f483b69a21e32" name="a4d47defb9ba5833c0af11d0abaf928c2a21aa93a1cb39865cc54f483b69a21e32"></a>SPI_STATE_INITED&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612" name="a4d47defb9ba5833c0af11d0abaf928c2af432092b0d9decb7e8a887baa36d8612"></a>SPI_STATE_BUSY_TX&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9" name="a4d47defb9ba5833c0af11d0abaf928c2a61eaef3f44191cc1ca449fc541a803e9"></a>SPI_STATE_BUSY_RX&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a533e5d9f204ee8cd75dd5a538d6ff529" name="a4d47defb9ba5833c0af11d0abaf928c2a533e5d9f204ee8cd75dd5a538d6ff529"></a>SPI_STATE_IRQ_ACT&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3" name="a4d47defb9ba5833c0af11d0abaf928c2aa4793313983345419f07db43c3b64bc3"></a>SPI_STATE_DMA_TX&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4" name="a4d47defb9ba5833c0af11d0abaf928c2a5906806a2e477ec52dbf2a2412d856a4"></a>SPI_STATE_DMA_RX&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17" name="a4d47defb9ba5833c0af11d0abaf928c2ae0c37c0a7a98f8b701564096eb202b17"></a>SPI_STATE_IRQ_TX&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d" name="a4d47defb9ba5833c0af11d0abaf928c2ac0a9e0bbabc076a6e306f2be8110b38d"></a>SPI_STATE_IRQ_RX&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2ad73d6e03e9c7501ab1970944700757fe" name="a4d47defb9ba5833c0af11d0abaf928c2ad73d6e03e9c7501ab1970944700757fe"></a>SPI_STATE_IS_SLAVE&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2aef19188483bc3cef0dd026926afe2864" name="a4d47defb9ba5833c0af11d0abaf928c2aef19188483bc3cef0dd026926afe2864"></a>SPI_STATE_CS_ACTIVEED&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a6fdd3c8af7c56233ee52eb6504128284" name="a4d47defb9ba5833c0af11d0abaf928c2a6fdd3c8af7c56233ee52eb6504128284"></a>SPI_STATE_IS_UNS_EN&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a52a6ca5c5b2eebd9437577dab940fa10" name="a4d47defb9ba5833c0af11d0abaf928c2a52a6ca5c5b2eebd9437577dab940fa10"></a>SPI_STATE_IS_RO_END&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a76c1b18d72df762e65e3e2bb94903812" name="a4d47defb9ba5833c0af11d0abaf928c2a76c1b18d72df762e65e3e2bb94903812"></a>SPI_STATE_DMA_TX_RD&#160;</td><td class="fielddoc"></td></tr>
<tr><td class="fieldname"><a id="a4d47defb9ba5833c0af11d0abaf928c2a81d595a6751561c4ad7ea27efddd8425" name="a4d47defb9ba5833c0af11d0abaf928c2a81d595a6751561c4ad7ea27efddd8425"></a>SPI_STATE_DMA_RX_RD&#160;</td><td class="fielddoc"></td></tr>
</table>
</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a id="afdf21b72da31582b5bcadfa581e58403" name="afdf21b72da31582b5bcadfa581e58403"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afdf21b72da31582b5bcadfa581e58403">&#9670;&nbsp;</a></span>sdrv_spi_async_transmit()</h2>
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<td class="memname">int sdrv_spi_async_transmit </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>spi</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">void *&#160;</td>
<td class="paramname"><em>tx_buf</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">void *&#160;</td>
<td class="paramname"><em>rx_buf</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>bytes</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">enum <a class="el" href="sdrv__spi_8h.html#abd4f021695236b6c75b26f924a405871">spi_ops_type</a>&#160;</td>
<td class="paramname"><em>type</em>&#160;</td>
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<tr>
<td></td>
<td>)</td>
<td></td><td></td>
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</table>
</div><div class="memdoc">
<p>SPI async transmit in IRQ or DMA mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">spi</td><td>SPI bus </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">tx_buf</td><td>Pointer to data to transmit, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception. </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">rx_buf</td><td>Pointer to receive data storage, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">bytes</td><td>The amount of data in bytes. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">type</td><td>OP_MODE_IRQ for IRQ Mode. OP_MODE_DMA for DMA Mode. </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0 is ok, and other values for error. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a5aecb616522472bf8460d4d3a0ebccb2">&#9670;&nbsp;</a></span>sdrv_spi_attach_async_callback()</h2>
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<td class="memname">void sdrv_spi_attach_async_callback </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>spi</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"><a class="el" href="sdrv__spi_8h.html#afe67f453cd960a973f1fd40630a9367f">spi_callback_t</a>&#160;</td>
<td class="paramname"><em>cb</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Setup the async callback handler. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">spi</td><td>SPI bus </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">cb</td><td>The async callback handler. </td></tr>
</table>
</dd>
</dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a802d973e6c496a7f86cbcebeeaa89e59">&#9670;&nbsp;</a></span>sdrv_spi_config_device()</h2>
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<td class="memname">int sdrv_spi_config_device </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>spi</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">const struct <a class="el" href="structspi__device__config.html">spi_device_config</a> *&#160;</td>
<td class="paramname"><em>cfg</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<p>SPI device configuration. </p>
<p >This function select and activate an external device. Data transfers are performed according to this device configuration.</p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">spi</td><td>SPI bus </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">cfg</td><td>SPI device configuration.</td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>SPI device configuration memory must not be recycled during transfer. </dd></dl>
<dl class="section return"><dt>Returns</dt><dd>0 is ok, and other values mean bus is busy. </dd></dl>
</div>
</div>
<a id="abc65dae99842f3d08074995c06ca98de" name="abc65dae99842f3d08074995c06ca98de"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abc65dae99842f3d08074995c06ca98de">&#9670;&nbsp;</a></span>sdrv_spi_deinit()</h2>
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<td class="memname">int sdrv_spi_deinit </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>bus</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Deinitialize the SPI device. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">bus</td><td>SPI bus</td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0 is ok, otherwise bus error occurred. </dd></dl>
</div>
</div>
<a id="ac902a346291157329878ead1a7a2cd81" name="ac902a346291157329878ead1a7a2cd81"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac902a346291157329878ead1a7a2cd81">&#9670;&nbsp;</a></span>sdrv_spi_get_status()</h2>
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<td class="memname">enum <a class="el" href="sdrv__spi_8h.html#adf7c33c6af2ba76c98bd4e6273a54b4a">spi_bus_state</a> sdrv_spi_get_status </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>spi</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Get SPI bus state. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">spi</td><td>SPI bus </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>SPI_BUSY: spi bus is busy. SPI_IDLE: spi bus is idle. </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#afa70f0e34044c249166c92f65c971fce">&#9670;&nbsp;</a></span>sdrv_spi_init()</h2>
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<td class="memname">int sdrv_spi_init </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>spi</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">struct <a class="el" href="structspi__common__config.html">spi_common_config</a> *&#160;</td>
<td class="paramname"><em>cfg</em>&#160;</td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Initialize the SPI module. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">spi</td><td>SPI bus </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">cfg</td><td>SPI device configuration.</td></tr>
</table>
</dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>SPI device configuration memory must not be recycled during transfer. </dd></dl>
<dl class="section return"><dt>Returns</dt><dd>0 is ok, otherwise bus error occurred. </dd></dl>
</div>
</div>
<a id="a4b800d23a5875a60060e447bb729472a" name="a4b800d23a5875a60060e447bb729472a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4b800d23a5875a60060e447bb729472a">&#9670;&nbsp;</a></span>sdrv_spi_polling()</h2>
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<td class="memname">void sdrv_spi_polling </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>bus</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Get SPI bus polling. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">spi</td><td>SPI bus </td></tr>
</table>
</dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>
</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a3b97c5b629eead84d1e3ba7a1647290d">&#9670;&nbsp;</a></span>sdrv_spi_slave_get_transmit_len()</h2>
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<td class="memname">uint32_t sdrv_spi_slave_get_transmit_len </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>bus</em></td><td>)</td>
<td></td>
</tr>
</table>
</div><div class="memdoc">
<p>Get slave transmit cnt. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">spi</td><td>SPI bus </td></tr>
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<dl class="section return"><dt>Returns</dt><dd>uint32: transmited bytes. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#adda87204e6df34bf9dcd7f50952c6454">&#9670;&nbsp;</a></span>sdrv_spi_sync_transmit()</h2>
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<td class="memname">int sdrv_spi_sync_transmit </td>
<td>(</td>
<td class="paramtype">struct <a class="el" href="structsdrv__spi.html">sdrv_spi</a> *&#160;</td>
<td class="paramname"><em>spi</em>, </td>
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<td class="paramtype">void *&#160;</td>
<td class="paramname"><em>tx_buf</em>, </td>
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<td class="paramtype">void *&#160;</td>
<td class="paramname"><em>rx_buf</em>, </td>
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<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>bytes</em>, </td>
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<td class="paramtype">uint32_t&#160;</td>
<td class="paramname"><em>timeout</em>&#160;</td>
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<p>SPI sync transmit. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramdir">[in]</td><td class="paramname">spi</td><td>SPI bus. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">tx_buf</td><td>Pointer to data to transmit, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception. </td></tr>
<tr><td class="paramdir">[out]</td><td class="paramname">rx_buf</td><td>Pointer to receive data storage, which must be aligned with the corresponding data width, otherwise unaligned access will occur and cause an exception. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">bytes</td><td>The amount of data in bytes. </td></tr>
<tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td>Timeout time &gt;= total transmitted bytes / data-width*2. </td></tr>
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<dl class="section return"><dt>Returns</dt><dd>0 is ok, and other values for error. </dd></dl>
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