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E3/e3_176_ref/drivers/include/sdrv_adc_dev_data.h
2025-10-21 19:40:27 +08:00

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1.2 KiB
C

/**
* @file sdrv_adc_dev_data.h
* @brief SemiDrive ADC device data description file.
*
* @copyright Copyright (c) 2021 Semidrive Semiconductor.
* All rights reserved.
*/
#ifndef SDRV_ADC_DEV_DATA_H
#define SDRV_ADC_DEV_DATA_H
#include <sdrv_ckgen.h>
#define E3_ADC1_DFLT_OFFSET 7
#define E3_ADC2_DFLT_OFFSET 1
#define E3_ADC3_DFLT_OFFSET 4
#define E3L_ADC1_DFLT_OFFSET 5
#define E3L_ADC2_DFLT_OFFSET 6
#define E3L_ADC3_DFLT_OFFSET 4
#if CONFIG_E3 || CONFIG_D3
#define HOST_ADC1_DFLT_OFFSET E3_ADC1_DFLT_OFFSET
#define HOST_ADC2_DFLT_OFFSET E3_ADC2_DFLT_OFFSET
#define HOST_ADC3_DFLT_OFFSET E3_ADC3_DFLT_OFFSET
#elif CONFIG_E3L
#define HOST_ADC1_DFLT_OFFSET E3L_ADC1_DFLT_OFFSET
#define HOST_ADC2_DFLT_OFFSET E3L_ADC2_DFLT_OFFSET
#define HOST_ADC3_DFLT_OFFSET E3L_ADC3_DFLT_OFFSET
#endif
typedef struct sdrv_adc_dev_data {
uintptr_t adc_base; /**< ADC base address */
sdrv_ckgen_node_t *adc_ckgen; /**< pointer to the corresponding ckgen of adc_base */
int8_t dc_offset; /**< Data calibration offset */
} sdrv_adc_dev_data_t;
#endif /* SDRV_ADC_DEV_DATA_H */