107 lines
4.8 KiB
C
107 lines
4.8 KiB
C
/**
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* @file sdrv_rtc_reg.h
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* @brief sdrv rtc_reg api header.
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*
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* @copyright Copyright (c) 2022 Semidrive Semiconductor.
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* All rights reserved.
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*/
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#ifndef _SDRV_RTC_REG_H_
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#define _SDRV_RTC_REG_H_
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#include <stdint.h>
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#ifdef __cplusplus
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#define __I volatile /**< Defines 'read-only' permissions */
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#else
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#define __I volatile const /**< Defines 'read-only' permissions */
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#endif
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#define __O volatile /**< Defines 'write-only' permissions */
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#define __IO volatile /**< Defines 'read/write' permissions */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef struct {
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__IO uint32_t SEC_RTC_CTRL; /*offset 0*/
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__IO uint32_t RTC_H; /*offset 4*/
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__IO uint32_t RTC_L; /*offset 8*/
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__IO uint32_t AUTO_ADJUST; /*offset c*/
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__IO uint32_t TIMER_H; /*offset 10*/
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__IO uint32_t TIMER_L; /*offset 14*/
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__IO uint32_t WAKEUP_CTRL; /*offset 18*/
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__IO uint32_t PERIODICAL_CTRL; /*offset 1c*/
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__IO uint32_t VIOLATION_INT; /*offset 20*/
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__IO uint32_t APB_MONITOR_ERR_INJ_EN; /*offset 24*/
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__IO uint32_t APB_MONITOR_ERR_INJ_ECC; /*offset 28*/
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__IO uint32_t APB_MONITOR_ERR_INJ_WDATA; /*offset 2C*/
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__IO uint32_t SAFETY_ERR_IRQ_STAT; /*offset 0x30*/
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__IO uint32_t SAFETY_ERR_IRQ_STAT_EN; /*offset 0x34*/
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__IO uint32_t SAFETY_ERR_IRQ_SIG_EN; /*offset 0x38*/
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__IO uint32_t IRQ_ERR_INJ; /*offset 0x3C*/
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__IO uint32_t IRQ_ERR_EJ_EN; /*offset 0x40*/
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__IO uint32_t GP0; /*offset 0x44*/
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__IO uint32_t GP1; /*offset 0X48*/
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__IO uint32_t GP2; /*offset 0x4c*/
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__IO uint32_t GP3; /*offset 0x50*/
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__IO uint32_t RTC_H_HOLD_SHADOW; /*offset 0x54*/
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__IO uint32_t RTC_L_HOLD_SHADOW; /*offset 0x58*/
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__IO uint32_t RTC_WORKING_MODE; /*offset 0x5c*/
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__IO uint32_t RTC_REGISTER_CROSS_CLOCK; /*offset 60*/
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__IO uint32_t RTC_PARITY_ERR_INT_STAT; /*offset 0x64*/
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__IO uint32_t RTC_PARITY_ERR_INT_STAT_EN; /*offset 0x68*/
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__IO uint32_t RTC_PARITY_ERR_INT_SIG_EN; /*offset 0x6c*/
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__IO uint32_t PRDATAINJ; /*offset 0x70*/
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__IO uint32_t RTC_OUT_ERR_INJ; /*offset 0x74*/
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} Rtc;
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#endif
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#define BM_SEC_RTC_CTRL_LOCK (0x01U << 31U)
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#define BM_SEC_RTC_CTRL_RTC_LOCAL_ENABLE (0x01U << 0U)
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#define BM_WAKEUP_CTRL_STATUS (0x01U << 3U)
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#define BM_WAKEUP_CTRL_ENABLE (0x01U << 0U)
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#define BM_WAKEUP_CTRL_IRQ_ENABLE (0x01U << 1U)
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#define BM_WAKEUP_CTRL_REQ_ENABLE (0x01U << 2U)
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#define BM_WAKEUP_CTRL_CLEAR (0x01U << 4U)
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#define BM_SEC_RTC_CTRL_SECURE_ENABLE (0x01U << 1U)
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#define BM_SEC_RTC_CTRL_PRIVILEGE_ENABLE (0x01U << 2U)
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#define BM_RTC_REGISTER_CROSS_CLOCK_REGISTER_CROSS_CLOCK_EN (0x01U << 0U)
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#define BM_WAKEUP_CTRL_OVERFLOW_CLEAR_BIT (5U)
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#define BM_WAKEUP_CTRL_DISABLE_CLEAR_BIT (6U)
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#define BM_RTC_WORKING_MODE_RTC_MASTER_SLAVE (0x01U << 0U)
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#define BM_RTC_WORKING_MODE_RTC_COUNT_MODE (0x01U << 1U)
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#define BM_VIOLATION_INT_OVERFLOW_STATS (0x01U << 2U)
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#define BM_VIOLATION_INT_OVERFLOW_STATS_BIT (2U)
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#define BM_PERIODICAL_CRTL_IRQ_ENABLE (0x01U << 0U)
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#define BM_VIOLATION_INT_DISABLE_STATUS (0x01U << 3U)
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#define FM_VIOLATION_INT_MASK (0x3U << 0U)
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#define FV_VIOLATION_INT_MASK(v) \
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(((v) << 0U) & FM_VIOLATION_INT_MASK)
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#define FM_PERIODICAL_CRTL_FREQ (0xfU << 3U)
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#define FV_PERIODICAL_CRTL_FREQ(v) \
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(((v) << 3U) & FM_PERIODICAL_CRTL_FREQ)
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#define FM_PERIODICAL_CRTL_FREQ (0xfU << 3U)
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#define GFV_PERIODICAL_CRTL_FREQ(v) \
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(((v) & FM_PERIODICAL_CRTL_FREQ) >> 3U)
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void sec_rtc_set_cross_clk_en(Rtc *rtc);
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void sec_rtc_set_rtc_ctrl(Rtc *rtc, uint32_t ctrl);
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void sec_rtc_wakeup_enable(Rtc *rtc, uint8_t vtype, uint8_t en);
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void sec_rtc_clear_wakeup_status(Rtc *rtc);
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void sec_rtc_clear_violation_status(Rtc *rtc, uint8_t vio);
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void sec_rtc_set_violation_enable(Rtc *rtc, uint8_t mask);
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void sec_rtc_set_violation_disable(Rtc *rtc, uint8_t mask);
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uint64_t sec_rtc_get_tick(Rtc *rtc);
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uint8_t sec_rtc_get_violation_status(Rtc *rtc);
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void sec_rtc_enable_periodical(Rtc *rtc, uint8_t en);
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int sec_rtc_local_enable(Rtc *rtc, bool en);
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void sec_rtc_set_tick(Rtc *rtc, uint64_t v);
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uint64_t sec_rtc_get_alarm_tick(Rtc *rtc);
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uint8_t sec_rtc_is_alarm_enable(Rtc *rtc);
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bool sec_rtc_get_wakeup_status(Rtc *rtc);
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void sec_rtc_set_alarm_tick(Rtc *rtc, uint64_t val);
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uint64_t sec_rtc_get_hld_tick(Rtc *rtc, uint64_t *tick);
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uint32_t sec_rtc_read_general_purpose_reg(Rtc *rtc, uint8_t gp_num);
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void sec_rtc_write_general_purpose_reg(Rtc *rtc, uint8_t gp_num, uint32_t value);
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void sec_rtc_lock(Rtc *rtc);
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#endif /*_SDRV_RTC_REG_H_*/
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