597 lines
29 KiB
C
597 lines
29 KiB
C
/*
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*********************************************************************************************************
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* uC/CPU
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* CPU CONFIGURATION & PORT LAYER
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*
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* Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
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*
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* SPDX-License-Identifier: APACHE-2.0
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*
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* This software is subject to an open source license and is distributed by
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* Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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*
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* NOTICE
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*
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* Semidrive modified this file to adapt it for ssdk platform.
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* The modifications are only intended for use with Semidrive chips.
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* Copyright of all the modifications belongs to Semidrive Semiconductor.
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*
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* CPU PORT FILE
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*
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* ARMv7-R
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* GNU C Compiler
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*
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* Filename : cpu.h
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* Version : V1.32.01
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* MODULE
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*********************************************************************************************************
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*/
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#ifndef CPU_MODULE_PRESENT
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#define CPU_MODULE_PRESENT
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/*
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*********************************************************************************************************
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* CPU INCLUDE FILES
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*
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* Note(s) : (1) The following CPU files are located in the following directories :
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*
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* (a) \<Your Product Application>\cpu_cfg.h
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*
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* (b) \<CPU-Compiler Directory>\cpu_def.h
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*
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* (c) \<CPU-Compiler Directory>\<cpu>\<compiler>\cpu*.*
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*
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* where
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* <Your Product Application> directory path for Your Product's Application
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* <CPU-Compiler Directory> directory path for common CPU-compiler software
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* <cpu> directory name for specific CPU
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* <compiler> directory name for specific compiler
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*
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* (2) Compiler MUST be configured to include the '\<CPU-Compiler Directory>\' directory the
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* specific CPU-compiler directory, & '\<Your Product Application>\' as additional include
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* path directories.
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*
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* (3) Since NO custom library modules are included, 'cpu.h' may ONLY use configurations from
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* CPU configuration file 'cpu_cfg.h' that do NOT reference any custom library definitions.
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*
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* In other words, 'cpu.h' may use 'cpu_cfg.h' configurations that are #define'd to numeric
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* constants or to NULL (i.e. NULL-valued #define's); but may NOT use configurations to
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* custom library #define's (e.g. DEF_DISABLED or DEF_ENABLED).
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*********************************************************************************************************
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*/
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#include <param.h>
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#include <cpu_def.h>
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#include <cpu_cfg.h> /* See Note #3. */
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#include <armv7-r/barriers.h>
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#include <armv7-r/cache.h>
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#include <irq.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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*********************************************************************************************************
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* CONFIGURE STANDARD DATA TYPES
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*
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* Note(s) : (1) Configure standard data types according to CPU-/compiler-specifications.
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*
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* (2) (a) (1) 'CPU_FNCT_VOID' data type defined to replace the commonly-used function pointer
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* data type of a pointer to a function which returns void & has no arguments.
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*
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* (2) Example function pointer usage :
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*
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* CPU_FNCT_VOID FnctName;
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*
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* FnctName();
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*
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* (b) (1) 'CPU_FNCT_PTR' data type defined to replace the commonly-used function pointer
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* data type of a pointer to a function which returns void & has a single void
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* pointer argument.
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*
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* (2) Example function pointer usage :
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*
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* CPU_FNCT_PTR FnctName;
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* void *p_obj
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*
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* FnctName(p_obj);
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*********************************************************************************************************
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*/
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typedef void CPU_VOID;
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typedef char CPU_CHAR; /* 8-bit character */
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typedef unsigned char CPU_BOOLEAN; /* 8-bit boolean or logical */
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typedef unsigned char CPU_INT08U; /* 8-bit unsigned integer */
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typedef signed char CPU_INT08S; /* 8-bit signed integer */
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typedef unsigned short CPU_INT16U; /* 16-bit unsigned integer */
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typedef signed short CPU_INT16S; /* 16-bit signed integer */
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typedef unsigned int CPU_INT32U; /* 32-bit unsigned integer */
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typedef signed int CPU_INT32S; /* 32-bit signed integer */
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typedef unsigned long long CPU_INT64U; /* 64-bit unsigned integer */
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typedef signed long long CPU_INT64S; /* 64-bit signed integer */
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typedef float CPU_FP32; /* 32-bit floating point */
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typedef double CPU_FP64; /* 64-bit floating point */
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typedef volatile CPU_INT08U CPU_REG08; /* 8-bit register */
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typedef volatile CPU_INT16U CPU_REG16; /* 16-bit register */
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typedef volatile CPU_INT32U CPU_REG32; /* 32-bit register */
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typedef volatile CPU_INT64U CPU_REG64; /* 64-bit register */
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typedef void (*CPU_FNCT_VOID)(void); /* See Note #2a. */
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typedef void (*CPU_FNCT_PTR )(void *p_obj); /* See Note #2b. */
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/*
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*********************************************************************************************************
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* CPU WORD CONFIGURATION
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*
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* Note(s) : (1) Configure CPU_CFG_ADDR_SIZE & CPU_CFG_DATA_SIZE with CPU's word sizes :
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*
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* CPU_WORD_SIZE_08 8-bit word size
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* CPU_WORD_SIZE_16 16-bit word size
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* CPU_WORD_SIZE_32 32-bit word size
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* CPU_WORD_SIZE_64 64-bit word size See Note #1a
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*
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* (a) 64-bit word size NOT currently supported.
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*
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* (2) Configure CPU_CFG_ENDIAN_TYPE with CPU's data-word-memory order :
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*
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* (a) CPU_ENDIAN_TYPE_BIG Big- endian word order (CPU words' most significant
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* octet @ lowest memory address)
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* (b) CPU_ENDIAN_TYPE_LITTLE Little-endian word order (CPU words' least significant
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* octet @ lowest memory address)
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*********************************************************************************************************
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*/
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/* Define CPU word sizes (see Note #1) : */
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#define CPU_CFG_ADDR_SIZE CPU_WORD_SIZE_32 /* Defines CPU address word size (in octets). */
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#define CPU_CFG_DATA_SIZE CPU_WORD_SIZE_32 /* Defines CPU data word size (in octets). */
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#define CPU_CFG_DATA_SIZE_MAX CPU_WORD_SIZE_64 /* Defines CPU maximum word size (in octets). */
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/* Defines CPU data word-memory order (see Note #2). */
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#define CPU_CFG_ENDIAN_TYPE CPU_ENDIAN_TYPE_LITTLE
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/*
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*********************************************************************************************************
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* CONFIGURE CPU ADDRESS & DATA TYPES
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*********************************************************************************************************
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*/
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/* CPU address type based on address bus size. */
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#if (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_32)
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typedef CPU_INT32U CPU_ADDR;
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#elif (CPU_CFG_ADDR_SIZE == CPU_WORD_SIZE_16)
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typedef CPU_INT16U CPU_ADDR;
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#else
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typedef CPU_INT08U CPU_ADDR;
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#endif
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/* CPU data type based on data bus size. */
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#if (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_32)
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typedef CPU_INT32U CPU_DATA;
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#elif (CPU_CFG_DATA_SIZE == CPU_WORD_SIZE_16)
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typedef CPU_INT16U CPU_DATA;
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#else
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typedef CPU_INT08U CPU_DATA;
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#endif
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typedef CPU_DATA CPU_ALIGN; /* Defines CPU data-word-alignment size. */
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typedef CPU_ADDR CPU_SIZE_T; /* Defines CPU standard 'size_t' size. */
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/*
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*********************************************************************************************************
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* CPU STACK CONFIGURATION
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*
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* Note(s) : (1) Configure CPU_CFG_STK_GROWTH in 'cpu.h' with CPU's stack growth order :
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*
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* (a) CPU_STK_GROWTH_LO_TO_HI CPU stack pointer increments to the next higher stack
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* memory address after data is pushed onto the stack
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* (b) CPU_STK_GROWTH_HI_TO_LO CPU stack pointer decrements to the next lower stack
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* memory address after data is pushed onto the stack
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*
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* (2) Configure CPU_CFG_STK_ALIGN_BYTES with the highest minimum alignement required for
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* cpu stacks.
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*
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* (a) ARM Procedure Calls Standard requires an 8 bytes stack alignment.
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*********************************************************************************************************
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*/
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#define CPU_CFG_STK_GROWTH CPU_STK_GROWTH_HI_TO_LO /* Defines CPU stack growth order (see Note #1). */
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#define CPU_CFG_STK_ALIGN_BYTES (8u) /* Defines CPU stack alignment in bytes. (see Note #2). */
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typedef CPU_INT32U CPU_STK; /* Defines CPU stack data type. */
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typedef CPU_ADDR CPU_STK_SIZE; /* Defines CPU stack size data type. */
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/*
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*********************************************************************************************************
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* CRITICAL SECTION CONFIGURATION
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*
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* Note(s) : (1) Configure CPU_CFG_CRITICAL_METHOD with CPU's/compiler's critical section method :
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*
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* Enter/Exit critical sections by ...
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*
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* CPU_CRITICAL_METHOD_INT_DIS_EN Disable/Enable interrupts
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* CPU_CRITICAL_METHOD_STATUS_STK Push/Pop interrupt status onto stack
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* CPU_CRITICAL_METHOD_STATUS_LOCAL Save/Restore interrupt status to local variable
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*
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* (a) CPU_CRITICAL_METHOD_INT_DIS_EN is NOT a preferred method since it does NOT support
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* multiple levels of interrupts. However, with some CPUs/compilers, this is the only
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* available method.
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*
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* (b) CPU_CRITICAL_METHOD_STATUS_STK is one preferred method since it supports multiple
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* levels of interrupts. However, this method assumes that the compiler provides C-level
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* &/or assembly-level functionality for the following :
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*
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* ENTER CRITICAL SECTION :
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* (1) Push/save interrupt status onto a local stack
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* (2) Disable interrupts
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*
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* EXIT CRITICAL SECTION :
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* (3) Pop/restore interrupt status from a local stack
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*
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* (c) CPU_CRITICAL_METHOD_STATUS_LOCAL is one preferred method since it supports multiple
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* levels of interrupts. However, this method assumes that the compiler provides C-level
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* &/or assembly-level functionality for the following :
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*
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* ENTER CRITICAL SECTION :
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* (1) Save interrupt status into a local variable
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* (2) Disable interrupts
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*
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* EXIT CRITICAL SECTION :
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* (3) Restore interrupt status from a local variable
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*
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* (2) Critical section macro's most likely require inline assembly. If the compiler does NOT
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* allow inline assembly in C source files, critical section macro's MUST call an assembly
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* subroutine defined in a 'cpu_a.asm' file located in the following software directory :
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*
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* \<CPU-Compiler Directory>\<cpu>\<compiler>\
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*
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* where
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* <CPU-Compiler Directory> directory path for common CPU-compiler software
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* <cpu> directory name for specific CPU
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* <compiler> directory name for specific compiler
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*
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* (3) (a) To save/restore interrupt status, a local variable 'cpu_sr' of type 'CPU_SR' MAY need
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* to be declared (e.g. if 'CPU_CRITICAL_METHOD_STATUS_LOCAL' method is configured).
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*
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* (1) 'cpu_sr' local variable SHOULD be declared via the CPU_SR_ALLOC() macro which, if
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* used, MUST be declared following ALL other local variables.
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*
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* Example :
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*
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* void Fnct (void)
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* {
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* CPU_INT08U val_08;
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* CPU_INT16U val_16;
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* CPU_INT32U val_32;
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* CPU_SR_ALLOC(); MUST be declared after ALL other local variables
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* :
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* :
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* }
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*
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* (b) Configure 'CPU_SR' data type with the appropriate-sized CPU data type large enough to
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* completely store the CPU's/compiler's status word.
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*********************************************************************************************************
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*/
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/* Configure CPU critical method (see Note #1) : */
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#define CPU_CFG_CRITICAL_METHOD CPU_CRITICAL_METHOD_STATUS_LOCAL
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typedef irq_state_t CPU_SR; /* Defines CPU status register size (see Note #3b). */
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/* Allocates CPU status register word (see Note #3a). */
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#if (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL)
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#define CPU_SR_ALLOC() CPU_SR cpu_sr = (CPU_SR)0
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#else
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#define CPU_SR_ALLOC()
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#endif
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#define CPU_INT_DIS() do { cpu_sr = arch_irq_save(); DSB; } while (0)
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#define CPU_INT_EN() do { DSB; arch_irq_restore(cpu_sr); } while (0)
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#ifdef CPU_CFG_INT_DIS_MEAS_EN
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/* Disable interrupts, ... */
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/* & start interrupts disabled time measurement.*/
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#define CPU_CRITICAL_ENTER() do { CPU_INT_DIS(); \
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CPU_IntDisMeasStart(); } while (0)
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/* Stop & measure interrupts disabled time, */
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/* ... & re-enable interrupts. */
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#define CPU_CRITICAL_EXIT() do { CPU_IntDisMeasStop(); \
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CPU_INT_EN(); } while (0)
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#else
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#define CPU_CRITICAL_ENTER() do { CPU_INT_DIS(); } while (0) /* Disable interrupts. */
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#define CPU_CRITICAL_EXIT() do { CPU_INT_EN(); } while (0) /* Re-enable interrupts. */
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#endif
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/*
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*********************************************************************************************************
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* MEMORY BARRIERS CONFIGURATION
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*
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* Note(s) : (1) (a) Configure memory barriers if required by the architecture.
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*
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* CPU_MB Full memory barrier.
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* CPU_RMB Read (Loads) memory barrier.
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* CPU_WMB Write (Stores) memory barrier.
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*
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*********************************************************************************************************
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*/
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#define CPU_MB() DSB
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#define CPU_RMB() DSB
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#define CPU_WMB() DSB
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/*
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*********************************************************************************************************
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* CACHE DEFINES
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*********************************************************************************************************
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*/
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#if CONFIG_ARCH_WITH_CACHE
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#define LEN_CACHE_ALIGN(len) ROUNDUP(len, CONFIG_ARCH_CACHE_LINE)
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#else
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#define LEN_CACHE_ALIGN(len) (len)
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#endif
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/*
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* The ALLOC_CACHE_ALIGN_BUFFER macro is used to allocate a buffer on the
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* stack that meets the minimum architecture alignment requirements for DMA.
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* Such a buffer is useful for DMA operations where flushing and invalidating
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* the cache before and after a read and/or write operation is required for
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* correct operations.
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*
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* When called the macro creates an array on the stack that is sized such
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* that:
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*
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* 1) The beginning of the array can be advanced enough to be aligned.
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*
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* 2) The size of the aligned portion of the array is a multiple of the minimum
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* architecture alignment required for DMA.
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*
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* 3) The aligned portion contains enough space for the original number of
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* elements requested.
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*
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* The macro then creates a pointer to the aligned portion of this array and
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* assigns to the pointer the address of the first element in the aligned
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* portion of the array.
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*
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* Calling the macro as:
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*
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* ALLOC_CACHE_ALIGN_BUFFER(uint32_t, buffer, 1024);
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*
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* Will result in something similar to saying:
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*
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* uint32_t buffer[1024];
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*
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* The following differences exist:
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*
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* 1) The resulting buffer is guaranteed to be aligned to the value of
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* CONFIG_ARCH_CACHE_LINE.
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*
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* 2) The buffer variable created by the macro is a pointer to the specified
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* type, and NOT an array of the specified type. This can be very important
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* if you want the address of the buffer, which you probably do, to pass it
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* to the DMA hardware. The value of &buffer is different in the two cases.
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* In the macro case it will be the address of the pointer, not the address
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* of the space reserved for the buffer. However, in the second case it
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* would be the address of the buffer. So if you are replacing hard coded
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* stack buffers with this macro you need to make sure you remove the & from
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* the locations where you are taking the address of the buffer.
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*
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* Note that the size parameter is the number of array elements to allocate,
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* not the number of bytes.
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*
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* This macro can not be used outside of function scope, or for the creation
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* of a function scoped static buffer. It can not be used to create a cache
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* line aligned global buffer.
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*/
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#if CONFIG_ARCH_WITH_CACHE
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#define ALLOC_ALIGN_BUFFER(type, name, size, align) \
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char __##name[ROUNDUP((size) * sizeof(type), align) \
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+ (align - 1)]; \
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\
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type *name = (type *)ALIGN((uintptr_t)__##name, align)
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#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \
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ALLOC_ALIGN_BUFFER(type, name, size, CONFIG_ARCH_CACHE_LINE)
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#else
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#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \
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type __##name[size]; \
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\
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type *name = __##name
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#endif
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/*
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*********************************************************************************************************
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* CPU COUNT ZEROS CONFIGURATION
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*
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* Note(s) : (1) (a) Configure CPU_CFG_LEAD_ZEROS_ASM_PRESENT to define count leading zeros bits
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* function(s) in :
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*
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* (1) 'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable assembly-optimized function(s)
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*
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* (2) 'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
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*
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* (b) Configure CPU_CFG_TRAIL_ZEROS_ASM_PRESENT to define count trailing zeros bits
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* function(s) in :
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*
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* (1) 'cpu_a.asm', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable assembly-optimized function(s)
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*
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* (2) 'cpu_core.c', if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable C-source-optimized function(s) otherwise
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*********************************************************************************************************
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*/
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/* Configure CPU count leading zeros bits ... */
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#define CPU_CFG_LEAD_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1a). */
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/* Configure CPU count trailing zeros bits ... */
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#define CPU_CFG_TRAIL_ZEROS_ASM_PRESENT /* ... assembly-version (see Note #1b). */
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/*
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*********************************************************************************************************
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* FUNCTION PROTOTYPES
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*
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* Note(s) : (1) CPU_CntLeadZeros() prototyped/defined respectively in :
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*
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* (a) 'cpu.h'/'cpu_a.asm', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable assembly-version function
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*
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* (b) 'cpu_core.h'/'cpu_core.c', if CPU_CFG_LEAD_ZEROS_ASM_PRESENT NOT #define'd in 'cpu.h'/
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* 'cpu_cfg.h' to enable C-source-version function otherwise
|
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*
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* See also 'cpu_core.h FUNCTION PROTOTYPES Note #2'.
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*
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* (2) CPU_PMU_xxx() functions are intended to manage the Event & Performanace Monitor unit (PMU).
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*********************************************************************************************************
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*/
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|
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void CPU_IntDis (void);
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void CPU_IntEn (void);
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|
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CPU_SR CPU_SR_Save (void);
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|
void CPU_SR_Restore (CPU_SR cpu_sr);
|
|
|
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void CPU_WaitForInt (void);
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|
void CPU_WaitForEvent (void);
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|
|
|
|
|
/*
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|
*********************************************************************************************************
|
|
* CONFIGURATION ERRORS
|
|
*********************************************************************************************************
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|
*/
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|
|
|
#ifndef CPU_CFG_ADDR_SIZE
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|
#error "CPU_CFG_ADDR_SIZE not #define'd in 'cpu.h' "
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|
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
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|
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
|
|
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
|
|
|
|
#elif ((CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_08) && \
|
|
(CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_16) && \
|
|
(CPU_CFG_ADDR_SIZE != CPU_WORD_SIZE_32))
|
|
#error "CPU_CFG_ADDR_SIZE illegally #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
|
|
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
|
|
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
|
|
#endif
|
|
|
|
|
|
#ifndef CPU_CFG_DATA_SIZE
|
|
#error "CPU_CFG_DATA_SIZE not #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
|
|
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
|
|
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
|
|
|
|
#elif ((CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_08) && \
|
|
(CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_16) && \
|
|
(CPU_CFG_DATA_SIZE != CPU_WORD_SIZE_32))
|
|
#error "CPU_CFG_DATA_SIZE illegally #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_WORD_SIZE_08 8-bit alignment]"
|
|
#error " [ || CPU_WORD_SIZE_16 16-bit alignment]"
|
|
#error " [ || CPU_WORD_SIZE_32 32-bit alignment]"
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifndef CPU_CFG_ENDIAN_TYPE
|
|
#error "CPU_CFG_ENDIAN_TYPE not #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_ENDIAN_TYPE_BIG ]"
|
|
#error " [ || CPU_ENDIAN_TYPE_LITTLE]"
|
|
|
|
#elif ((CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_BIG ) && \
|
|
(CPU_CFG_ENDIAN_TYPE != CPU_ENDIAN_TYPE_LITTLE))
|
|
#error "CPU_CFG_ENDIAN_TYPE illegally #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_ENDIAN_TYPE_BIG ]"
|
|
#error " [ || CPU_ENDIAN_TYPE_LITTLE]"
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifndef CPU_CFG_STK_GROWTH
|
|
#error "CPU_CFG_STK_GROWTH not #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_STK_GROWTH_LO_TO_HI]"
|
|
#error " [ || CPU_STK_GROWTH_HI_TO_LO]"
|
|
|
|
#elif ((CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_LO_TO_HI) && \
|
|
(CPU_CFG_STK_GROWTH != CPU_STK_GROWTH_HI_TO_LO))
|
|
#error "CPU_CFG_STK_GROWTH illegally #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_STK_GROWTH_LO_TO_HI]"
|
|
#error " [ || CPU_STK_GROWTH_HI_TO_LO]"
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifndef CPU_CFG_CRITICAL_METHOD
|
|
#error "CPU_CFG_CRITICAL_METHOD not #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_CRITICAL_METHOD_INT_DIS_EN ]"
|
|
#error " [ || CPU_CRITICAL_METHOD_STATUS_STK ]"
|
|
#error " [ || CPU_CRITICAL_METHOD_STATUS_LOCAL]"
|
|
|
|
#elif ((CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_INT_DIS_EN ) && \
|
|
(CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_STK ) && \
|
|
(CPU_CFG_CRITICAL_METHOD != CPU_CRITICAL_METHOD_STATUS_LOCAL))
|
|
#error "CPU_CFG_CRITICAL_METHOD illegally #define'd in 'cpu.h' "
|
|
#error " [MUST be CPU_CRITICAL_METHOD_INT_DIS_EN ]"
|
|
#error " [ || CPU_CRITICAL_METHOD_STATUS_STK ]"
|
|
#error " [ || CPU_CRITICAL_METHOD_STATUS_LOCAL]"
|
|
#endif
|
|
|
|
|
|
/*
|
|
*********************************************************************************************************
|
|
* MODULE END
|
|
*********************************************************************************************************
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* End of CPU module include. */
|