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543 lines
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<div id="projectname">SemiDrive SSDK Appication Program Interface<span id="projectnumber"> PTG3.0</span>
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="headertitle"><div class="title">sdrv_uart</div></div>
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</div><!--header-->
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<div class="contents">
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<p><code>#include <<a class="el" href="sdrv__uart_8h_source.html">sdrv_uart.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:a0523cedff47e2441fc198b7770ec5d3f"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a0523cedff47e2441fc198b7770ec5d3f">base</a></td></tr>
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<tr class="memitem:a17fdd15a71ced1e05faf127882011db3"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a17fdd15a71ced1e05faf127882011db3">irq</a></td></tr>
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<tr class="memitem:ac6e5ec63505c02923d71f7409cdbf1d1"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#ac6e5ec63505c02923d71f7409cdbf1d1">baud</a></td></tr>
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<tr class="memitem:a6e150bf7979f0599e001f893375eb671"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a6e150bf7979f0599e001f893375eb671">clk_freq</a></td></tr>
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<tr class="memitem:a2d11b6532146e50457e9ff65df035075"><td class="memItemLeft" align="right" valign="top">volatile <a class="el" href="sdrv__uart_8h.html#a0e261a269cb0547effd82334faed5f8f">sdrv_uart_transfer_type_e</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a2d11b6532146e50457e9ff65df035075">rxtransfer_type</a></td></tr>
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<tr class="memitem:a3437b64ff3ac2cf3f04ea9bef66b10a0"><td class="memItemLeft" align="right" valign="top">volatile <a class="el" href="sdrv__uart_8h.html#a0e261a269cb0547effd82334faed5f8f">sdrv_uart_transfer_type_e</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a3437b64ff3ac2cf3f04ea9bef66b10a0">txtransfer_type</a></td></tr>
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<tr class="memitem:a9bffc5d95c7a29de9fb93961d7a62d68"><td class="memItemLeft" align="right" valign="top">const uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a9bffc5d95c7a29de9fb93961d7a62d68">tx_ptr</a></td></tr>
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<tr class="memitem:abc4cf1c1331b99d224c88f8328836b32"><td class="memItemLeft" align="right" valign="top">volatile uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#abc4cf1c1331b99d224c88f8328836b32">tx_remain</a></td></tr>
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<tr class="memitem:a8bfcf1b72b1bf65c9221c6bed0158997"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__uart_8h.html#aed4c4a1cd76ce1250596d5eb970b46aa">uart_callback_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a8bfcf1b72b1bf65c9221c6bed0158997">tx_async_cb</a></td></tr>
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<tr class="memitem:a3570b8279a97a20629de4870f148aa13"><td class="memItemLeft" align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a3570b8279a97a20629de4870f148aa13">tx_userparam</a></td></tr>
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<tr class="memitem:a23310a7ef3c9c7c5a7dd6d696812681e"><td class="memItemLeft" align="right" valign="top">uint8_t * </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a23310a7ef3c9c7c5a7dd6d696812681e">rx_ptr</a></td></tr>
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<tr class="memitem:a2037cdd6510b5a02eab020c9d131a406"><td class="memItemLeft" align="right" valign="top">volatile uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a2037cdd6510b5a02eab020c9d131a406">rx_remain</a></td></tr>
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<tr class="memitem:a3460b4413e1f2ef9b195442fbac3331d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__uart_8h.html#aed4c4a1cd76ce1250596d5eb970b46aa">uart_callback_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a3460b4413e1f2ef9b195442fbac3331d">rx_async_cb</a></td></tr>
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<tr class="memitem:a01ac33b9eff75b3c52ee396bbb5a8158"><td class="memItemLeft" align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a01ac33b9eff75b3c52ee396bbb5a8158">rx_userparam</a></td></tr>
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<tr class="memitem:a91feb71e8190db9e1cdfb1e35a2cb01f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__uart_8h.html#aed4c4a1cd76ce1250596d5eb970b46aa">uart_callback_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a91feb71e8190db9e1cdfb1e35a2cb01f">callback</a></td></tr>
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<tr class="memitem:a2e294dd14122c554baa0665072b4ca7a"><td class="memItemLeft" align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a2e294dd14122c554baa0665072b4ca7a">userData</a></td></tr>
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<tr class="memitem:a293dc84572602c407a5acb897d3efa6d"><td class="memItemLeft" align="right" valign="top">volatile <a class="el" href="sdrv__uart_8h.html#af7c24e06dbaad38cb4773236eabb797a">sdrv_uart_transfer_status_e</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a293dc84572602c407a5acb897d3efa6d">tx_state</a></td></tr>
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<tr class="memitem:a4d46cf5156f755ac7fabe5b50c1623d4"><td class="memItemLeft" align="right" valign="top">volatile <a class="el" href="sdrv__uart_8h.html#af7c24e06dbaad38cb4773236eabb797a">sdrv_uart_transfer_status_e</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a4d46cf5156f755ac7fabe5b50c1623d4">rx_state</a></td></tr>
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<tr class="memitem:a15c94c6e01fb09646e4a3568ab6ed5d6"><td class="memItemLeft" align="right" valign="top">volatile uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a15c94c6e01fb09646e4a3568ab6ed5d6">abr_count</a></td></tr>
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<tr class="memitem:a26bff0d367c09f14d7a19fa432225f24"><td class="memItemLeft" align="right" valign="top">volatile <a class="el" href="sdrv__uart_8h.html#af7c24e06dbaad38cb4773236eabb797a">sdrv_uart_transfer_status_e</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a26bff0d367c09f14d7a19fa432225f24">abr_state</a></td></tr>
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<tr class="memitem:a6a80ec02129c3c79c78d643939b4ccfe"><td class="memItemLeft" align="right" valign="top"><a class="el" href="structsdrv__dma__channel__t.html">sdrv_dma_channel_t</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a6a80ec02129c3c79c78d643939b4ccfe">rx_dmachannel</a></td></tr>
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<tr class="memitem:a723933e56be40a1c1225645b41a9b74c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="structsdrv__dma__channel__t.html">sdrv_dma_channel_t</a> * </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#a723933e56be40a1c1225645b41a9b74c">tx_dmachannel</a></td></tr>
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<tr class="memitem:afc4b104a152cd6cb42c8ca3ec3c69690"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__uart_8h.html#a8d4d5ad3e43bdba34353fc71019da3d4">sdrv_rxidle_ctl_e</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__uart.html#afc4b104a152cd6cb42c8ca3ec3c69690">rx_idle</a></td></tr>
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<h2 class="groupheader">Member Function Documentation</h2>
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<a id="a59a71af682b64f0e0eb1f4b9c18a5d20" name="a59a71af682b64f0e0eb1f4b9c18a5d20"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a59a71af682b64f0e0eb1f4b9c18a5d20">◆ </a></span>__attribute__() <span class="overload">[1/2]</span></h2>
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<td class="memname"><a class="el" href="structsdrv__dma__linklist__descriptor__t.html">sdrv_dma_linklist_descriptor_t</a> rx_dma_linklist[<a class="el" href="sdrv__uart_8h.html#a9781171c1ae6b2cc9f51bc8338e09d53">NUM_LINKLIST_ITEMS</a>] __attribute__ </td>
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<td>(</td>
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<td class="paramtype">(__aligned__(<a class="el" href="sdrv__mmc__sdhci_8h.html#a24d49e5ebe2d27dc86b3c22eb1a8245d">CONFIG_ARCH_CACHE_LINE</a>)) </td>
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<td class="paramname"></td><td>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a83f459461dcf1d96a69e26ba0e9f1aa0">◆ </a></span>__attribute__() <span class="overload">[2/2]</span></h2>
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<td class="memname"><a class="el" href="structsdrv__dma__linklist__descriptor__t.html">sdrv_dma_linklist_descriptor_t</a> tx_dma_linklist[<a class="el" href="sdrv__uart_8h.html#a9781171c1ae6b2cc9f51bc8338e09d53">NUM_LINKLIST_ITEMS</a>] __attribute__ </td>
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<td>(</td>
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<td class="paramtype">(__aligned__(<a class="el" href="sdrv__mmc__sdhci_8h.html#a24d49e5ebe2d27dc86b3c22eb1a8245d">CONFIG_ARCH_CACHE_LINE</a>)) </td>
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<h2 class="groupheader">Field Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a15c94c6e01fb09646e4a3568ab6ed5d6">◆ </a></span>abr_count</h2>
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<p >Auto baudrate detect count </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a26bff0d367c09f14d7a19fa432225f24">◆ </a></span>abr_state</h2>
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<td class="memname">volatile <a class="el" href="sdrv__uart_8h.html#af7c24e06dbaad38cb4773236eabb797a">sdrv_uart_transfer_status_e</a> abr_state</td>
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<p >Auto baudrate detect status </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a0523cedff47e2441fc198b7770ec5d3f">◆ </a></span>base</h2>
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<p >Uart module base </p>
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<p >Uart dev baud rate </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a62660747fa1d25fa36035bdc11ce1763">◆ </a></span>bytes_rxcarried</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a91feb71e8190db9e1cdfb1e35a2cb01f">◆ </a></span>callback</h2>
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<td class="memname"><a class="el" href="sdrv__uart_8h.html#aed4c4a1cd76ce1250596d5eb970b46aa">uart_callback_t</a> callback</td>
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<p >Uart transmit callback function </p>
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<a id="a6e150bf7979f0599e001f893375eb671" name="a6e150bf7979f0599e001f893375eb671"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a6e150bf7979f0599e001f893375eb671">◆ </a></span>clk_freq</h2>
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<td class="memname">uint32_t clk_freq</td>
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<p >Uart module clk freq </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a757137407473eae1c293050887772435">◆ </a></span>dma_instance</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a8398793befd907d68bc1b103b1ea1080">sdrv_dma_t</a>* dma_instance</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a17fdd15a71ced1e05faf127882011db3">◆ </a></span>irq</h2>
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<td class="memname">uint32_t irq</td>
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<p >Uart module irq num </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a3460b4413e1f2ef9b195442fbac3331d">◆ </a></span>rx_async_cb</h2>
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<td class="memname"><a class="el" href="sdrv__uart_8h.html#aed4c4a1cd76ce1250596d5eb970b46aa">uart_callback_t</a> rx_async_cb</td>
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<p >Uart transmit callback function </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a6a80ec02129c3c79c78d643939b4ccfe">◆ </a></span>rx_dmachannel</h2>
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<td class="memname"><a class="el" href="structsdrv__dma__channel__t.html">sdrv_dma_channel_t</a>* rx_dmachannel</td>
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<p >The pointer of rx dma channel. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#afc4b104a152cd6cb42c8ca3ec3c69690">◆ </a></span>rx_idle</h2>
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<td class="memname"><a class="el" href="sdrv__uart_8h.html#a8d4d5ad3e43bdba34353fc71019da3d4">sdrv_rxidle_ctl_e</a> rx_idle</td>
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<p >The time of high level on rx line to detect idle. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a23310a7ef3c9c7c5a7dd6d696812681e">◆ </a></span>rx_ptr</h2>
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<td class="memname">uint8_t* rx_ptr</td>
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<p >Pointer to current Rx character </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a2037cdd6510b5a02eab020c9d131a406">◆ </a></span>rx_remain</h2>
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<p >Number of remaining Rx characters in SDRV_TRANSFER_ASYNC_MODE; The size of the data to be transferred in SDRV_TRANSFER_DMA_MODE. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a4d46cf5156f755ac7fabe5b50c1623d4">◆ </a></span>rx_state</h2>
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<td class="memname">volatile <a class="el" href="sdrv__uart_8h.html#af7c24e06dbaad38cb4773236eabb797a">sdrv_uart_transfer_status_e</a> rx_state</td>
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<p >Transmit status </p>
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<a id="a01ac33b9eff75b3c52ee396bbb5a8158" name="a01ac33b9eff75b3c52ee396bbb5a8158"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a01ac33b9eff75b3c52ee396bbb5a8158">◆ </a></span>rx_userparam</h2>
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<td class="memname">void* rx_userparam</td>
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<p >Uart transmit callback function user param </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a2d11b6532146e50457e9ff65df035075">◆ </a></span>rxtransfer_type</h2>
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<td class="memname">volatile <a class="el" href="sdrv__uart_8h.html#a0e261a269cb0547effd82334faed5f8f">sdrv_uart_transfer_type_e</a> rxtransfer_type</td>
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<p >Uart transfer mode </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a8bfcf1b72b1bf65c9221c6bed0158997">◆ </a></span>tx_async_cb</h2>
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<td class="memname"><a class="el" href="sdrv__uart_8h.html#aed4c4a1cd76ce1250596d5eb970b46aa">uart_callback_t</a> tx_async_cb</td>
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<p >Uart transmit callback function </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a723933e56be40a1c1225645b41a9b74c">◆ </a></span>tx_dmachannel</h2>
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<td class="memname"><a class="el" href="structsdrv__dma__channel__t.html">sdrv_dma_channel_t</a>* tx_dmachannel</td>
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<p >The pointer of tx dma channel. </p>
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<a id="a9bffc5d95c7a29de9fb93961d7a62d68" name="a9bffc5d95c7a29de9fb93961d7a62d68"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a9bffc5d95c7a29de9fb93961d7a62d68">◆ </a></span>tx_ptr</h2>
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<td class="memname">const uint8_t* tx_ptr</td>
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<p >Pointer to current Tx character </p>
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<a id="abc4cf1c1331b99d224c88f8328836b32" name="abc4cf1c1331b99d224c88f8328836b32"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#abc4cf1c1331b99d224c88f8328836b32">◆ </a></span>tx_remain</h2>
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<td class="memname">volatile uint32_t tx_remain</td>
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<p >Number of remaining Tx characters in SDRV_TRANSFER_ASYNC_MODE; The size of the data to be transferred in SDRV_TRANSFER_DMA_MODE. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a293dc84572602c407a5acb897d3efa6d">◆ </a></span>tx_state</h2>
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<td class="memname">volatile <a class="el" href="sdrv__uart_8h.html#af7c24e06dbaad38cb4773236eabb797a">sdrv_uart_transfer_status_e</a> tx_state</td>
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<p >Receive status </p>
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<a id="a3570b8279a97a20629de4870f148aa13" name="a3570b8279a97a20629de4870f148aa13"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a3570b8279a97a20629de4870f148aa13">◆ </a></span>tx_userparam</h2>
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<td class="memname">void* tx_userparam</td>
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<p >Uart transmit callback function user param </p>
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<a id="a3437b64ff3ac2cf3f04ea9bef66b10a0" name="a3437b64ff3ac2cf3f04ea9bef66b10a0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a3437b64ff3ac2cf3f04ea9bef66b10a0">◆ </a></span>txtransfer_type</h2>
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<td class="memname">volatile <a class="el" href="sdrv__uart_8h.html#a0e261a269cb0547effd82334faed5f8f">sdrv_uart_transfer_type_e</a> txtransfer_type</td>
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<p >Uart transfer mode </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a2e294dd14122c554baa0665072b4ca7a">◆ </a></span>userData</h2>
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<td class="memname">void* userData</td>
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<p >Uart transmit callback function user param </p>
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<hr/>The documentation for this struct was generated from the following file:<ul>
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<li>Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/<a class="el" href="sdrv__uart_8h_source.html">sdrv_uart.h</a></li>
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</ul>
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