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<p><code>#include &lt;<a class="el" href="sdrv__i2s_8h_source.html">sdrv_i2s.h</a>&gt;</code></p>
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Data Fields</h2></td></tr>
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<tr class="memitem:aa88b88399c55881f6d89c82e504048ef"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__ckgen_8h.html#ad8d0e7efa2d7e48c2718e0d76cb4bc37">sdrv_ckgen_node_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2s__config.html#aa88b88399c55881f6d89c82e504048ef">clk</a></td></tr>
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<tr class="memitem:ae5ca34149f06edf50a952caa8681352e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="sdrv__i2s_8h.html#ad5fdd6886dc5048637df684a0fafd69b">sdrv_i2s_clk_sync_type_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structsdrv__i2s__config.html#ae5ca34149f06edf50a952caa8681352e">sync_mode</a></td></tr>
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<h2 class="groupheader">Field Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#abc81edd3d3caf9e6c2e0762881da6016">&#9670;&nbsp;</a></span>base</h2>
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<td class="memname">paddr_t base</td>
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<p >i2s module base addr </p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa88b88399c55881f6d89c82e504048ef">&#9670;&nbsp;</a></span>clk</h2>
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<td class="memname"><a class="el" href="sdrv__ckgen_8h.html#ad8d0e7efa2d7e48c2718e0d76cb4bc37">sdrv_ckgen_node_t</a>* clk</td>
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<p >i2s module clk </p>
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<a id="a1611d1165e4f1e6a714d08b5f9793997" name="a1611d1165e4f1e6a714d08b5f9793997"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1611d1165e4f1e6a714d08b5f9793997">&#9670;&nbsp;</a></span>dma_base</h2>
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<td class="memname">paddr_t dma_base</td>
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<p >dma used by i2s, which is dma base addr </p>
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<a id="a7441ef0865bcb3db9b8064dd7375c1ea" name="a7441ef0865bcb3db9b8064dd7375c1ea"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7441ef0865bcb3db9b8064dd7375c1ea">&#9670;&nbsp;</a></span>id</h2>
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<td class="memname">int id</td>
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<p >reserved </p>
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<a id="a17fdd15a71ced1e05faf127882011db3" name="a17fdd15a71ced1e05faf127882011db3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a17fdd15a71ced1e05faf127882011db3">&#9670;&nbsp;</a></span>irq</h2>
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<td class="memname">uint32_t irq</td>
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<p >i2s module irq num </p>
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<h2 class="memtitle"><span class="permalink"><a href="#a810fc557b971b62867452443f155c48f">&#9670;&nbsp;</a></span>mclk_dir</h2>
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<td class="memname"><a class="el" href="sdrv__i2s_8h.html#a6465f6edaf86cfafc1902ecbad8b5fd5">sdrv_i2s_mclk_dir_t</a> mclk_dir</td>
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<p >mclk in or out ,default out </p>
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<a id="a6305346b2d01ec9f60bdf093df5eea72" name="a6305346b2d01ec9f60bdf093df5eea72"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6305346b2d01ec9f60bdf093df5eea72">&#9670;&nbsp;</a></span>mclk_sel</h2>
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<td class="memname"><a class="el" href="sdrv__i2s_8h.html#a60e17e3ab5f499ce55dd4075a638c3e7">sdrv_i2s_mclk_sel_t</a> mclk_sel</td>
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<p >which mclk is selected </p>
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<a id="a453abef18aaee58640962a6fb48508c2" name="a453abef18aaee58640962a6fb48508c2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a453abef18aaee58640962a6fb48508c2">&#9670;&nbsp;</a></span>rx_channel_id</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a2fce8b449dfda53bb26afae8dea00c9f">sdrv_dma_channel_id_e</a> rx_channel_id</td>
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<p >dma used by i2s, which is dma channel </p>
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<a id="a4bd7475c8e19b0220a75c57d3733a037" name="a4bd7475c8e19b0220a75c57d3733a037"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4bd7475c8e19b0220a75c57d3733a037">&#9670;&nbsp;</a></span>rx_chsel</h2>
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<td class="memname">uint8_t rx_chsel</td>
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<p >rx data pin </p>
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<a id="ae5ca34149f06edf50a952caa8681352e" name="ae5ca34149f06edf50a952caa8681352e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae5ca34149f06edf50a952caa8681352e">&#9670;&nbsp;</a></span>sync_mode</h2>
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<td class="memname"><a class="el" href="sdrv__i2s_8h.html#ad5fdd6886dc5048637df684a0fafd69b">sdrv_i2s_clk_sync_type_t</a> sync_mode</td>
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<p >tx rx synchronization </p>
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<a id="a02e95819c76294a2e17f180bf88c21d5" name="a02e95819c76294a2e17f180bf88c21d5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a02e95819c76294a2e17f180bf88c21d5">&#9670;&nbsp;</a></span>tx_channel_id</h2>
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<td class="memname"><a class="el" href="sdrv__dma_8h.html#a2fce8b449dfda53bb26afae8dea00c9f">sdrv_dma_channel_id_e</a> tx_channel_id</td>
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<p >dma used by i2s, which is dma channel </p>
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<a id="ad8143c8e97127c51cdf9c153fd1e6b39" name="ad8143c8e97127c51cdf9c153fd1e6b39"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad8143c8e97127c51cdf9c153fd1e6b39">&#9670;&nbsp;</a></span>tx_chsel</h2>
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<td class="memname">uint8_t tx_chsel</td>
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<p >tx data pin </p>
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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/<a class="el" href="sdrv__i2s_8h_source.html">sdrv_i2s.h</a></li>
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