flexcan_timing_config_t

#include <sdrv_flexcan.h>

Detailed Description

NOTICE: The length of the time quantum should be the same in nominal and data bit timing (i.e. preDivider should be the same in nominal and data bit timing configuration) in order to minimize the chance of error frames on the CAN bus, and to optimize the clock tolerance in networks that use CAN FD frams.

Field Documentation

phaseSeg1

uint8_t phaseSeg1

phaseSeg2

uint8_t phaseSeg2

preDivider

uint16_t preDivider

propSeg

uint8_t propSeg

rJumpwidth

uint8_t rJumpwidth

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The documentation for this struct was generated from the following file:

• Z:/01-Code/06-SSDK-DEV-Firewall/ssdk/drivers/include/sdrv_flexcan.h