OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)

CSTACK_SIZE = 0x1000;
SVC_STACK_SIZE = 0x1000;
IRQ_STACK_SIZE = 0x80;
FIQ_STACK_SIZE = 0x1000;
UND_STACK_SIZE = 0x80;
ABT_STACK_SIZE = 0x80;

ENTRY(Reset_Handler)

MEMORY
{
  TCM (RW)      : ORIGIN = 0x01900000, LENGTH = 0x00020000
  RAM (RW)      : ORIGIN = 0x00504000, LENGTH = 0x0007C000
  RAMECC (RW)   : ORIGIN = 0x004E0000, LENGTH = 0x00020000
}

SECTIONS
{
    /* text/read-only data */
    .text : {
        KEEP(*(.intvec))
        *(.text* .sram.text.glue_7* .gnu.linkonce.t.*)
    } > RAM

    .dummy_post_text : {
        __code_end = .;
    } > RAM

    .rodata : ALIGN(4) {
        __rodata_start = .;
        __fault_handler_table_start = .;
        KEEP(*(.rodata.fault_handler_table))
        __fault_handler_table_end = .;
        *(.rodata .rodata.* .gnu.linkonce.r.*)
    } > RAM

    /*
     * extra linker scripts tend to insert sections just after .rodata,
     * so we want to make sure this symbol comes after anything inserted above,
     * but not aligned to the next section necessarily.
     */
    .dummy_post_rodata : {
        __rodata_end = .;
    } > RAM

    .data : ALIGN(4) {
        __data_start = .;
        *(.data .data.* .gnu.linkonce.d.*)
        __commands_start = .;
        KEEP (*(.commands))
        __commands_end = .;
    } > RAM

    .ctors : ALIGN(4) {
        __ctor_list = .;
        KEEP(*(.ctors .init_array))
        __ctor_end = .;
    } > RAM
    .dtors : ALIGN(4) {
        __dtor_list = .;
        KEEP(*(.dtors .fini_array))
        __dtor_end = .;
    } > RAM
    .got : { *(.got.plt) *(.got) } > RAM
    .dynamic : { *(.dynamic) } > RAM

    /* List sections that have differet load address and link address,
     * requiring early section copy on start up.
     */
    .earlycopy : ALIGN(4) {
        __earlycopy_start = .;

        /* TCM code and data section. */
        LONG(ADDR(.tcm))
        LONG(SIZEOF(.tcm))
        LONG(LOADADDR(.tcm))

        /* Add other sections here. */

        __earlycopy_end = .;
    } > RAM

    .nocache : ALIGN(1024) {
        _nocacheable_start = .;
        KEEP(*(.nocache))
        . = ALIGN(1024);
        _nocacheable_end = .;
    } > RAM

    .dummy_post_data : {
        /* End of initialized sections. */
        __data_end = ALIGN(4);
    } > RAM

    /* uninitialized data (in same segment as writable data) */
    .bss (NOLOAD) : ALIGN(4) {
        KEEP(*(.bss.prebss.*))
        . = ALIGN(4);
        __bss_start = .;
        *(.bss .bss.*)
        *(.gnu.linkonce.b.*)
        *(COMMON)
        . = ALIGN(4);
        __bss_end = .;
    } > RAM

    /* exception stack */
    .except.stack (NOLOAD) : ALIGN(8) {
        __except_stack_start = .;
        . += CSTACK_SIZE;
        __cstack_end = .;
        . += SVC_STACK_SIZE;
        __svc_stack_end = .;
        . += IRQ_STACK_SIZE;
        __irq_stack_end = .;
        . += FIQ_STACK_SIZE;
        __fiq_stack_end = .;
        . += UND_STACK_SIZE;
        __und_stack_end = .;
        . += ABT_STACK_SIZE;
        __abt_stack_end = .;
        __except_stack_end = .;
    } > RAM

    _end = .;

    .heap (NOLOAD) : ALIGN(8) {
        _heap_start = .;
        *(.heap)
    } > RAM

    _end_of_ram = ORIGIN(RAM) + LENGTH(RAM);

    _heap_end = _end_of_ram;

    /* IRAM none-ecc data sections. */
    .noneecc (NOLOAD) : ALIGN(4) {
        _noneecc_start = .;
        *(.noneeccdata)
        _noneecc_end = ORIGIN(RAMECC) + LENGTH(RAMECC);
    } > RAMECC

    /* TCM code and data sections. */
    .tcm : AT (__data_end) {
        __tcm_start = .;
        *(.tcmcode)

        . = ALIGN(4);
        *(.tcmdata)

        __tcm_end = ALIGN(4);
        ASSERT(__tcm_end - __tcm_start <= LENGTH(TCM), "TCM overflow!");
    } > TCM

    /* Strip unnecessary stuff */
    /DISCARD/ : { *(.comment .note) }
}