SemiDrive SSDK Appication Program Interface
PTG3.0
drivers
include
crypto
cacc
ral
register_base_addr.h
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/*****************************************************************************
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*
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*
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*Copyright (c) 2021-2029 Semidrive Incorporated. All rights reserved.
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*Software License Agreement
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*
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******************************************************************************
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*/
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#ifndef REGISTER_BASE_ADDR_H
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#define REGISTER_BASE_ADDR_H
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/*including int32_t definition*/
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#include <stdint.h>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/*just for temporary use*/
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/* iram3 0x600000 */
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#define CACC_TEST_DMA_RAM_BASE (0x580000UL)
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/*register base address*/
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/*PKE register base address*/
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#define PKE_BASE_ADDR (0x021C0000UL)
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/*TRNG register base address*/
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#define TRNG_BASE_ADDR (0x021C4000UL)
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/*SKE_HP register base address*/
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#define SKE_HP_BASE_ADDR (0x021C8000UL)
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/*HASH register base address*/
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#define HASH_BASE_ADDR (0x021CC000UL)
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#define APB_SEIP_BASE_ADDR (0xF3100000UL)
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#define OTP_KEY_CTRL (*((volatile uint32_t *)(0x021DD804UL)))
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#ifdef __cplusplus
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}
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#endif
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#endif
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